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authorThomas Abraham <thomas.abraham@linaro.org>2013-03-09 03:19:17 -0500
committerKukjin Kim <kgene.kim@samsung.com>2013-03-25 05:18:32 -0400
commit6a0338c25bd250ba037ab4815aa0ee8dc276fd04 (patch)
treec6f4bdb900b4d3c5f7c96ab5ca3cf800c65287ca /arch/arm/boot
parent2de6847cfc68c45c54922620dbb41cdd821fbaeb (diff)
ARM: dts: add clock provider information for all controllers in Exynos5440 SoC
For all supported peripheral controllers on Exynos5440, add clock lookup information. Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/boot')
-rw-r--r--arch/arm/boot/dts/exynos5440.dtsi18
1 files changed, 18 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/exynos5440.dtsi b/arch/arm/boot/dts/exynos5440.dtsi
index f5834d062a1a..a54c4ab7bdf5 100644
--- a/arch/arm/boot/dts/exynos5440.dtsi
+++ b/arch/arm/boot/dts/exynos5440.dtsi
@@ -65,12 +65,16 @@
65 compatible = "samsung,exynos4210-uart"; 65 compatible = "samsung,exynos4210-uart";
66 reg = <0xB0000 0x1000>; 66 reg = <0xB0000 0x1000>;
67 interrupts = <0 2 0>; 67 interrupts = <0 2 0>;
68 clocks = <&clock 21>, <&clock 21>;
69 clock-names = "uart", "clk_uart_baud0";
68 }; 70 };
69 71
70 serial@C0000 { 72 serial@C0000 {
71 compatible = "samsung,exynos4210-uart"; 73 compatible = "samsung,exynos4210-uart";
72 reg = <0xC0000 0x1000>; 74 reg = <0xC0000 0x1000>;
73 interrupts = <0 3 0>; 75 interrupts = <0 3 0>;
76 clocks = <&clock 21>, <&clock 21>;
77 clock-names = "uart", "clk_uart_baud0";
74 }; 78 };
75 79
76 spi { 80 spi {
@@ -81,6 +85,8 @@
81 rx-dma-channel = <&pdma0 4>; /* preliminary */ 85 rx-dma-channel = <&pdma0 4>; /* preliminary */
82 #address-cells = <1>; 86 #address-cells = <1>;
83 #size-cells = <0>; 87 #size-cells = <0>;
88 clocks = <&clock 21>, <&clock 16>;
89 clock-names = "spi", "spi_busclk0";
84 }; 90 };
85 91
86 pinctrl { 92 pinctrl {
@@ -113,6 +119,8 @@
113 interrupts = <0 5 0>; 119 interrupts = <0 5 0>;
114 #address-cells = <1>; 120 #address-cells = <1>;
115 #size-cells = <0>; 121 #size-cells = <0>;
122 clocks = <&clock 21>;
123 clock-names = "i2c";
116 }; 124 };
117 125
118 i2c@100000 { 126 i2c@100000 {
@@ -121,12 +129,16 @@
121 interrupts = <0 6 0>; 129 interrupts = <0 6 0>;
122 #address-cells = <1>; 130 #address-cells = <1>;
123 #size-cells = <0>; 131 #size-cells = <0>;
132 clocks = <&clock 21>;
133 clock-names = "i2c";
124 }; 134 };
125 135
126 watchdog { 136 watchdog {
127 compatible = "samsung,s3c2410-wdt"; 137 compatible = "samsung,s3c2410-wdt";
128 reg = <0x110000 0x1000>; 138 reg = <0x110000 0x1000>;
129 interrupts = <0 1 0>; 139 interrupts = <0 1 0>;
140 clocks = <&clock 21>;
141 clock-names = "watchdog";
130 }; 142 };
131 143
132 amba { 144 amba {
@@ -140,12 +152,16 @@
140 compatible = "arm,pl330", "arm,primecell"; 152 compatible = "arm,pl330", "arm,primecell";
141 reg = <0x120000 0x1000>; 153 reg = <0x120000 0x1000>;
142 interrupts = <0 34 0>; 154 interrupts = <0 34 0>;
155 clocks = <&clock 21>;
156 clock-names = "apb_pclk";
143 }; 157 };
144 158
145 pdma1: pdma@121B0000 { 159 pdma1: pdma@121B0000 {
146 compatible = "arm,pl330", "arm,primecell"; 160 compatible = "arm,pl330", "arm,primecell";
147 reg = <0x121000 0x1000>; 161 reg = <0x121000 0x1000>;
148 interrupts = <0 35 0>; 162 interrupts = <0 35 0>;
163 clocks = <&clock 21>;
164 clock-names = "apb_pclk";
149 }; 165 };
150 }; 166 };
151 167
@@ -153,5 +169,7 @@
153 compatible = "samsung,s3c6410-rtc"; 169 compatible = "samsung,s3c6410-rtc";
154 reg = <0x130000 0x1000>; 170 reg = <0x130000 0x1000>;
155 interrupts = <0 17 0>, <0 16 0>; 171 interrupts = <0 17 0>, <0 16 0>;
172 clocks = <&clock 21>;
173 clock-names = "rtc";
156 }; 174 };
157}; 175};