aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/boot
diff options
context:
space:
mode:
authorOlof Johansson <olof@lixom.net>2015-01-08 17:42:11 -0500
committerOlof Johansson <olof@lixom.net>2015-01-16 22:10:37 -0500
commit3be8142951e87beb9a69efbfea0f4041c893c09f (patch)
tree2c35369803d7c65b98d0d6e99cc021162846d0af /arch/arm/boot
parent1591dc44a067a6579544c33d05fefa9d8665e1c0 (diff)
parent7a9f0604bd56936b2b18f49824e0e392dc7878c3 (diff)
Merge tag 'imx-fixes-3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into fixes
Merge "ARM: imx: fixes for 3.19" from Shawn Guo: The i.MX fixes for 3.19: - One fix for incorrect i.MX25 SPI1 clock assignment in device tree, which causes system hang when accessing SPI1. - Correct i.MX6SX QSPI parent clock configuration to fix a kernel Oops. - Fix ULPI PHY reset modelling on imx51-babbage board to remove the dependency on bootloader for USB3317 ULPI PHY reset. - Correct video divider setting on i.MX6Q rev T0 1.0 to fix the issue that HDMI is not working at high resolution on T0 1.0. - One incremental fix for CODA960 VPU enabling in device tree to correct interrupt order. - LS1021A SCFG block works in BE mode, add device tree property big-endian to make it right. * tag 'imx-fixes-3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: ARM: dts: imx51-babbage: Fix ULPI PHY reset modelling ARM: imx6sx: Set PLL2 as parent of QSPI clocks ARM: dts: imx25: Fix the SPI1 clocks ARM: clk-imx6q: fix video divider for rev T0 1.0 ARM: dts: imx6qdl: Fix CODA960 interrupt order ARM: ls1021a: dtsi: add 'big-endian' property for scfg node Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch/arm/boot')
-rw-r--r--arch/arm/boot/dts/imx25.dtsi2
-rw-r--r--arch/arm/boot/dts/imx51-babbage.dts22
-rw-r--r--arch/arm/boot/dts/imx6qdl.dtsi4
-rw-r--r--arch/arm/boot/dts/ls1021a.dtsi1
4 files changed, 9 insertions, 20 deletions
diff --git a/arch/arm/boot/dts/imx25.dtsi b/arch/arm/boot/dts/imx25.dtsi
index 58d3c3cf2923..d238676a9107 100644
--- a/arch/arm/boot/dts/imx25.dtsi
+++ b/arch/arm/boot/dts/imx25.dtsi
@@ -162,7 +162,7 @@
162 #size-cells = <0>; 162 #size-cells = <0>;
163 compatible = "fsl,imx25-cspi", "fsl,imx35-cspi"; 163 compatible = "fsl,imx25-cspi", "fsl,imx35-cspi";
164 reg = <0x43fa4000 0x4000>; 164 reg = <0x43fa4000 0x4000>;
165 clocks = <&clks 62>, <&clks 62>; 165 clocks = <&clks 78>, <&clks 78>;
166 clock-names = "ipg", "per"; 166 clock-names = "ipg", "per";
167 interrupts = <14>; 167 interrupts = <14>;
168 status = "disabled"; 168 status = "disabled";
diff --git a/arch/arm/boot/dts/imx51-babbage.dts b/arch/arm/boot/dts/imx51-babbage.dts
index 56569cecaa78..649befeb2cf9 100644
--- a/arch/arm/boot/dts/imx51-babbage.dts
+++ b/arch/arm/boot/dts/imx51-babbage.dts
@@ -127,24 +127,12 @@
127 #address-cells = <1>; 127 #address-cells = <1>;
128 #size-cells = <0>; 128 #size-cells = <0>;
129 129
130 reg_usbh1_vbus: regulator@0 { 130 reg_hub_reset: regulator@0 {
131 compatible = "regulator-fixed";
132 pinctrl-names = "default";
133 pinctrl-0 = <&pinctrl_usbh1reg>;
134 reg = <0>;
135 regulator-name = "usbh1_vbus";
136 regulator-min-microvolt = <5000000>;
137 regulator-max-microvolt = <5000000>;
138 gpio = <&gpio2 5 GPIO_ACTIVE_HIGH>;
139 enable-active-high;
140 };
141
142 reg_usbotg_vbus: regulator@1 {
143 compatible = "regulator-fixed"; 131 compatible = "regulator-fixed";
144 pinctrl-names = "default"; 132 pinctrl-names = "default";
145 pinctrl-0 = <&pinctrl_usbotgreg>; 133 pinctrl-0 = <&pinctrl_usbotgreg>;
146 reg = <1>; 134 reg = <0>;
147 regulator-name = "usbotg_vbus"; 135 regulator-name = "hub_reset";
148 regulator-min-microvolt = <5000000>; 136 regulator-min-microvolt = <5000000>;
149 regulator-max-microvolt = <5000000>; 137 regulator-max-microvolt = <5000000>;
150 gpio = <&gpio1 7 GPIO_ACTIVE_HIGH>; 138 gpio = <&gpio1 7 GPIO_ACTIVE_HIGH>;
@@ -176,6 +164,7 @@
176 reg = <0>; 164 reg = <0>;
177 clocks = <&clks IMX5_CLK_DUMMY>; 165 clocks = <&clks IMX5_CLK_DUMMY>;
178 clock-names = "main_clk"; 166 clock-names = "main_clk";
167 reset-gpios = <&gpio2 5 GPIO_ACTIVE_LOW>;
179 }; 168 };
180 }; 169 };
181}; 170};
@@ -419,7 +408,7 @@
419&usbh1 { 408&usbh1 {
420 pinctrl-names = "default"; 409 pinctrl-names = "default";
421 pinctrl-0 = <&pinctrl_usbh1>; 410 pinctrl-0 = <&pinctrl_usbh1>;
422 vbus-supply = <&reg_usbh1_vbus>; 411 vbus-supply = <&reg_hub_reset>;
423 fsl,usbphy = <&usbh1phy>; 412 fsl,usbphy = <&usbh1phy>;
424 phy_type = "ulpi"; 413 phy_type = "ulpi";
425 status = "okay"; 414 status = "okay";
@@ -429,7 +418,6 @@
429 dr_mode = "otg"; 418 dr_mode = "otg";
430 disable-over-current; 419 disable-over-current;
431 phy_type = "utmi_wide"; 420 phy_type = "utmi_wide";
432 vbus-supply = <&reg_usbotg_vbus>;
433 status = "okay"; 421 status = "okay";
434}; 422};
435 423
diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi
index 4fc03b7f1cee..2109d0763c1b 100644
--- a/arch/arm/boot/dts/imx6qdl.dtsi
+++ b/arch/arm/boot/dts/imx6qdl.dtsi
@@ -335,8 +335,8 @@
335 vpu: vpu@02040000 { 335 vpu: vpu@02040000 {
336 compatible = "cnm,coda960"; 336 compatible = "cnm,coda960";
337 reg = <0x02040000 0x3c000>; 337 reg = <0x02040000 0x3c000>;
338 interrupts = <0 3 IRQ_TYPE_LEVEL_HIGH>, 338 interrupts = <0 12 IRQ_TYPE_LEVEL_HIGH>,
339 <0 12 IRQ_TYPE_LEVEL_HIGH>; 339 <0 3 IRQ_TYPE_LEVEL_HIGH>;
340 interrupt-names = "bit", "jpeg"; 340 interrupt-names = "bit", "jpeg";
341 clocks = <&clks IMX6QDL_CLK_VPU_AXI>, 341 clocks = <&clks IMX6QDL_CLK_VPU_AXI>,
342 <&clks IMX6QDL_CLK_MMDC_CH0_AXI>, 342 <&clks IMX6QDL_CLK_MMDC_CH0_AXI>,
diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi
index 657da14cb4b5..c70bb27ac65a 100644
--- a/arch/arm/boot/dts/ls1021a.dtsi
+++ b/arch/arm/boot/dts/ls1021a.dtsi
@@ -142,6 +142,7 @@
142 scfg: scfg@1570000 { 142 scfg: scfg@1570000 {
143 compatible = "fsl,ls1021a-scfg", "syscon"; 143 compatible = "fsl,ls1021a-scfg", "syscon";
144 reg = <0x0 0x1570000 0x0 0x10000>; 144 reg = <0x0 0x1570000 0x0 0x10000>;
145 big-endian;
145 }; 146 };
146 147
147 clockgen: clocking@1ee1000 { 148 clockgen: clocking@1ee1000 {