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authorTroy Kisky <troy.kisky@boundarydevices.com>2013-11-14 16:02:13 -0500
committerShawn Guo <shawn.guo@linaro.org>2014-02-09 08:29:12 -0500
commit275c08b56992a3d5347e90a0fec6590f905d0051 (patch)
tree9a3d8ab1cb24355985009b171546bac1c3e17206 /arch/arm/boot
parent13088c2309e0eb7d87f7dc6e0597f1e3ac3caf43 (diff)
ARM: dts: imx: imx6qdl.dtsi: use IRQ_TYPE_LEVEL_HIGH
Make the interrupts node slightly more readable. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Diffstat (limited to 'arch/arm/boot')
-rw-r--r--arch/arm/boot/dts/imx6qdl.dtsi162
1 files changed, 92 insertions, 70 deletions
diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi
index 35487eb23497..081606791f51 100644
--- a/arch/arm/boot/dts/imx6qdl.dtsi
+++ b/arch/arm/boot/dts/imx6qdl.dtsi
@@ -75,7 +75,10 @@
75 dma_apbh: dma-apbh@00110000 { 75 dma_apbh: dma-apbh@00110000 {
76 compatible = "fsl,imx6q-dma-apbh", "fsl,imx28-dma-apbh"; 76 compatible = "fsl,imx6q-dma-apbh", "fsl,imx28-dma-apbh";
77 reg = <0x00110000 0x2000>; 77 reg = <0x00110000 0x2000>;
78 interrupts = <0 13 0x04>, <0 13 0x04>, <0 13 0x04>, <0 13 0x04>; 78 interrupts = <0 13 IRQ_TYPE_LEVEL_HIGH>,
79 <0 13 IRQ_TYPE_LEVEL_HIGH>,
80 <0 13 IRQ_TYPE_LEVEL_HIGH>,
81 <0 13 IRQ_TYPE_LEVEL_HIGH>;
79 interrupt-names = "gpmi0", "gpmi1", "gpmi2", "gpmi3"; 82 interrupt-names = "gpmi0", "gpmi1", "gpmi2", "gpmi3";
80 #dma-cells = <1>; 83 #dma-cells = <1>;
81 dma-channels = <4>; 84 dma-channels = <4>;
@@ -88,7 +91,7 @@
88 #size-cells = <1>; 91 #size-cells = <1>;
89 reg = <0x00112000 0x2000>, <0x00114000 0x2000>; 92 reg = <0x00112000 0x2000>, <0x00114000 0x2000>;
90 reg-names = "gpmi-nand", "bch"; 93 reg-names = "gpmi-nand", "bch";
91 interrupts = <0 15 0x04>; 94 interrupts = <0 15 IRQ_TYPE_LEVEL_HIGH>;
92 interrupt-names = "bch"; 95 interrupt-names = "bch";
93 clocks = <&clks 152>, <&clks 153>, <&clks 151>, 96 clocks = <&clks 152>, <&clks 153>, <&clks 151>,
94 <&clks 150>, <&clks 149>; 97 <&clks 150>, <&clks 149>;
@@ -109,7 +112,7 @@
109 L2: l2-cache@00a02000 { 112 L2: l2-cache@00a02000 {
110 compatible = "arm,pl310-cache"; 113 compatible = "arm,pl310-cache";
111 reg = <0x00a02000 0x1000>; 114 reg = <0x00a02000 0x1000>;
112 interrupts = <0 92 0x04>; 115 interrupts = <0 92 IRQ_TYPE_LEVEL_HIGH>;
113 cache-unified; 116 cache-unified;
114 cache-level = <2>; 117 cache-level = <2>;
115 arm,tag-latency = <4 2 3>; 118 arm,tag-latency = <4 2 3>;
@@ -126,7 +129,7 @@
126 0x81000000 0 0 0x01f80000 0 0x00010000 /* downstream I/O */ 129 0x81000000 0 0 0x01f80000 0 0x00010000 /* downstream I/O */
127 0x82000000 0 0x01000000 0x01000000 0 0x00f00000>; /* non-prefetchable memory */ 130 0x82000000 0 0x01000000 0x01000000 0 0x00f00000>; /* non-prefetchable memory */
128 num-lanes = <1>; 131 num-lanes = <1>;
129 interrupts = <0 123 0x04>; 132 interrupts = <0 123 IRQ_TYPE_LEVEL_HIGH>;
130 clocks = <&clks 189>, <&clks 187>, <&clks 206>, <&clks 144>; 133 clocks = <&clks 189>, <&clks 187>, <&clks 206>, <&clks 144>;
131 clock-names = "pcie_ref_125m", "sata_ref_100m", "lvds_gate", "pcie_axi"; 134 clock-names = "pcie_ref_125m", "sata_ref_100m", "lvds_gate", "pcie_axi";
132 status = "disabled"; 135 status = "disabled";
@@ -134,7 +137,7 @@
134 137
135 pmu { 138 pmu {
136 compatible = "arm,cortex-a9-pmu"; 139 compatible = "arm,cortex-a9-pmu";
137 interrupts = <0 94 0x04>; 140 interrupts = <0 94 IRQ_TYPE_LEVEL_HIGH>;
138 }; 141 };
139 142
140 aips-bus@02000000 { /* AIPS1 */ 143 aips-bus@02000000 { /* AIPS1 */
@@ -154,7 +157,7 @@
154 spdif: spdif@02004000 { 157 spdif: spdif@02004000 {
155 compatible = "fsl,imx35-spdif"; 158 compatible = "fsl,imx35-spdif";
156 reg = <0x02004000 0x4000>; 159 reg = <0x02004000 0x4000>;
157 interrupts = <0 52 0x04>; 160 interrupts = <0 52 IRQ_TYPE_LEVEL_HIGH>;
158 dmas = <&sdma 14 18 0>, 161 dmas = <&sdma 14 18 0>,
159 <&sdma 15 18 0>; 162 <&sdma 15 18 0>;
160 dma-names = "rx", "tx"; 163 dma-names = "rx", "tx";
@@ -176,7 +179,7 @@
176 #size-cells = <0>; 179 #size-cells = <0>;
177 compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi"; 180 compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi";
178 reg = <0x02008000 0x4000>; 181 reg = <0x02008000 0x4000>;
179 interrupts = <0 31 0x04>; 182 interrupts = <0 31 IRQ_TYPE_LEVEL_HIGH>;
180 clocks = <&clks 112>, <&clks 112>; 183 clocks = <&clks 112>, <&clks 112>;
181 clock-names = "ipg", "per"; 184 clock-names = "ipg", "per";
182 status = "disabled"; 185 status = "disabled";
@@ -187,7 +190,7 @@
187 #size-cells = <0>; 190 #size-cells = <0>;
188 compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi"; 191 compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi";
189 reg = <0x0200c000 0x4000>; 192 reg = <0x0200c000 0x4000>;
190 interrupts = <0 32 0x04>; 193 interrupts = <0 32 IRQ_TYPE_LEVEL_HIGH>;
191 clocks = <&clks 113>, <&clks 113>; 194 clocks = <&clks 113>, <&clks 113>;
192 clock-names = "ipg", "per"; 195 clock-names = "ipg", "per";
193 status = "disabled"; 196 status = "disabled";
@@ -198,7 +201,7 @@
198 #size-cells = <0>; 201 #size-cells = <0>;
199 compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi"; 202 compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi";
200 reg = <0x02010000 0x4000>; 203 reg = <0x02010000 0x4000>;
201 interrupts = <0 33 0x04>; 204 interrupts = <0 33 IRQ_TYPE_LEVEL_HIGH>;
202 clocks = <&clks 114>, <&clks 114>; 205 clocks = <&clks 114>, <&clks 114>;
203 clock-names = "ipg", "per"; 206 clock-names = "ipg", "per";
204 status = "disabled"; 207 status = "disabled";
@@ -209,7 +212,7 @@
209 #size-cells = <0>; 212 #size-cells = <0>;
210 compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi"; 213 compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi";
211 reg = <0x02014000 0x4000>; 214 reg = <0x02014000 0x4000>;
212 interrupts = <0 34 0x04>; 215 interrupts = <0 34 IRQ_TYPE_LEVEL_HIGH>;
213 clocks = <&clks 115>, <&clks 115>; 216 clocks = <&clks 115>, <&clks 115>;
214 clock-names = "ipg", "per"; 217 clock-names = "ipg", "per";
215 status = "disabled"; 218 status = "disabled";
@@ -218,7 +221,7 @@
218 uart1: serial@02020000 { 221 uart1: serial@02020000 {
219 compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; 222 compatible = "fsl,imx6q-uart", "fsl,imx21-uart";
220 reg = <0x02020000 0x4000>; 223 reg = <0x02020000 0x4000>;
221 interrupts = <0 26 0x04>; 224 interrupts = <0 26 IRQ_TYPE_LEVEL_HIGH>;
222 clocks = <&clks 160>, <&clks 161>; 225 clocks = <&clks 160>, <&clks 161>;
223 clock-names = "ipg", "per"; 226 clock-names = "ipg", "per";
224 dmas = <&sdma 25 4 0>, <&sdma 26 4 0>; 227 dmas = <&sdma 25 4 0>, <&sdma 26 4 0>;
@@ -228,13 +231,13 @@
228 231
229 esai: esai@02024000 { 232 esai: esai@02024000 {
230 reg = <0x02024000 0x4000>; 233 reg = <0x02024000 0x4000>;
231 interrupts = <0 51 0x04>; 234 interrupts = <0 51 IRQ_TYPE_LEVEL_HIGH>;
232 }; 235 };
233 236
234 ssi1: ssi@02028000 { 237 ssi1: ssi@02028000 {
235 compatible = "fsl,imx6q-ssi","fsl,imx21-ssi"; 238 compatible = "fsl,imx6q-ssi","fsl,imx21-ssi";
236 reg = <0x02028000 0x4000>; 239 reg = <0x02028000 0x4000>;
237 interrupts = <0 46 0x04>; 240 interrupts = <0 46 IRQ_TYPE_LEVEL_HIGH>;
238 clocks = <&clks 178>; 241 clocks = <&clks 178>;
239 dmas = <&sdma 37 1 0>, 242 dmas = <&sdma 37 1 0>,
240 <&sdma 38 1 0>; 243 <&sdma 38 1 0>;
@@ -247,7 +250,7 @@
247 ssi2: ssi@0202c000 { 250 ssi2: ssi@0202c000 {
248 compatible = "fsl,imx6q-ssi","fsl,imx21-ssi"; 251 compatible = "fsl,imx6q-ssi","fsl,imx21-ssi";
249 reg = <0x0202c000 0x4000>; 252 reg = <0x0202c000 0x4000>;
250 interrupts = <0 47 0x04>; 253 interrupts = <0 47 IRQ_TYPE_LEVEL_HIGH>;
251 clocks = <&clks 179>; 254 clocks = <&clks 179>;
252 dmas = <&sdma 41 1 0>, 255 dmas = <&sdma 41 1 0>,
253 <&sdma 42 1 0>; 256 <&sdma 42 1 0>;
@@ -260,7 +263,7 @@
260 ssi3: ssi@02030000 { 263 ssi3: ssi@02030000 {
261 compatible = "fsl,imx6q-ssi","fsl,imx21-ssi"; 264 compatible = "fsl,imx6q-ssi","fsl,imx21-ssi";
262 reg = <0x02030000 0x4000>; 265 reg = <0x02030000 0x4000>;
263 interrupts = <0 48 0x04>; 266 interrupts = <0 48 IRQ_TYPE_LEVEL_HIGH>;
264 clocks = <&clks 180>; 267 clocks = <&clks 180>;
265 dmas = <&sdma 45 1 0>, 268 dmas = <&sdma 45 1 0>,
266 <&sdma 46 1 0>; 269 <&sdma 46 1 0>;
@@ -272,7 +275,7 @@
272 275
273 asrc: asrc@02034000 { 276 asrc: asrc@02034000 {
274 reg = <0x02034000 0x4000>; 277 reg = <0x02034000 0x4000>;
275 interrupts = <0 50 0x04>; 278 interrupts = <0 50 IRQ_TYPE_LEVEL_HIGH>;
276 }; 279 };
277 280
278 spba@0203c000 { 281 spba@0203c000 {
@@ -282,7 +285,8 @@
282 285
283 vpu: vpu@02040000 { 286 vpu: vpu@02040000 {
284 reg = <0x02040000 0x3c000>; 287 reg = <0x02040000 0x3c000>;
285 interrupts = <0 3 0x04 0 12 0x04>; 288 interrupts = <0 3 IRQ_TYPE_LEVEL_HIGH>,
289 <0 12 IRQ_TYPE_LEVEL_HIGH>;
286 }; 290 };
287 291
288 aipstz@0207c000 { /* AIPSTZ1 */ 292 aipstz@0207c000 { /* AIPSTZ1 */
@@ -293,7 +297,7 @@
293 #pwm-cells = <2>; 297 #pwm-cells = <2>;
294 compatible = "fsl,imx6q-pwm", "fsl,imx27-pwm"; 298 compatible = "fsl,imx6q-pwm", "fsl,imx27-pwm";
295 reg = <0x02080000 0x4000>; 299 reg = <0x02080000 0x4000>;
296 interrupts = <0 83 0x04>; 300 interrupts = <0 83 IRQ_TYPE_LEVEL_HIGH>;
297 clocks = <&clks 62>, <&clks 145>; 301 clocks = <&clks 62>, <&clks 145>;
298 clock-names = "ipg", "per"; 302 clock-names = "ipg", "per";
299 }; 303 };
@@ -302,7 +306,7 @@
302 #pwm-cells = <2>; 306 #pwm-cells = <2>;
303 compatible = "fsl,imx6q-pwm", "fsl,imx27-pwm"; 307 compatible = "fsl,imx6q-pwm", "fsl,imx27-pwm";
304 reg = <0x02084000 0x4000>; 308 reg = <0x02084000 0x4000>;
305 interrupts = <0 84 0x04>; 309 interrupts = <0 84 IRQ_TYPE_LEVEL_HIGH>;
306 clocks = <&clks 62>, <&clks 146>; 310 clocks = <&clks 62>, <&clks 146>;
307 clock-names = "ipg", "per"; 311 clock-names = "ipg", "per";
308 }; 312 };
@@ -311,7 +315,7 @@
311 #pwm-cells = <2>; 315 #pwm-cells = <2>;
312 compatible = "fsl,imx6q-pwm", "fsl,imx27-pwm"; 316 compatible = "fsl,imx6q-pwm", "fsl,imx27-pwm";
313 reg = <0x02088000 0x4000>; 317 reg = <0x02088000 0x4000>;
314 interrupts = <0 85 0x04>; 318 interrupts = <0 85 IRQ_TYPE_LEVEL_HIGH>;
315 clocks = <&clks 62>, <&clks 147>; 319 clocks = <&clks 62>, <&clks 147>;
316 clock-names = "ipg", "per"; 320 clock-names = "ipg", "per";
317 }; 321 };
@@ -320,7 +324,7 @@
320 #pwm-cells = <2>; 324 #pwm-cells = <2>;
321 compatible = "fsl,imx6q-pwm", "fsl,imx27-pwm"; 325 compatible = "fsl,imx6q-pwm", "fsl,imx27-pwm";
322 reg = <0x0208c000 0x4000>; 326 reg = <0x0208c000 0x4000>;
323 interrupts = <0 86 0x04>; 327 interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>;
324 clocks = <&clks 62>, <&clks 148>; 328 clocks = <&clks 62>, <&clks 148>;
325 clock-names = "ipg", "per"; 329 clock-names = "ipg", "per";
326 }; 330 };
@@ -328,7 +332,7 @@
328 can1: flexcan@02090000 { 332 can1: flexcan@02090000 {
329 compatible = "fsl,imx6q-flexcan"; 333 compatible = "fsl,imx6q-flexcan";
330 reg = <0x02090000 0x4000>; 334 reg = <0x02090000 0x4000>;
331 interrupts = <0 110 0x04>; 335 interrupts = <0 110 IRQ_TYPE_LEVEL_HIGH>;
332 clocks = <&clks 108>, <&clks 109>; 336 clocks = <&clks 108>, <&clks 109>;
333 clock-names = "ipg", "per"; 337 clock-names = "ipg", "per";
334 status = "disabled"; 338 status = "disabled";
@@ -337,7 +341,7 @@
337 can2: flexcan@02094000 { 341 can2: flexcan@02094000 {
338 compatible = "fsl,imx6q-flexcan"; 342 compatible = "fsl,imx6q-flexcan";
339 reg = <0x02094000 0x4000>; 343 reg = <0x02094000 0x4000>;
340 interrupts = <0 111 0x04>; 344 interrupts = <0 111 IRQ_TYPE_LEVEL_HIGH>;
341 clocks = <&clks 110>, <&clks 111>; 345 clocks = <&clks 110>, <&clks 111>;
342 clock-names = "ipg", "per"; 346 clock-names = "ipg", "per";
343 status = "disabled"; 347 status = "disabled";
@@ -346,7 +350,7 @@
346 gpt: gpt@02098000 { 350 gpt: gpt@02098000 {
347 compatible = "fsl,imx6q-gpt", "fsl,imx31-gpt"; 351 compatible = "fsl,imx6q-gpt", "fsl,imx31-gpt";
348 reg = <0x02098000 0x4000>; 352 reg = <0x02098000 0x4000>;
349 interrupts = <0 55 0x04>; 353 interrupts = <0 55 IRQ_TYPE_LEVEL_HIGH>;
350 clocks = <&clks 119>, <&clks 120>; 354 clocks = <&clks 119>, <&clks 120>;
351 clock-names = "ipg", "per"; 355 clock-names = "ipg", "per";
352 }; 356 };
@@ -354,7 +358,8 @@
354 gpio1: gpio@0209c000 { 358 gpio1: gpio@0209c000 {
355 compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio"; 359 compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio";
356 reg = <0x0209c000 0x4000>; 360 reg = <0x0209c000 0x4000>;
357 interrupts = <0 66 0x04 0 67 0x04>; 361 interrupts = <0 66 IRQ_TYPE_LEVEL_HIGH>,
362 <0 67 IRQ_TYPE_LEVEL_HIGH>;
358 gpio-controller; 363 gpio-controller;
359 #gpio-cells = <2>; 364 #gpio-cells = <2>;
360 interrupt-controller; 365 interrupt-controller;
@@ -364,7 +369,8 @@
364 gpio2: gpio@020a0000 { 369 gpio2: gpio@020a0000 {
365 compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio"; 370 compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio";
366 reg = <0x020a0000 0x4000>; 371 reg = <0x020a0000 0x4000>;
367 interrupts = <0 68 0x04 0 69 0x04>; 372 interrupts = <0 68 IRQ_TYPE_LEVEL_HIGH>,
373 <0 69 IRQ_TYPE_LEVEL_HIGH>;
368 gpio-controller; 374 gpio-controller;
369 #gpio-cells = <2>; 375 #gpio-cells = <2>;
370 interrupt-controller; 376 interrupt-controller;
@@ -374,7 +380,8 @@
374 gpio3: gpio@020a4000 { 380 gpio3: gpio@020a4000 {
375 compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio"; 381 compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio";
376 reg = <0x020a4000 0x4000>; 382 reg = <0x020a4000 0x4000>;
377 interrupts = <0 70 0x04 0 71 0x04>; 383 interrupts = <0 70 IRQ_TYPE_LEVEL_HIGH>,
384 <0 71 IRQ_TYPE_LEVEL_HIGH>;
378 gpio-controller; 385 gpio-controller;
379 #gpio-cells = <2>; 386 #gpio-cells = <2>;
380 interrupt-controller; 387 interrupt-controller;
@@ -384,7 +391,8 @@
384 gpio4: gpio@020a8000 { 391 gpio4: gpio@020a8000 {
385 compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio"; 392 compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio";
386 reg = <0x020a8000 0x4000>; 393 reg = <0x020a8000 0x4000>;
387 interrupts = <0 72 0x04 0 73 0x04>; 394 interrupts = <0 72 IRQ_TYPE_LEVEL_HIGH>,
395 <0 73 IRQ_TYPE_LEVEL_HIGH>;
388 gpio-controller; 396 gpio-controller;
389 #gpio-cells = <2>; 397 #gpio-cells = <2>;
390 interrupt-controller; 398 interrupt-controller;
@@ -394,7 +402,8 @@
394 gpio5: gpio@020ac000 { 402 gpio5: gpio@020ac000 {
395 compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio"; 403 compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio";
396 reg = <0x020ac000 0x4000>; 404 reg = <0x020ac000 0x4000>;
397 interrupts = <0 74 0x04 0 75 0x04>; 405 interrupts = <0 74 IRQ_TYPE_LEVEL_HIGH>,
406 <0 75 IRQ_TYPE_LEVEL_HIGH>;
398 gpio-controller; 407 gpio-controller;
399 #gpio-cells = <2>; 408 #gpio-cells = <2>;
400 interrupt-controller; 409 interrupt-controller;
@@ -404,7 +413,8 @@
404 gpio6: gpio@020b0000 { 413 gpio6: gpio@020b0000 {
405 compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio"; 414 compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio";
406 reg = <0x020b0000 0x4000>; 415 reg = <0x020b0000 0x4000>;
407 interrupts = <0 76 0x04 0 77 0x04>; 416 interrupts = <0 76 IRQ_TYPE_LEVEL_HIGH>,
417 <0 77 IRQ_TYPE_LEVEL_HIGH>;
408 gpio-controller; 418 gpio-controller;
409 #gpio-cells = <2>; 419 #gpio-cells = <2>;
410 interrupt-controller; 420 interrupt-controller;
@@ -414,7 +424,8 @@
414 gpio7: gpio@020b4000 { 424 gpio7: gpio@020b4000 {
415 compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio"; 425 compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio";
416 reg = <0x020b4000 0x4000>; 426 reg = <0x020b4000 0x4000>;
417 interrupts = <0 78 0x04 0 79 0x04>; 427 interrupts = <0 78 IRQ_TYPE_LEVEL_HIGH>,
428 <0 79 IRQ_TYPE_LEVEL_HIGH>;
418 gpio-controller; 429 gpio-controller;
419 #gpio-cells = <2>; 430 #gpio-cells = <2>;
420 interrupt-controller; 431 interrupt-controller;
@@ -423,20 +434,20 @@
423 434
424 kpp: kpp@020b8000 { 435 kpp: kpp@020b8000 {
425 reg = <0x020b8000 0x4000>; 436 reg = <0x020b8000 0x4000>;
426 interrupts = <0 82 0x04>; 437 interrupts = <0 82 IRQ_TYPE_LEVEL_HIGH>;
427 }; 438 };
428 439
429 wdog1: wdog@020bc000 { 440 wdog1: wdog@020bc000 {
430 compatible = "fsl,imx6q-wdt", "fsl,imx21-wdt"; 441 compatible = "fsl,imx6q-wdt", "fsl,imx21-wdt";
431 reg = <0x020bc000 0x4000>; 442 reg = <0x020bc000 0x4000>;
432 interrupts = <0 80 0x04>; 443 interrupts = <0 80 IRQ_TYPE_LEVEL_HIGH>;
433 clocks = <&clks 0>; 444 clocks = <&clks 0>;
434 }; 445 };
435 446
436 wdog2: wdog@020c0000 { 447 wdog2: wdog@020c0000 {
437 compatible = "fsl,imx6q-wdt", "fsl,imx21-wdt"; 448 compatible = "fsl,imx6q-wdt", "fsl,imx21-wdt";
438 reg = <0x020c0000 0x4000>; 449 reg = <0x020c0000 0x4000>;
439 interrupts = <0 81 0x04>; 450 interrupts = <0 81 IRQ_TYPE_LEVEL_HIGH>;
440 clocks = <&clks 0>; 451 clocks = <&clks 0>;
441 status = "disabled"; 452 status = "disabled";
442 }; 453 };
@@ -444,14 +455,17 @@
444 clks: ccm@020c4000 { 455 clks: ccm@020c4000 {
445 compatible = "fsl,imx6q-ccm"; 456 compatible = "fsl,imx6q-ccm";
446 reg = <0x020c4000 0x4000>; 457 reg = <0x020c4000 0x4000>;
447 interrupts = <0 87 0x04 0 88 0x04>; 458 interrupts = <0 87 IRQ_TYPE_LEVEL_HIGH>,
459 <0 88 IRQ_TYPE_LEVEL_HIGH>;
448 #clock-cells = <1>; 460 #clock-cells = <1>;
449 }; 461 };
450 462
451 anatop: anatop@020c8000 { 463 anatop: anatop@020c8000 {
452 compatible = "fsl,imx6q-anatop", "syscon", "simple-bus"; 464 compatible = "fsl,imx6q-anatop", "syscon", "simple-bus";
453 reg = <0x020c8000 0x1000>; 465 reg = <0x020c8000 0x1000>;
454 interrupts = <0 49 0x04 0 54 0x04 0 127 0x04>; 466 interrupts = <0 49 IRQ_TYPE_LEVEL_HIGH>,
467 <0 54 IRQ_TYPE_LEVEL_HIGH>,
468 <0 127 IRQ_TYPE_LEVEL_HIGH>;
455 469
456 regulator-1p1@110 { 470 regulator-1p1@110 {
457 compatible = "fsl,anatop-regulator"; 471 compatible = "fsl,anatop-regulator";
@@ -549,7 +563,7 @@
549 563
550 tempmon: tempmon { 564 tempmon: tempmon {
551 compatible = "fsl,imx6q-tempmon"; 565 compatible = "fsl,imx6q-tempmon";
552 interrupts = <0 49 0x04>; 566 interrupts = <0 49 IRQ_TYPE_LEVEL_HIGH>;
553 fsl,tempmon = <&anatop>; 567 fsl,tempmon = <&anatop>;
554 fsl,tempmon-data = <&ocotp>; 568 fsl,tempmon-data = <&ocotp>;
555 }; 569 };
@@ -557,14 +571,14 @@
557 usbphy1: usbphy@020c9000 { 571 usbphy1: usbphy@020c9000 {
558 compatible = "fsl,imx6q-usbphy", "fsl,imx23-usbphy"; 572 compatible = "fsl,imx6q-usbphy", "fsl,imx23-usbphy";
559 reg = <0x020c9000 0x1000>; 573 reg = <0x020c9000 0x1000>;
560 interrupts = <0 44 0x04>; 574 interrupts = <0 44 IRQ_TYPE_LEVEL_HIGH>;
561 clocks = <&clks 182>; 575 clocks = <&clks 182>;
562 }; 576 };
563 577
564 usbphy2: usbphy@020ca000 { 578 usbphy2: usbphy@020ca000 {
565 compatible = "fsl,imx6q-usbphy", "fsl,imx23-usbphy"; 579 compatible = "fsl,imx6q-usbphy", "fsl,imx23-usbphy";
566 reg = <0x020ca000 0x1000>; 580 reg = <0x020ca000 0x1000>;
567 interrupts = <0 45 0x04>; 581 interrupts = <0 45 IRQ_TYPE_LEVEL_HIGH>;
568 clocks = <&clks 183>; 582 clocks = <&clks 183>;
569 }; 583 };
570 584
@@ -577,31 +591,34 @@
577 snvs-rtc-lp@34 { 591 snvs-rtc-lp@34 {
578 compatible = "fsl,sec-v4.0-mon-rtc-lp"; 592 compatible = "fsl,sec-v4.0-mon-rtc-lp";
579 reg = <0x34 0x58>; 593 reg = <0x34 0x58>;
580 interrupts = <0 19 0x04 0 20 0x04>; 594 interrupts = <0 19 IRQ_TYPE_LEVEL_HIGH>,
595 <0 20 IRQ_TYPE_LEVEL_HIGH>;
581 }; 596 };
582 }; 597 };
583 598
584 epit1: epit@020d0000 { /* EPIT1 */ 599 epit1: epit@020d0000 { /* EPIT1 */
585 reg = <0x020d0000 0x4000>; 600 reg = <0x020d0000 0x4000>;
586 interrupts = <0 56 0x04>; 601 interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH>;
587 }; 602 };
588 603
589 epit2: epit@020d4000 { /* EPIT2 */ 604 epit2: epit@020d4000 { /* EPIT2 */
590 reg = <0x020d4000 0x4000>; 605 reg = <0x020d4000 0x4000>;
591 interrupts = <0 57 0x04>; 606 interrupts = <0 57 IRQ_TYPE_LEVEL_HIGH>;
592 }; 607 };
593 608
594 src: src@020d8000 { 609 src: src@020d8000 {
595 compatible = "fsl,imx6q-src", "fsl,imx51-src"; 610 compatible = "fsl,imx6q-src", "fsl,imx51-src";
596 reg = <0x020d8000 0x4000>; 611 reg = <0x020d8000 0x4000>;
597 interrupts = <0 91 0x04 0 96 0x04>; 612 interrupts = <0 91 IRQ_TYPE_LEVEL_HIGH>,
613 <0 96 IRQ_TYPE_LEVEL_HIGH>;
598 #reset-cells = <1>; 614 #reset-cells = <1>;
599 }; 615 };
600 616
601 gpc: gpc@020dc000 { 617 gpc: gpc@020dc000 {
602 compatible = "fsl,imx6q-gpc"; 618 compatible = "fsl,imx6q-gpc";
603 reg = <0x020dc000 0x4000>; 619 reg = <0x020dc000 0x4000>;
604 interrupts = <0 89 0x04 0 90 0x04>; 620 interrupts = <0 89 IRQ_TYPE_LEVEL_HIGH>,
621 <0 90 IRQ_TYPE_LEVEL_HIGH>;
605 }; 622 };
606 623
607 gpr: iomuxc-gpr@020e0000 { 624 gpr: iomuxc-gpr@020e0000 {
@@ -634,18 +651,18 @@
634 651
635 dcic1: dcic@020e4000 { 652 dcic1: dcic@020e4000 {
636 reg = <0x020e4000 0x4000>; 653 reg = <0x020e4000 0x4000>;
637 interrupts = <0 124 0x04>; 654 interrupts = <0 124 IRQ_TYPE_LEVEL_HIGH>;
638 }; 655 };
639 656
640 dcic2: dcic@020e8000 { 657 dcic2: dcic@020e8000 {
641 reg = <0x020e8000 0x4000>; 658 reg = <0x020e8000 0x4000>;
642 interrupts = <0 125 0x04>; 659 interrupts = <0 125 IRQ_TYPE_LEVEL_HIGH>;
643 }; 660 };
644 661
645 sdma: sdma@020ec000 { 662 sdma: sdma@020ec000 {
646 compatible = "fsl,imx6q-sdma", "fsl,imx35-sdma"; 663 compatible = "fsl,imx6q-sdma", "fsl,imx35-sdma";
647 reg = <0x020ec000 0x4000>; 664 reg = <0x020ec000 0x4000>;
648 interrupts = <0 2 0x04>; 665 interrupts = <0 2 IRQ_TYPE_LEVEL_HIGH>;
649 clocks = <&clks 155>, <&clks 155>; 666 clocks = <&clks 155>, <&clks 155>;
650 clock-names = "ipg", "ahb"; 667 clock-names = "ipg", "ahb";
651 #dma-cells = <3>; 668 #dma-cells = <3>;
@@ -662,7 +679,8 @@
662 679
663 caam@02100000 { 680 caam@02100000 {
664 reg = <0x02100000 0x40000>; 681 reg = <0x02100000 0x40000>;
665 interrupts = <0 105 0x04 0 106 0x04>; 682 interrupts = <0 105 IRQ_TYPE_LEVEL_HIGH>,
683 <0 106 IRQ_TYPE_LEVEL_HIGH>;
666 }; 684 };
667 685
668 aipstz@0217c000 { /* AIPSTZ2 */ 686 aipstz@0217c000 { /* AIPSTZ2 */
@@ -672,7 +690,7 @@
672 usbotg: usb@02184000 { 690 usbotg: usb@02184000 {
673 compatible = "fsl,imx6q-usb", "fsl,imx27-usb"; 691 compatible = "fsl,imx6q-usb", "fsl,imx27-usb";
674 reg = <0x02184000 0x200>; 692 reg = <0x02184000 0x200>;
675 interrupts = <0 43 0x04>; 693 interrupts = <0 43 IRQ_TYPE_LEVEL_HIGH>;
676 clocks = <&clks 162>; 694 clocks = <&clks 162>;
677 fsl,usbphy = <&usbphy1>; 695 fsl,usbphy = <&usbphy1>;
678 fsl,usbmisc = <&usbmisc 0>; 696 fsl,usbmisc = <&usbmisc 0>;
@@ -682,7 +700,7 @@
682 usbh1: usb@02184200 { 700 usbh1: usb@02184200 {
683 compatible = "fsl,imx6q-usb", "fsl,imx27-usb"; 701 compatible = "fsl,imx6q-usb", "fsl,imx27-usb";
684 reg = <0x02184200 0x200>; 702 reg = <0x02184200 0x200>;
685 interrupts = <0 40 0x04>; 703 interrupts = <0 40 IRQ_TYPE_LEVEL_HIGH>;
686 clocks = <&clks 162>; 704 clocks = <&clks 162>;
687 fsl,usbphy = <&usbphy2>; 705 fsl,usbphy = <&usbphy2>;
688 fsl,usbmisc = <&usbmisc 1>; 706 fsl,usbmisc = <&usbmisc 1>;
@@ -692,7 +710,7 @@
692 usbh2: usb@02184400 { 710 usbh2: usb@02184400 {
693 compatible = "fsl,imx6q-usb", "fsl,imx27-usb"; 711 compatible = "fsl,imx6q-usb", "fsl,imx27-usb";
694 reg = <0x02184400 0x200>; 712 reg = <0x02184400 0x200>;
695 interrupts = <0 41 0x04>; 713 interrupts = <0 41 IRQ_TYPE_LEVEL_HIGH>;
696 clocks = <&clks 162>; 714 clocks = <&clks 162>;
697 fsl,usbmisc = <&usbmisc 2>; 715 fsl,usbmisc = <&usbmisc 2>;
698 status = "disabled"; 716 status = "disabled";
@@ -701,7 +719,7 @@
701 usbh3: usb@02184600 { 719 usbh3: usb@02184600 {
702 compatible = "fsl,imx6q-usb", "fsl,imx27-usb"; 720 compatible = "fsl,imx6q-usb", "fsl,imx27-usb";
703 reg = <0x02184600 0x200>; 721 reg = <0x02184600 0x200>;
704 interrupts = <0 42 0x04>; 722 interrupts = <0 42 IRQ_TYPE_LEVEL_HIGH>;
705 clocks = <&clks 162>; 723 clocks = <&clks 162>;
706 fsl,usbmisc = <&usbmisc 3>; 724 fsl,usbmisc = <&usbmisc 3>;
707 status = "disabled"; 725 status = "disabled";
@@ -717,7 +735,8 @@
717 fec: ethernet@02188000 { 735 fec: ethernet@02188000 {
718 compatible = "fsl,imx6q-fec"; 736 compatible = "fsl,imx6q-fec";
719 reg = <0x02188000 0x4000>; 737 reg = <0x02188000 0x4000>;
720 interrupts = <0 118 0x04 0 119 0x04>; 738 interrupts = <0 118 IRQ_TYPE_LEVEL_HIGH>,
739 <0 119 IRQ_TYPE_LEVEL_HIGH>;
721 clocks = <&clks 117>, <&clks 117>, <&clks 190>; 740 clocks = <&clks 117>, <&clks 117>, <&clks 190>;
722 clock-names = "ipg", "ahb", "ptp"; 741 clock-names = "ipg", "ahb", "ptp";
723 status = "disabled"; 742 status = "disabled";
@@ -725,13 +744,15 @@
725 744
726 mlb@0218c000 { 745 mlb@0218c000 {
727 reg = <0x0218c000 0x4000>; 746 reg = <0x0218c000 0x4000>;
728 interrupts = <0 53 0x04 0 117 0x04 0 126 0x04>; 747 interrupts = <0 53 IRQ_TYPE_LEVEL_HIGH>,
748 <0 117 IRQ_TYPE_LEVEL_HIGH>,
749 <0 126 IRQ_TYPE_LEVEL_HIGH>;
729 }; 750 };
730 751
731 usdhc1: usdhc@02190000 { 752 usdhc1: usdhc@02190000 {
732 compatible = "fsl,imx6q-usdhc"; 753 compatible = "fsl,imx6q-usdhc";
733 reg = <0x02190000 0x4000>; 754 reg = <0x02190000 0x4000>;
734 interrupts = <0 22 0x04>; 755 interrupts = <0 22 IRQ_TYPE_LEVEL_HIGH>;
735 clocks = <&clks 163>, <&clks 163>, <&clks 163>; 756 clocks = <&clks 163>, <&clks 163>, <&clks 163>;
736 clock-names = "ipg", "ahb", "per"; 757 clock-names = "ipg", "ahb", "per";
737 bus-width = <4>; 758 bus-width = <4>;
@@ -741,7 +762,7 @@
741 usdhc2: usdhc@02194000 { 762 usdhc2: usdhc@02194000 {
742 compatible = "fsl,imx6q-usdhc"; 763 compatible = "fsl,imx6q-usdhc";
743 reg = <0x02194000 0x4000>; 764 reg = <0x02194000 0x4000>;
744 interrupts = <0 23 0x04>; 765 interrupts = <0 23 IRQ_TYPE_LEVEL_HIGH>;
745 clocks = <&clks 164>, <&clks 164>, <&clks 164>; 766 clocks = <&clks 164>, <&clks 164>, <&clks 164>;
746 clock-names = "ipg", "ahb", "per"; 767 clock-names = "ipg", "ahb", "per";
747 bus-width = <4>; 768 bus-width = <4>;
@@ -751,7 +772,7 @@
751 usdhc3: usdhc@02198000 { 772 usdhc3: usdhc@02198000 {
752 compatible = "fsl,imx6q-usdhc"; 773 compatible = "fsl,imx6q-usdhc";
753 reg = <0x02198000 0x4000>; 774 reg = <0x02198000 0x4000>;
754 interrupts = <0 24 0x04>; 775 interrupts = <0 24 IRQ_TYPE_LEVEL_HIGH>;
755 clocks = <&clks 165>, <&clks 165>, <&clks 165>; 776 clocks = <&clks 165>, <&clks 165>, <&clks 165>;
756 clock-names = "ipg", "ahb", "per"; 777 clock-names = "ipg", "ahb", "per";
757 bus-width = <4>; 778 bus-width = <4>;
@@ -761,7 +782,7 @@
761 usdhc4: usdhc@0219c000 { 782 usdhc4: usdhc@0219c000 {
762 compatible = "fsl,imx6q-usdhc"; 783 compatible = "fsl,imx6q-usdhc";
763 reg = <0x0219c000 0x4000>; 784 reg = <0x0219c000 0x4000>;
764 interrupts = <0 25 0x04>; 785 interrupts = <0 25 IRQ_TYPE_LEVEL_HIGH>;
765 clocks = <&clks 166>, <&clks 166>, <&clks 166>; 786 clocks = <&clks 166>, <&clks 166>, <&clks 166>;
766 clock-names = "ipg", "ahb", "per"; 787 clock-names = "ipg", "ahb", "per";
767 bus-width = <4>; 788 bus-width = <4>;
@@ -773,7 +794,7 @@
773 #size-cells = <0>; 794 #size-cells = <0>;
774 compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c"; 795 compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c";
775 reg = <0x021a0000 0x4000>; 796 reg = <0x021a0000 0x4000>;
776 interrupts = <0 36 0x04>; 797 interrupts = <0 36 IRQ_TYPE_LEVEL_HIGH>;
777 clocks = <&clks 125>; 798 clocks = <&clks 125>;
778 status = "disabled"; 799 status = "disabled";
779 }; 800 };
@@ -783,7 +804,7 @@
783 #size-cells = <0>; 804 #size-cells = <0>;
784 compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c"; 805 compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c";
785 reg = <0x021a4000 0x4000>; 806 reg = <0x021a4000 0x4000>;
786 interrupts = <0 37 0x04>; 807 interrupts = <0 37 IRQ_TYPE_LEVEL_HIGH>;
787 clocks = <&clks 126>; 808 clocks = <&clks 126>;
788 status = "disabled"; 809 status = "disabled";
789 }; 810 };
@@ -793,7 +814,7 @@
793 #size-cells = <0>; 814 #size-cells = <0>;
794 compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c"; 815 compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c";
795 reg = <0x021a8000 0x4000>; 816 reg = <0x021a8000 0x4000>;
796 interrupts = <0 38 0x04>; 817 interrupts = <0 38 IRQ_TYPE_LEVEL_HIGH>;
797 clocks = <&clks 127>; 818 clocks = <&clks 127>;
798 status = "disabled"; 819 status = "disabled";
799 }; 820 };
@@ -814,7 +835,7 @@
814 weim: weim@021b8000 { 835 weim: weim@021b8000 {
815 compatible = "fsl,imx6q-weim"; 836 compatible = "fsl,imx6q-weim";
816 reg = <0x021b8000 0x4000>; 837 reg = <0x021b8000 0x4000>;
817 interrupts = <0 14 0x04>; 838 interrupts = <0 14 IRQ_TYPE_LEVEL_HIGH>;
818 clocks = <&clks 196>; 839 clocks = <&clks 196>;
819 }; 840 };
820 841
@@ -825,12 +846,12 @@
825 846
826 tzasc@021d0000 { /* TZASC1 */ 847 tzasc@021d0000 { /* TZASC1 */
827 reg = <0x021d0000 0x4000>; 848 reg = <0x021d0000 0x4000>;
828 interrupts = <0 108 0x04>; 849 interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>;
829 }; 850 };
830 851
831 tzasc@021d4000 { /* TZASC2 */ 852 tzasc@021d4000 { /* TZASC2 */
832 reg = <0x021d4000 0x4000>; 853 reg = <0x021d4000 0x4000>;
833 interrupts = <0 109 0x04>; 854 interrupts = <0 109 IRQ_TYPE_LEVEL_HIGH>;
834 }; 855 };
835 856
836 audmux: audmux@021d8000 { 857 audmux: audmux@021d8000 {
@@ -849,13 +870,13 @@
849 870
850 vdoa@021e4000 { 871 vdoa@021e4000 {
851 reg = <0x021e4000 0x4000>; 872 reg = <0x021e4000 0x4000>;
852 interrupts = <0 18 0x04>; 873 interrupts = <0 18 IRQ_TYPE_LEVEL_HIGH>;
853 }; 874 };
854 875
855 uart2: serial@021e8000 { 876 uart2: serial@021e8000 {
856 compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; 877 compatible = "fsl,imx6q-uart", "fsl,imx21-uart";
857 reg = <0x021e8000 0x4000>; 878 reg = <0x021e8000 0x4000>;
858 interrupts = <0 27 0x04>; 879 interrupts = <0 27 IRQ_TYPE_LEVEL_HIGH>;
859 clocks = <&clks 160>, <&clks 161>; 880 clocks = <&clks 160>, <&clks 161>;
860 clock-names = "ipg", "per"; 881 clock-names = "ipg", "per";
861 dmas = <&sdma 27 4 0>, <&sdma 28 4 0>; 882 dmas = <&sdma 27 4 0>, <&sdma 28 4 0>;
@@ -866,7 +887,7 @@
866 uart3: serial@021ec000 { 887 uart3: serial@021ec000 {
867 compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; 888 compatible = "fsl,imx6q-uart", "fsl,imx21-uart";
868 reg = <0x021ec000 0x4000>; 889 reg = <0x021ec000 0x4000>;
869 interrupts = <0 28 0x04>; 890 interrupts = <0 28 IRQ_TYPE_LEVEL_HIGH>;
870 clocks = <&clks 160>, <&clks 161>; 891 clocks = <&clks 160>, <&clks 161>;
871 clock-names = "ipg", "per"; 892 clock-names = "ipg", "per";
872 dmas = <&sdma 29 4 0>, <&sdma 30 4 0>; 893 dmas = <&sdma 29 4 0>, <&sdma 30 4 0>;
@@ -877,7 +898,7 @@
877 uart4: serial@021f0000 { 898 uart4: serial@021f0000 {
878 compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; 899 compatible = "fsl,imx6q-uart", "fsl,imx21-uart";
879 reg = <0x021f0000 0x4000>; 900 reg = <0x021f0000 0x4000>;
880 interrupts = <0 29 0x04>; 901 interrupts = <0 29 IRQ_TYPE_LEVEL_HIGH>;
881 clocks = <&clks 160>, <&clks 161>; 902 clocks = <&clks 160>, <&clks 161>;
882 clock-names = "ipg", "per"; 903 clock-names = "ipg", "per";
883 dmas = <&sdma 31 4 0>, <&sdma 32 4 0>; 904 dmas = <&sdma 31 4 0>, <&sdma 32 4 0>;
@@ -888,7 +909,7 @@
888 uart5: serial@021f4000 { 909 uart5: serial@021f4000 {
889 compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; 910 compatible = "fsl,imx6q-uart", "fsl,imx21-uart";
890 reg = <0x021f4000 0x4000>; 911 reg = <0x021f4000 0x4000>;
891 interrupts = <0 30 0x04>; 912 interrupts = <0 30 IRQ_TYPE_LEVEL_HIGH>;
892 clocks = <&clks 160>, <&clks 161>; 913 clocks = <&clks 160>, <&clks 161>;
893 clock-names = "ipg", "per"; 914 clock-names = "ipg", "per";
894 dmas = <&sdma 33 4 0>, <&sdma 34 4 0>; 915 dmas = <&sdma 33 4 0>, <&sdma 34 4 0>;
@@ -901,7 +922,8 @@
901 #crtc-cells = <1>; 922 #crtc-cells = <1>;
902 compatible = "fsl,imx6q-ipu"; 923 compatible = "fsl,imx6q-ipu";
903 reg = <0x02400000 0x400000>; 924 reg = <0x02400000 0x400000>;
904 interrupts = <0 6 0x4 0 5 0x4>; 925 interrupts = <0 6 IRQ_TYPE_LEVEL_HIGH>,
926 <0 5 IRQ_TYPE_LEVEL_HIGH>;
905 clocks = <&clks 130>, <&clks 131>, <&clks 132>; 927 clocks = <&clks 130>, <&clks 131>, <&clks 132>;
906 clock-names = "bus", "di0", "di1"; 928 clock-names = "bus", "di0", "di1";
907 resets = <&src 2>; 929 resets = <&src 2>;
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-25 13:18:05 -0500