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authorTero Kristo <t-kristo@ti.com>2015-02-12 04:32:14 -0500
committerTero Kristo <t-kristo@ti.com>2015-03-31 14:26:56 -0400
commit7415b0b4c645fe9897352f144f056fd557526667 (patch)
treec166ec9d3e421a987b6bdb7e06e7e6cd417fd771 /arch/arm/boot/dts
parent83a5d6c98af24bb4531dfc05e7c2d3ac2562c6d9 (diff)
ARM: dts: omap4: add minimal l4 bus layout with control module support
This patch creates the l4_cfg and l4_wkup interconnects for OMAP4, and moves some of the generic peripherals under it. System control module support is added to the device tree also, and the existing SCM related functionality is moved under it. Signed-off-by: Tero Kristo <t-kristo@ti.com> Reported-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/boot/dts')
-rw-r--r--arch/arm/boot/dts/omap4.dtsi200
1 files changed, 121 insertions, 79 deletions
diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi
index 074147cebae4..546681a9cb65 100644
--- a/arch/arm/boot/dts/omap4.dtsi
+++ b/arch/arm/boot/dts/omap4.dtsi
@@ -114,99 +114,141 @@
114 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>, 114 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
115 <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 115 <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
116 116
117 cm1: cm1@4a004000 { 117 l4_cfg: l4@4a000000 {
118 compatible = "ti,omap4-cm1"; 118 compatible = "ti,omap4-l4-cfg", "simple-bus";
119 reg = <0x4a004000 0x2000>; 119 #address-cells = <1>;
120 120 #size-cells = <1>;
121 cm1_clocks: clocks { 121 ranges = <0 0x4a000000 0x1000000>;
122 #address-cells = <1>;
123 #size-cells = <0>;
124 };
125 122
126 cm1_clockdomains: clockdomains { 123 cm1: cm1@4000 {
127 }; 124 compatible = "ti,omap4-cm1";
128 }; 125 reg = <0x4000 0x2000>;
129 126
130 prm: prm@4a306000 { 127 cm1_clocks: clocks {
131 compatible = "ti,omap4-prm"; 128 #address-cells = <1>;
132 reg = <0x4a306000 0x3000>; 129 #size-cells = <0>;
133 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; 130 };
134 131
135 prm_clocks: clocks { 132 cm1_clockdomains: clockdomains {
136 #address-cells = <1>; 133 };
137 #size-cells = <0>;
138 }; 134 };
139 135
140 prm_clockdomains: clockdomains { 136 cm2: cm2@8000 {
141 }; 137 compatible = "ti,omap4-cm2";
142 }; 138 reg = <0x8000 0x3000>;
143 139
144 cm2: cm2@4a008000 { 140 cm2_clocks: clocks {
145 compatible = "ti,omap4-cm2"; 141 #address-cells = <1>;
146 reg = <0x4a008000 0x3000>; 142 #size-cells = <0>;
143 };
147 144
148 cm2_clocks: clocks { 145 cm2_clockdomains: clockdomains {
149 #address-cells = <1>; 146 };
150 #size-cells = <0>;
151 }; 147 };
152 148
153 cm2_clockdomains: clockdomains { 149 omap4_scm_core: scm@2000 {
150 compatible = "ti,omap4-scm-core", "simple-bus";
151 reg = <0x2000 0x1000>;
152 #address-cells = <1>;
153 #size-cells = <1>;
154 ranges = <0 0x2000 0x1000>;
155
156 scm_conf: scm_conf@0 {
157 compatible = "syscon";
158 reg = <0x0 0x800>;
159 #address-cells = <1>;
160 #size-cells = <1>;
161 };
154 }; 162 };
155 };
156
157 scrm: scrm@4a30a000 {
158 compatible = "ti,omap4-scrm";
159 reg = <0x4a30a000 0x2000>;
160 163
161 scrm_clocks: clocks { 164 omap4_padconf_core: scm@100000 {
165 compatible = "ti,omap4-scm-padconf-core",
166 "simple-bus";
162 #address-cells = <1>; 167 #address-cells = <1>;
163 #size-cells = <0>; 168 #size-cells = <1>;
169 ranges = <0 0x100000 0x1000>;
170
171 omap4_pmx_core: pinmux@40 {
172 compatible = "ti,omap4-padconf",
173 "pinctrl-single";
174 reg = <0x40 0x0196>;
175 #address-cells = <1>;
176 #size-cells = <0>;
177 #interrupt-cells = <1>;
178 interrupt-controller;
179 pinctrl-single,register-width = <16>;
180 pinctrl-single,function-mask = <0x7fff>;
181 };
182
183 omap4_padconf_global: omap4_padconf_global@5a0 {
184 compatible = "syscon";
185 reg = <0x5a0 0x170>;
186 #address-cells = <1>;
187 #size-cells = <1>;
188
189 pbias_regulator: pbias_regulator {
190 compatible = "ti,pbias-omap";
191 reg = <0x60 0x4>;
192 syscon = <&omap4_padconf_global>;
193 pbias_mmc_reg: pbias_mmc_omap4 {
194 regulator-name = "pbias_mmc_omap4";
195 regulator-min-microvolt = <1800000>;
196 regulator-max-microvolt = <3000000>;
197 };
198 };
199 };
164 }; 200 };
165 201
166 scrm_clockdomains: clockdomains { 202 l4_wkup: l4@300000 {
167 }; 203 compatible = "ti,omap4-l4-wkup", "simple-bus";
168 }; 204 #address-cells = <1>;
169 205 #size-cells = <1>;
170 counter32k: counter@4a304000 { 206 ranges = <0 0x300000 0x40000>;
171 compatible = "ti,omap-counter32k"; 207
172 reg = <0x4a304000 0x20>; 208 counter32k: counter@4000 {
173 ti,hwmods = "counter_32k"; 209 compatible = "ti,omap-counter32k";
174 }; 210 reg = <0x4000 0x20>;
175 211 ti,hwmods = "counter_32k";
176 omap4_pmx_core: pinmux@4a100040 { 212 };
177 compatible = "ti,omap4-padconf", "pinctrl-single"; 213
178 reg = <0x4a100040 0x0196>; 214 prm: prm@6000 {
179 #address-cells = <1>; 215 compatible = "ti,omap4-prm";
180 #size-cells = <0>; 216 reg = <0x6000 0x3000>;
181 #interrupt-cells = <1>; 217 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
182 interrupt-controller; 218
183 pinctrl-single,register-width = <16>; 219 prm_clocks: clocks {
184 pinctrl-single,function-mask = <0x7fff>; 220 #address-cells = <1>;
185 }; 221 #size-cells = <0>;
186 omap4_pmx_wkup: pinmux@4a31e040 { 222 };
187 compatible = "ti,omap4-padconf", "pinctrl-single"; 223
188 reg = <0x4a31e040 0x0038>; 224 prm_clockdomains: clockdomains {
189 #address-cells = <1>; 225 };
190 #size-cells = <0>; 226 };
191 #interrupt-cells = <1>; 227
192 interrupt-controller; 228 scrm: scrm@a000 {
193 pinctrl-single,register-width = <16>; 229 compatible = "ti,omap4-scrm";
194 pinctrl-single,function-mask = <0x7fff>; 230 reg = <0xa000 0x2000>;
195 }; 231
196 232 scrm_clocks: clocks {
197 omap4_padconf_global: tisyscon@4a1005a0 { 233 #address-cells = <1>;
198 compatible = "syscon"; 234 #size-cells = <0>;
199 reg = <0x4a1005a0 0x170>; 235 };
200 }; 236
201 237 scrm_clockdomains: clockdomains {
202 pbias_regulator: pbias_regulator { 238 };
203 compatible = "ti,pbias-omap"; 239 };
204 reg = <0x60 0x4>; 240
205 syscon = <&omap4_padconf_global>; 241 omap4_pmx_wkup: pinmux@1e040 {
206 pbias_mmc_reg: pbias_mmc_omap4 { 242 compatible = "ti,omap4-padconf",
207 regulator-name = "pbias_mmc_omap4"; 243 "pinctrl-single";
208 regulator-min-microvolt = <1800000>; 244 reg = <0x1e040 0x0038>;
209 regulator-max-microvolt = <3000000>; 245 #address-cells = <1>;
246 #size-cells = <0>;
247 #interrupt-cells = <1>;
248 interrupt-controller;
249 pinctrl-single,register-width = <16>;
250 pinctrl-single,function-mask = <0x7fff>;
251 };
210 }; 252 };
211 }; 253 };
212 254