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authorStefan Agner <stefan@agner.ch>2015-03-30 00:10:39 -0400
committerShawn Guo <shawn.guo@linaro.org>2015-03-30 07:22:12 -0400
commit53f643d23b6025fc4ddfbb0370d56aa8745bd85c (patch)
tree60e16fba722ca0d1638bebef7046089a85ac2473 /arch/arm/boot/dts
parent3274af07c924fbb682bd4a8eb25bcf41f899d50a (diff)
ARM: dts: vf610: fix missing irqs
While adding the MSCM interrupt router, all interrupts have been moved to vfxxx.dtsi again. However, some properties got lost. Readd the missing interrupt properties. Fixes: 97e6466ab9d0 ("ARM: dts: vf610: add Miscellaneous System Control Module (MSCM)") Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Diffstat (limited to 'arch/arm/boot/dts')
-rw-r--r--arch/arm/boot/dts/vfxxx.dtsi2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/vfxxx.dtsi b/arch/arm/boot/dts/vfxxx.dtsi
index e2536a4570fc..4aa335166be7 100644
--- a/arch/arm/boot/dts/vfxxx.dtsi
+++ b/arch/arm/boot/dts/vfxxx.dtsi
@@ -377,6 +377,7 @@
377 src: src@4006e000 { 377 src: src@4006e000 {
378 compatible = "fsl,vf610-src", "syscon"; 378 compatible = "fsl,vf610-src", "syscon";
379 reg = <0x4006e000 0x1000>; 379 reg = <0x4006e000 0x1000>;
380 interrupts = <96 IRQ_TYPE_LEVEL_HIGH>;
380 }; 381 };
381 }; 382 };
382 383
@@ -411,6 +412,7 @@
411 snvsrtc: snvs-rtc-lp@34 { 412 snvsrtc: snvs-rtc-lp@34 {
412 compatible = "fsl,sec-v4.0-mon-rtc-lp"; 413 compatible = "fsl,sec-v4.0-mon-rtc-lp";
413 reg = <0x34 0x58>; 414 reg = <0x34 0x58>;
415 interrupts = <100 IRQ_TYPE_LEVEL_HIGH>;
414 clocks = <&clks VF610_CLK_SNVS>; 416 clocks = <&clks VF610_CLK_SNVS>;
415 clock-names = "snvs-rtc"; 417 clock-names = "snvs-rtc";
416 }; 418 };