diff options
author | Alexandre Belloni <alexandre.belloni@free-electrons.com> | 2014-05-12 16:07:35 -0400 |
---|---|---|
committer | Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> | 2014-05-19 17:02:29 -0400 |
commit | 414dcf8f30fb966490a08c6f2bb581a745395309 (patch) | |
tree | 1dfa56a5ba73ea3a0b45c87b2d8cdc286b469a90 /arch/arm/boot/dts | |
parent | 36601dbf69084143446516a2412db4c5e8bb7b72 (diff) |
ARM: dts: berlin: convert BG2Q to DT clock nodes
This converts Berlin BG2Q SoC dtsi to make use of the new DT clock
nodes for Berlin SoCs.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Diffstat (limited to 'arch/arm/boot/dts')
-rw-r--r-- | arch/arm/boot/dts/berlin2q.dtsi | 54 |
1 files changed, 19 insertions, 35 deletions
diff --git a/arch/arm/boot/dts/berlin2q.dtsi b/arch/arm/boot/dts/berlin2q.dtsi index 52c7d644e492..cd3287c95f1a 100644 --- a/arch/arm/boot/dts/berlin2q.dtsi +++ b/arch/arm/boot/dts/berlin2q.dtsi | |||
@@ -6,6 +6,7 @@ | |||
6 | * warranty of any kind, whether express or implied. | 6 | * warranty of any kind, whether express or implied. |
7 | */ | 7 | */ |
8 | 8 | ||
9 | #include <dt-bindings/clock/berlin2q.h> | ||
9 | #include <dt-bindings/interrupt-controller/arm-gic.h> | 10 | #include <dt-bindings/interrupt-controller/arm-gic.h> |
10 | 11 | ||
11 | #include "skeleton.dtsi" | 12 | #include "skeleton.dtsi" |
@@ -47,32 +48,12 @@ | |||
47 | }; | 48 | }; |
48 | }; | 49 | }; |
49 | 50 | ||
50 | smclk: sysmgr-clock { | 51 | refclk: oscillator { |
51 | compatible = "fixed-clock"; | 52 | compatible = "fixed-clock"; |
52 | #clock-cells = <0>; | 53 | #clock-cells = <0>; |
53 | clock-frequency = <25000000>; | 54 | clock-frequency = <25000000>; |
54 | }; | 55 | }; |
55 | 56 | ||
56 | cfgclk: config-clock { | ||
57 | compatible = "fixed-clock"; | ||
58 | #clock-cells = <0>; | ||
59 | clock-frequency = <100000000>; | ||
60 | }; | ||
61 | |||
62 | cpuclk: cpu-clock { | ||
63 | compatible = "fixed-clock"; | ||
64 | #clock-cells = <0>; | ||
65 | clock-frequency = <1200000000>; | ||
66 | }; | ||
67 | |||
68 | twdclk: twdclk { | ||
69 | compatible = "fixed-factor-clock"; | ||
70 | #clock-cells = <0>; | ||
71 | clocks = <&cpuclk>; | ||
72 | clock-mult = <1>; | ||
73 | clock-div = <3>; | ||
74 | }; | ||
75 | |||
76 | soc { | 57 | soc { |
77 | compatible = "simple-bus"; | 58 | compatible = "simple-bus"; |
78 | #address-cells = <1>; | 59 | #address-cells = <1>; |
@@ -95,7 +76,7 @@ | |||
95 | local-timer@ad0600 { | 76 | local-timer@ad0600 { |
96 | compatible = "arm,cortex-a9-twd-timer"; | 77 | compatible = "arm,cortex-a9-twd-timer"; |
97 | reg = <0xad0600 0x20>; | 78 | reg = <0xad0600 0x20>; |
98 | clocks = <&twdclk>; | 79 | clocks = <&chip CLKID_TWD>; |
99 | interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>; | 80 | interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>; |
100 | }; | 81 | }; |
101 | 82 | ||
@@ -189,7 +170,7 @@ | |||
189 | timer0: timer@2c00 { | 170 | timer0: timer@2c00 { |
190 | compatible = "snps,dw-apb-timer"; | 171 | compatible = "snps,dw-apb-timer"; |
191 | reg = <0x2c00 0x14>; | 172 | reg = <0x2c00 0x14>; |
192 | clocks = <&cfgclk>; | 173 | clocks = <&chip CLKID_CFG>; |
193 | clock-names = "timer"; | 174 | clock-names = "timer"; |
194 | interrupts = <8>; | 175 | interrupts = <8>; |
195 | }; | 176 | }; |
@@ -197,7 +178,7 @@ | |||
197 | timer1: timer@2c14 { | 178 | timer1: timer@2c14 { |
198 | compatible = "snps,dw-apb-timer"; | 179 | compatible = "snps,dw-apb-timer"; |
199 | reg = <0x2c14 0x14>; | 180 | reg = <0x2c14 0x14>; |
200 | clocks = <&cfgclk>; | 181 | clocks = <&chip CLKID_CFG>; |
201 | clock-names = "timer"; | 182 | clock-names = "timer"; |
202 | status = "disabled"; | 183 | status = "disabled"; |
203 | }; | 184 | }; |
@@ -205,7 +186,7 @@ | |||
205 | timer2: timer@2c28 { | 186 | timer2: timer@2c28 { |
206 | compatible = "snps,dw-apb-timer"; | 187 | compatible = "snps,dw-apb-timer"; |
207 | reg = <0x2c28 0x14>; | 188 | reg = <0x2c28 0x14>; |
208 | clocks = <&cfgclk>; | 189 | clocks = <&chip CLKID_CFG>; |
209 | clock-names = "timer"; | 190 | clock-names = "timer"; |
210 | status = "disabled"; | 191 | status = "disabled"; |
211 | }; | 192 | }; |
@@ -213,7 +194,7 @@ | |||
213 | timer3: timer@2c3c { | 194 | timer3: timer@2c3c { |
214 | compatible = "snps,dw-apb-timer"; | 195 | compatible = "snps,dw-apb-timer"; |
215 | reg = <0x2c3c 0x14>; | 196 | reg = <0x2c3c 0x14>; |
216 | clocks = <&cfgclk>; | 197 | clocks = <&chip CLKID_CFG>; |
217 | clock-names = "timer"; | 198 | clock-names = "timer"; |
218 | status = "disabled"; | 199 | status = "disabled"; |
219 | }; | 200 | }; |
@@ -221,7 +202,7 @@ | |||
221 | timer4: timer@2c50 { | 202 | timer4: timer@2c50 { |
222 | compatible = "snps,dw-apb-timer"; | 203 | compatible = "snps,dw-apb-timer"; |
223 | reg = <0x2c50 0x14>; | 204 | reg = <0x2c50 0x14>; |
224 | clocks = <&cfgclk>; | 205 | clocks = <&chip CLKID_CFG>; |
225 | clock-names = "timer"; | 206 | clock-names = "timer"; |
226 | status = "disabled"; | 207 | status = "disabled"; |
227 | }; | 208 | }; |
@@ -229,7 +210,7 @@ | |||
229 | timer5: timer@2c64 { | 210 | timer5: timer@2c64 { |
230 | compatible = "snps,dw-apb-timer"; | 211 | compatible = "snps,dw-apb-timer"; |
231 | reg = <0x2c64 0x14>; | 212 | reg = <0x2c64 0x14>; |
232 | clocks = <&cfgclk>; | 213 | clocks = <&chip CLKID_CFG>; |
233 | clock-names = "timer"; | 214 | clock-names = "timer"; |
234 | status = "disabled"; | 215 | status = "disabled"; |
235 | }; | 216 | }; |
@@ -237,7 +218,7 @@ | |||
237 | timer6: timer@2c78 { | 218 | timer6: timer@2c78 { |
238 | compatible = "snps,dw-apb-timer"; | 219 | compatible = "snps,dw-apb-timer"; |
239 | reg = <0x2c78 0x14>; | 220 | reg = <0x2c78 0x14>; |
240 | clocks = <&cfgclk>; | 221 | clocks = <&chip CLKID_CFG>; |
241 | clock-names = "timer"; | 222 | clock-names = "timer"; |
242 | status = "disabled"; | 223 | status = "disabled"; |
243 | }; | 224 | }; |
@@ -245,7 +226,7 @@ | |||
245 | timer7: timer@2c8c { | 226 | timer7: timer@2c8c { |
246 | compatible = "snps,dw-apb-timer"; | 227 | compatible = "snps,dw-apb-timer"; |
247 | reg = <0x2c8c 0x14>; | 228 | reg = <0x2c8c 0x14>; |
248 | clocks = <&cfgclk>; | 229 | clocks = <&chip CLKID_CFG>; |
249 | clock-names = "timer"; | 230 | clock-names = "timer"; |
250 | status = "disabled"; | 231 | status = "disabled"; |
251 | }; | 232 | }; |
@@ -290,9 +271,12 @@ | |||
290 | }; | 271 | }; |
291 | }; | 272 | }; |
292 | 273 | ||
293 | generic-regs@ea0110 { | 274 | chip: chip-control@ea0000 { |
294 | compatible = "marvell,berlin-generic-regs", "syscon"; | 275 | compatible = "marvell,berlin2q-chip-ctrl"; |
295 | reg = <0xea0110 0x10>; | 276 | #clock-cells = <1>; |
277 | reg = <0xea0000 0x400>, <0xdd0170 0x10>; | ||
278 | clocks = <&refclk>; | ||
279 | clock-names = "refclk"; | ||
296 | }; | 280 | }; |
297 | 281 | ||
298 | apb@fc0000 { | 282 | apb@fc0000 { |
@@ -308,7 +292,7 @@ | |||
308 | reg = <0x9000 0x100>; | 292 | reg = <0x9000 0x100>; |
309 | interrupt-parent = <&sic>; | 293 | interrupt-parent = <&sic>; |
310 | interrupts = <8>; | 294 | interrupts = <8>; |
311 | clocks = <&smclk>; | 295 | clocks = <&refclk>; |
312 | reg-shift = <2>; | 296 | reg-shift = <2>; |
313 | status = "disabled"; | 297 | status = "disabled"; |
314 | }; | 298 | }; |
@@ -318,7 +302,7 @@ | |||
318 | reg = <0xa000 0x100>; | 302 | reg = <0xa000 0x100>; |
319 | interrupt-parent = <&sic>; | 303 | interrupt-parent = <&sic>; |
320 | interrupts = <9>; | 304 | interrupts = <9>; |
321 | clocks = <&smclk>; | 305 | clocks = <&refclk>; |
322 | reg-shift = <2>; | 306 | reg-shift = <2>; |
323 | status = "disabled"; | 307 | status = "disabled"; |
324 | }; | 308 | }; |