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authorMaxime Ripard <maxime.ripard@free-electrons.com>2014-12-16 16:59:58 -0500
committerMaxime Ripard <maxime.ripard@free-electrons.com>2015-01-21 03:58:57 -0500
commit19882b84d7d9b1888b03f35b2430de550b61e49d (patch)
tree792d6de0dc79756d987d74b749c25e59338036b0 /arch/arm/boot/dts
parent092a0c3b18ce8f2207591846dad5c9071ed2f832 (diff)
ARM: sunxi: DT: Convert the DTs to use the GIC headers
The GIC requires some extra opaque arguments to set the IRQ type and flags. Convert the DTs to using the common defines. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Diffstat (limited to 'arch/arm/boot/dts')
-rw-r--r--arch/arm/boot/dts/sun6i-a31.dtsi99
-rw-r--r--arch/arm/boot/dts/sun7i-a20.dtsi108
-rw-r--r--arch/arm/boot/dts/sun8i-a23.dtsi47
-rw-r--r--arch/arm/boot/dts/sun9i-a80.dtsi52
4 files changed, 158 insertions, 148 deletions
diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6i-a31.dtsi
index 6d53d38ebde1..97b6c3393099 100644
--- a/arch/arm/boot/dts/sun6i-a31.dtsi
+++ b/arch/arm/boot/dts/sun6i-a31.dtsi
@@ -49,6 +49,8 @@
49 49
50#include "skeleton.dtsi" 50#include "skeleton.dtsi"
51 51
52#include <dt-bindings/interrupt-controller/arm-gic.h>
53
52#include <dt-bindings/pinctrl/sun4i-a10.h> 54#include <dt-bindings/pinctrl/sun4i-a10.h>
53 55
54/ { 56/ {
@@ -113,10 +115,10 @@
113 115
114 pmu { 116 pmu {
115 compatible = "arm,cortex-a7-pmu", "arm,cortex-a15-pmu"; 117 compatible = "arm,cortex-a7-pmu", "arm,cortex-a15-pmu";
116 interrupts = <0 120 4>, 118 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
117 <0 121 4>, 119 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
118 <0 122 4>, 120 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
119 <0 123 4>; 121 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
120 }; 122 };
121 123
122 clocks { 124 clocks {
@@ -363,7 +365,7 @@
363 dma: dma-controller@01c02000 { 365 dma: dma-controller@01c02000 {
364 compatible = "allwinner,sun6i-a31-dma"; 366 compatible = "allwinner,sun6i-a31-dma";
365 reg = <0x01c02000 0x1000>; 367 reg = <0x01c02000 0x1000>;
366 interrupts = <0 50 4>; 368 interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
367 clocks = <&ahb1_gates 6>; 369 clocks = <&ahb1_gates 6>;
368 resets = <&ahb1_rst 6>; 370 resets = <&ahb1_rst 6>;
369 #dma-cells = <1>; 371 #dma-cells = <1>;
@@ -380,7 +382,7 @@
380 clock-names = "ahb", "mmc"; 382 clock-names = "ahb", "mmc";
381 resets = <&ahb1_rst 8>; 383 resets = <&ahb1_rst 8>;
382 reset-names = "ahb"; 384 reset-names = "ahb";
383 interrupts = <0 60 4>; 385 interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
384 status = "disabled"; 386 status = "disabled";
385 }; 387 };
386 388
@@ -391,7 +393,7 @@
391 clock-names = "ahb", "mmc"; 393 clock-names = "ahb", "mmc";
392 resets = <&ahb1_rst 9>; 394 resets = <&ahb1_rst 9>;
393 reset-names = "ahb"; 395 reset-names = "ahb";
394 interrupts = <0 61 4>; 396 interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
395 status = "disabled"; 397 status = "disabled";
396 }; 398 };
397 399
@@ -402,7 +404,7 @@
402 clock-names = "ahb", "mmc"; 404 clock-names = "ahb", "mmc";
403 resets = <&ahb1_rst 10>; 405 resets = <&ahb1_rst 10>;
404 reset-names = "ahb"; 406 reset-names = "ahb";
405 interrupts = <0 62 4>; 407 interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
406 status = "disabled"; 408 status = "disabled";
407 }; 409 };
408 410
@@ -413,7 +415,7 @@
413 clock-names = "ahb", "mmc"; 415 clock-names = "ahb", "mmc";
414 resets = <&ahb1_rst 11>; 416 resets = <&ahb1_rst 11>;
415 reset-names = "ahb"; 417 reset-names = "ahb";
416 interrupts = <0 63 4>; 418 interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
417 status = "disabled"; 419 status = "disabled";
418 }; 420 };
419 421
@@ -444,7 +446,7 @@
444 ehci0: usb@01c1a000 { 446 ehci0: usb@01c1a000 {
445 compatible = "allwinner,sun6i-a31-ehci", "generic-ehci"; 447 compatible = "allwinner,sun6i-a31-ehci", "generic-ehci";
446 reg = <0x01c1a000 0x100>; 448 reg = <0x01c1a000 0x100>;
447 interrupts = <0 72 4>; 449 interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
448 clocks = <&ahb1_gates 26>; 450 clocks = <&ahb1_gates 26>;
449 resets = <&ahb1_rst 26>; 451 resets = <&ahb1_rst 26>;
450 phys = <&usbphy 1>; 452 phys = <&usbphy 1>;
@@ -455,7 +457,7 @@
455 ohci0: usb@01c1a400 { 457 ohci0: usb@01c1a400 {
456 compatible = "allwinner,sun6i-a31-ohci", "generic-ohci"; 458 compatible = "allwinner,sun6i-a31-ohci", "generic-ohci";
457 reg = <0x01c1a400 0x100>; 459 reg = <0x01c1a400 0x100>;
458 interrupts = <0 73 4>; 460 interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
459 clocks = <&ahb1_gates 29>, <&usb_clk 16>; 461 clocks = <&ahb1_gates 29>, <&usb_clk 16>;
460 resets = <&ahb1_rst 29>; 462 resets = <&ahb1_rst 29>;
461 phys = <&usbphy 1>; 463 phys = <&usbphy 1>;
@@ -466,7 +468,7 @@
466 ehci1: usb@01c1b000 { 468 ehci1: usb@01c1b000 {
467 compatible = "allwinner,sun6i-a31-ehci", "generic-ehci"; 469 compatible = "allwinner,sun6i-a31-ehci", "generic-ehci";
468 reg = <0x01c1b000 0x100>; 470 reg = <0x01c1b000 0x100>;
469 interrupts = <0 74 4>; 471 interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
470 clocks = <&ahb1_gates 27>; 472 clocks = <&ahb1_gates 27>;
471 resets = <&ahb1_rst 27>; 473 resets = <&ahb1_rst 27>;
472 phys = <&usbphy 2>; 474 phys = <&usbphy 2>;
@@ -477,7 +479,7 @@
477 ohci1: usb@01c1b400 { 479 ohci1: usb@01c1b400 {
478 compatible = "allwinner,sun6i-a31-ohci", "generic-ohci"; 480 compatible = "allwinner,sun6i-a31-ohci", "generic-ohci";
479 reg = <0x01c1b400 0x100>; 481 reg = <0x01c1b400 0x100>;
480 interrupts = <0 75 4>; 482 interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
481 clocks = <&ahb1_gates 30>, <&usb_clk 17>; 483 clocks = <&ahb1_gates 30>, <&usb_clk 17>;
482 resets = <&ahb1_rst 30>; 484 resets = <&ahb1_rst 30>;
483 phys = <&usbphy 2>; 485 phys = <&usbphy 2>;
@@ -488,7 +490,7 @@
488 ohci2: usb@01c1c400 { 490 ohci2: usb@01c1c400 {
489 compatible = "allwinner,sun6i-a31-ohci", "generic-ohci"; 491 compatible = "allwinner,sun6i-a31-ohci", "generic-ohci";
490 reg = <0x01c1c400 0x100>; 492 reg = <0x01c1c400 0x100>;
491 interrupts = <0 77 4>; 493 interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
492 clocks = <&ahb1_gates 31>, <&usb_clk 18>; 494 clocks = <&ahb1_gates 31>, <&usb_clk 18>;
493 resets = <&ahb1_rst 31>; 495 resets = <&ahb1_rst 31>;
494 status = "disabled"; 496 status = "disabled";
@@ -497,10 +499,10 @@
497 pio: pinctrl@01c20800 { 499 pio: pinctrl@01c20800 {
498 compatible = "allwinner,sun6i-a31-pinctrl"; 500 compatible = "allwinner,sun6i-a31-pinctrl";
499 reg = <0x01c20800 0x400>; 501 reg = <0x01c20800 0x400>;
500 interrupts = <0 11 4>, 502 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
501 <0 15 4>, 503 <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
502 <0 16 4>, 504 <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
503 <0 17 4>; 505 <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
504 clocks = <&apb1_gates 5>; 506 clocks = <&apb1_gates 5>;
505 gpio-controller; 507 gpio-controller;
506 interrupt-controller; 508 interrupt-controller;
@@ -607,11 +609,11 @@
607 timer@01c20c00 { 609 timer@01c20c00 {
608 compatible = "allwinner,sun4i-a10-timer"; 610 compatible = "allwinner,sun4i-a10-timer";
609 reg = <0x01c20c00 0xa0>; 611 reg = <0x01c20c00 0xa0>;
610 interrupts = <0 18 4>, 612 interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
611 <0 19 4>, 613 <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
612 <0 20 4>, 614 <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>,
613 <0 21 4>, 615 <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>,
614 <0 22 4>; 616 <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
615 clocks = <&osc24M>; 617 clocks = <&osc24M>;
616 }; 618 };
617 619
@@ -623,7 +625,7 @@
623 uart0: serial@01c28000 { 625 uart0: serial@01c28000 {
624 compatible = "snps,dw-apb-uart"; 626 compatible = "snps,dw-apb-uart";
625 reg = <0x01c28000 0x400>; 627 reg = <0x01c28000 0x400>;
626 interrupts = <0 0 4>; 628 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
627 reg-shift = <2>; 629 reg-shift = <2>;
628 reg-io-width = <4>; 630 reg-io-width = <4>;
629 clocks = <&apb2_gates 16>; 631 clocks = <&apb2_gates 16>;
@@ -636,7 +638,7 @@
636 uart1: serial@01c28400 { 638 uart1: serial@01c28400 {
637 compatible = "snps,dw-apb-uart"; 639 compatible = "snps,dw-apb-uart";
638 reg = <0x01c28400 0x400>; 640 reg = <0x01c28400 0x400>;
639 interrupts = <0 1 4>; 641 interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
640 reg-shift = <2>; 642 reg-shift = <2>;
641 reg-io-width = <4>; 643 reg-io-width = <4>;
642 clocks = <&apb2_gates 17>; 644 clocks = <&apb2_gates 17>;
@@ -649,7 +651,7 @@
649 uart2: serial@01c28800 { 651 uart2: serial@01c28800 {
650 compatible = "snps,dw-apb-uart"; 652 compatible = "snps,dw-apb-uart";
651 reg = <0x01c28800 0x400>; 653 reg = <0x01c28800 0x400>;
652 interrupts = <0 2 4>; 654 interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
653 reg-shift = <2>; 655 reg-shift = <2>;
654 reg-io-width = <4>; 656 reg-io-width = <4>;
655 clocks = <&apb2_gates 18>; 657 clocks = <&apb2_gates 18>;
@@ -662,7 +664,7 @@
662 uart3: serial@01c28c00 { 664 uart3: serial@01c28c00 {
663 compatible = "snps,dw-apb-uart"; 665 compatible = "snps,dw-apb-uart";
664 reg = <0x01c28c00 0x400>; 666 reg = <0x01c28c00 0x400>;
665 interrupts = <0 3 4>; 667 interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
666 reg-shift = <2>; 668 reg-shift = <2>;
667 reg-io-width = <4>; 669 reg-io-width = <4>;
668 clocks = <&apb2_gates 19>; 670 clocks = <&apb2_gates 19>;
@@ -675,7 +677,7 @@
675 uart4: serial@01c29000 { 677 uart4: serial@01c29000 {
676 compatible = "snps,dw-apb-uart"; 678 compatible = "snps,dw-apb-uart";
677 reg = <0x01c29000 0x400>; 679 reg = <0x01c29000 0x400>;
678 interrupts = <0 4 4>; 680 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
679 reg-shift = <2>; 681 reg-shift = <2>;
680 reg-io-width = <4>; 682 reg-io-width = <4>;
681 clocks = <&apb2_gates 20>; 683 clocks = <&apb2_gates 20>;
@@ -688,7 +690,7 @@
688 uart5: serial@01c29400 { 690 uart5: serial@01c29400 {
689 compatible = "snps,dw-apb-uart"; 691 compatible = "snps,dw-apb-uart";
690 reg = <0x01c29400 0x400>; 692 reg = <0x01c29400 0x400>;
691 interrupts = <0 5 4>; 693 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
692 reg-shift = <2>; 694 reg-shift = <2>;
693 reg-io-width = <4>; 695 reg-io-width = <4>;
694 clocks = <&apb2_gates 21>; 696 clocks = <&apb2_gates 21>;
@@ -701,7 +703,7 @@
701 i2c0: i2c@01c2ac00 { 703 i2c0: i2c@01c2ac00 {
702 compatible = "allwinner,sun6i-a31-i2c"; 704 compatible = "allwinner,sun6i-a31-i2c";
703 reg = <0x01c2ac00 0x400>; 705 reg = <0x01c2ac00 0x400>;
704 interrupts = <0 6 4>; 706 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
705 clocks = <&apb2_gates 0>; 707 clocks = <&apb2_gates 0>;
706 resets = <&apb2_rst 0>; 708 resets = <&apb2_rst 0>;
707 status = "disabled"; 709 status = "disabled";
@@ -712,7 +714,7 @@
712 i2c1: i2c@01c2b000 { 714 i2c1: i2c@01c2b000 {
713 compatible = "allwinner,sun6i-a31-i2c"; 715 compatible = "allwinner,sun6i-a31-i2c";
714 reg = <0x01c2b000 0x400>; 716 reg = <0x01c2b000 0x400>;
715 interrupts = <0 7 4>; 717 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
716 clocks = <&apb2_gates 1>; 718 clocks = <&apb2_gates 1>;
717 resets = <&apb2_rst 1>; 719 resets = <&apb2_rst 1>;
718 status = "disabled"; 720 status = "disabled";
@@ -723,7 +725,7 @@
723 i2c2: i2c@01c2b400 { 725 i2c2: i2c@01c2b400 {
724 compatible = "allwinner,sun6i-a31-i2c"; 726 compatible = "allwinner,sun6i-a31-i2c";
725 reg = <0x01c2b400 0x400>; 727 reg = <0x01c2b400 0x400>;
726 interrupts = <0 8 4>; 728 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
727 clocks = <&apb2_gates 2>; 729 clocks = <&apb2_gates 2>;
728 resets = <&apb2_rst 2>; 730 resets = <&apb2_rst 2>;
729 status = "disabled"; 731 status = "disabled";
@@ -734,7 +736,7 @@
734 i2c3: i2c@01c2b800 { 736 i2c3: i2c@01c2b800 {
735 compatible = "allwinner,sun6i-a31-i2c"; 737 compatible = "allwinner,sun6i-a31-i2c";
736 reg = <0x01c2b800 0x400>; 738 reg = <0x01c2b800 0x400>;
737 interrupts = <0 9 4>; 739 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
738 clocks = <&apb2_gates 3>; 740 clocks = <&apb2_gates 3>;
739 resets = <&apb2_rst 3>; 741 resets = <&apb2_rst 3>;
740 status = "disabled"; 742 status = "disabled";
@@ -745,7 +747,7 @@
745 gmac: ethernet@01c30000 { 747 gmac: ethernet@01c30000 {
746 compatible = "allwinner,sun7i-a20-gmac"; 748 compatible = "allwinner,sun7i-a20-gmac";
747 reg = <0x01c30000 0x1054>; 749 reg = <0x01c30000 0x1054>;
748 interrupts = <0 82 4>; 750 interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
749 interrupt-names = "macirq"; 751 interrupt-names = "macirq";
750 clocks = <&ahb1_gates 17>, <&gmac_tx_clk>; 752 clocks = <&ahb1_gates 17>, <&gmac_tx_clk>;
751 clock-names = "stmmaceth", "allwinner_gmac_tx"; 753 clock-names = "stmmaceth", "allwinner_gmac_tx";
@@ -762,10 +764,10 @@
762 timer@01c60000 { 764 timer@01c60000 {
763 compatible = "allwinner,sun6i-a31-hstimer", "allwinner,sun7i-a20-hstimer"; 765 compatible = "allwinner,sun6i-a31-hstimer", "allwinner,sun7i-a20-hstimer";
764 reg = <0x01c60000 0x1000>; 766 reg = <0x01c60000 0x1000>;
765 interrupts = <0 51 4>, 767 interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
766 <0 52 4>, 768 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
767 <0 53 4>, 769 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
768 <0 54 4>; 770 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
769 clocks = <&ahb1_gates 19>; 771 clocks = <&ahb1_gates 19>;
770 resets = <&ahb1_rst 19>; 772 resets = <&ahb1_rst 19>;
771 }; 773 };
@@ -773,7 +775,7 @@
773 spi0: spi@01c68000 { 775 spi0: spi@01c68000 {
774 compatible = "allwinner,sun6i-a31-spi"; 776 compatible = "allwinner,sun6i-a31-spi";
775 reg = <0x01c68000 0x1000>; 777 reg = <0x01c68000 0x1000>;
776 interrupts = <0 65 4>; 778 interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
777 clocks = <&ahb1_gates 20>, <&spi0_clk>; 779 clocks = <&ahb1_gates 20>, <&spi0_clk>;
778 clock-names = "ahb", "mod"; 780 clock-names = "ahb", "mod";
779 dmas = <&dma 23>, <&dma 23>; 781 dmas = <&dma 23>, <&dma 23>;
@@ -785,7 +787,7 @@
785 spi1: spi@01c69000 { 787 spi1: spi@01c69000 {
786 compatible = "allwinner,sun6i-a31-spi"; 788 compatible = "allwinner,sun6i-a31-spi";
787 reg = <0x01c69000 0x1000>; 789 reg = <0x01c69000 0x1000>;
788 interrupts = <0 66 4>; 790 interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
789 clocks = <&ahb1_gates 21>, <&spi1_clk>; 791 clocks = <&ahb1_gates 21>, <&spi1_clk>;
790 clock-names = "ahb", "mod"; 792 clock-names = "ahb", "mod";
791 dmas = <&dma 24>, <&dma 24>; 793 dmas = <&dma 24>, <&dma 24>;
@@ -797,7 +799,7 @@
797 spi2: spi@01c6a000 { 799 spi2: spi@01c6a000 {
798 compatible = "allwinner,sun6i-a31-spi"; 800 compatible = "allwinner,sun6i-a31-spi";
799 reg = <0x01c6a000 0x1000>; 801 reg = <0x01c6a000 0x1000>;
800 interrupts = <0 67 4>; 802 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
801 clocks = <&ahb1_gates 22>, <&spi2_clk>; 803 clocks = <&ahb1_gates 22>, <&spi2_clk>;
802 clock-names = "ahb", "mod"; 804 clock-names = "ahb", "mod";
803 dmas = <&dma 25>, <&dma 25>; 805 dmas = <&dma 25>, <&dma 25>;
@@ -809,7 +811,7 @@
809 spi3: spi@01c6b000 { 811 spi3: spi@01c6b000 {
810 compatible = "allwinner,sun6i-a31-spi"; 812 compatible = "allwinner,sun6i-a31-spi";
811 reg = <0x01c6b000 0x1000>; 813 reg = <0x01c6b000 0x1000>;
812 interrupts = <0 68 4>; 814 interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
813 clocks = <&ahb1_gates 23>, <&spi3_clk>; 815 clocks = <&ahb1_gates 23>, <&spi3_clk>;
814 clock-names = "ahb", "mod"; 816 clock-names = "ahb", "mod";
815 dmas = <&dma 26>, <&dma 26>; 817 dmas = <&dma 26>, <&dma 26>;
@@ -826,13 +828,14 @@
826 <0x01c86000 0x2000>; 828 <0x01c86000 0x2000>;
827 interrupt-controller; 829 interrupt-controller;
828 #interrupt-cells = <3>; 830 #interrupt-cells = <3>;
829 interrupts = <1 9 0xf04>; 831 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
830 }; 832 };
831 833
832 rtc: rtc@01f00000 { 834 rtc: rtc@01f00000 {
833 compatible = "allwinner,sun6i-a31-rtc"; 835 compatible = "allwinner,sun6i-a31-rtc";
834 reg = <0x01f00000 0x54>; 836 reg = <0x01f00000 0x54>;
835 interrupts = <0 40 4>, <0 41 4>; 837 interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
838 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
836 }; 839 };
837 840
838 nmi_intc: interrupt-controller@01f00c0c { 841 nmi_intc: interrupt-controller@01f00c0c {
@@ -840,7 +843,7 @@
840 interrupt-controller; 843 interrupt-controller;
841 #interrupt-cells = <2>; 844 #interrupt-cells = <2>;
842 reg = <0x01f00c0c 0x38>; 845 reg = <0x01f00c0c 0x38>;
843 interrupts = <0 32 4>; 846 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
844 }; 847 };
845 848
846 prcm@01f01400 { 849 prcm@01f01400 {
@@ -903,7 +906,7 @@
903 clocks = <&apb0_gates 1>, <&ir_clk>; 906 clocks = <&apb0_gates 1>, <&ir_clk>;
904 clock-names = "apb", "ir"; 907 clock-names = "apb", "ir";
905 resets = <&apb0_rst 1>; 908 resets = <&apb0_rst 1>;
906 interrupts = <0 37 4>; 909 interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
907 reg = <0x01f02000 0x40>; 910 reg = <0x01f02000 0x40>;
908 status = "disabled"; 911 status = "disabled";
909 }; 912 };
@@ -911,8 +914,8 @@
911 r_pio: pinctrl@01f02c00 { 914 r_pio: pinctrl@01f02c00 {
912 compatible = "allwinner,sun6i-a31-r-pinctrl"; 915 compatible = "allwinner,sun6i-a31-r-pinctrl";
913 reg = <0x01f02c00 0x400>; 916 reg = <0x01f02c00 0x400>;
914 interrupts = <0 45 4>, 917 interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
915 <0 46 4>; 918 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
916 clocks = <&apb0_gates 0>; 919 clocks = <&apb0_gates 0>;
917 resets = <&apb0_rst 0>; 920 resets = <&apb0_rst 0>;
918 gpio-controller; 921 gpio-controller;
diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
index b9eba9370934..252b4bf6084d 100644
--- a/arch/arm/boot/dts/sun7i-a20.dtsi
+++ b/arch/arm/boot/dts/sun7i-a20.dtsi
@@ -49,6 +49,8 @@
49 49
50#include "skeleton.dtsi" 50#include "skeleton.dtsi"
51 51
52#include <dt-bindings/interrupt-controller/arm-gic.h>
53
52#include <dt-bindings/dma/sun4i-a10.h> 54#include <dt-bindings/dma/sun4i-a10.h>
53#include <dt-bindings/pinctrl/sun4i-a10.h> 55#include <dt-bindings/pinctrl/sun4i-a10.h>
54 56
@@ -104,16 +106,16 @@
104 106
105 timer { 107 timer {
106 compatible = "arm,armv7-timer"; 108 compatible = "arm,armv7-timer";
107 interrupts = <1 13 0xf08>, 109 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
108 <1 14 0xf08>, 110 <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
109 <1 11 0xf08>, 111 <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
110 <1 10 0xf08>; 112 <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
111 }; 113 };
112 114
113 pmu { 115 pmu {
114 compatible = "arm,cortex-a7-pmu", "arm,cortex-a15-pmu"; 116 compatible = "arm,cortex-a7-pmu", "arm,cortex-a15-pmu";
115 interrupts = <0 120 4>, 117 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
116 <0 121 4>; 118 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
117 }; 119 };
118 120
119 clocks { 121 clocks {
@@ -465,13 +467,13 @@
465 interrupt-controller; 467 interrupt-controller;
466 #interrupt-cells = <2>; 468 #interrupt-cells = <2>;
467 reg = <0x01c00030 0x0c>; 469 reg = <0x01c00030 0x0c>;
468 interrupts = <0 0 4>; 470 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
469 }; 471 };
470 472
471 dma: dma-controller@01c02000 { 473 dma: dma-controller@01c02000 {
472 compatible = "allwinner,sun4i-a10-dma"; 474 compatible = "allwinner,sun4i-a10-dma";
473 reg = <0x01c02000 0x1000>; 475 reg = <0x01c02000 0x1000>;
474 interrupts = <0 27 4>; 476 interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
475 clocks = <&ahb_gates 6>; 477 clocks = <&ahb_gates 6>;
476 #dma-cells = <2>; 478 #dma-cells = <2>;
477 }; 479 };
@@ -479,7 +481,7 @@
479 spi0: spi@01c05000 { 481 spi0: spi@01c05000 {
480 compatible = "allwinner,sun4i-a10-spi"; 482 compatible = "allwinner,sun4i-a10-spi";
481 reg = <0x01c05000 0x1000>; 483 reg = <0x01c05000 0x1000>;
482 interrupts = <0 10 4>; 484 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
483 clocks = <&ahb_gates 20>, <&spi0_clk>; 485 clocks = <&ahb_gates 20>, <&spi0_clk>;
484 clock-names = "ahb", "mod"; 486 clock-names = "ahb", "mod";
485 dmas = <&dma SUN4I_DMA_DEDICATED 27>, 487 dmas = <&dma SUN4I_DMA_DEDICATED 27>,
@@ -493,7 +495,7 @@
493 spi1: spi@01c06000 { 495 spi1: spi@01c06000 {
494 compatible = "allwinner,sun4i-a10-spi"; 496 compatible = "allwinner,sun4i-a10-spi";
495 reg = <0x01c06000 0x1000>; 497 reg = <0x01c06000 0x1000>;
496 interrupts = <0 11 4>; 498 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
497 clocks = <&ahb_gates 21>, <&spi1_clk>; 499 clocks = <&ahb_gates 21>, <&spi1_clk>;
498 clock-names = "ahb", "mod"; 500 clock-names = "ahb", "mod";
499 dmas = <&dma SUN4I_DMA_DEDICATED 9>, 501 dmas = <&dma SUN4I_DMA_DEDICATED 9>,
@@ -507,7 +509,7 @@
507 emac: ethernet@01c0b000 { 509 emac: ethernet@01c0b000 {
508 compatible = "allwinner,sun4i-a10-emac"; 510 compatible = "allwinner,sun4i-a10-emac";
509 reg = <0x01c0b000 0x1000>; 511 reg = <0x01c0b000 0x1000>;
510 interrupts = <0 55 4>; 512 interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
511 clocks = <&ahb_gates 17>; 513 clocks = <&ahb_gates 17>;
512 status = "disabled"; 514 status = "disabled";
513 }; 515 };
@@ -525,7 +527,7 @@
525 reg = <0x01c0f000 0x1000>; 527 reg = <0x01c0f000 0x1000>;
526 clocks = <&ahb_gates 8>, <&mmc0_clk>; 528 clocks = <&ahb_gates 8>, <&mmc0_clk>;
527 clock-names = "ahb", "mmc"; 529 clock-names = "ahb", "mmc";
528 interrupts = <0 32 4>; 530 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
529 status = "disabled"; 531 status = "disabled";
530 }; 532 };
531 533
@@ -534,7 +536,7 @@
534 reg = <0x01c10000 0x1000>; 536 reg = <0x01c10000 0x1000>;
535 clocks = <&ahb_gates 9>, <&mmc1_clk>; 537 clocks = <&ahb_gates 9>, <&mmc1_clk>;
536 clock-names = "ahb", "mmc"; 538 clock-names = "ahb", "mmc";
537 interrupts = <0 33 4>; 539 interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
538 status = "disabled"; 540 status = "disabled";
539 }; 541 };
540 542
@@ -543,7 +545,7 @@
543 reg = <0x01c11000 0x1000>; 545 reg = <0x01c11000 0x1000>;
544 clocks = <&ahb_gates 10>, <&mmc2_clk>; 546 clocks = <&ahb_gates 10>, <&mmc2_clk>;
545 clock-names = "ahb", "mmc"; 547 clock-names = "ahb", "mmc";
546 interrupts = <0 34 4>; 548 interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
547 status = "disabled"; 549 status = "disabled";
548 }; 550 };
549 551
@@ -552,7 +554,7 @@
552 reg = <0x01c12000 0x1000>; 554 reg = <0x01c12000 0x1000>;
553 clocks = <&ahb_gates 11>, <&mmc3_clk>; 555 clocks = <&ahb_gates 11>, <&mmc3_clk>;
554 clock-names = "ahb", "mmc"; 556 clock-names = "ahb", "mmc";
555 interrupts = <0 35 4>; 557 interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
556 status = "disabled"; 558 status = "disabled";
557 }; 559 };
558 560
@@ -571,7 +573,7 @@
571 ehci0: usb@01c14000 { 573 ehci0: usb@01c14000 {
572 compatible = "allwinner,sun7i-a20-ehci", "generic-ehci"; 574 compatible = "allwinner,sun7i-a20-ehci", "generic-ehci";
573 reg = <0x01c14000 0x100>; 575 reg = <0x01c14000 0x100>;
574 interrupts = <0 39 4>; 576 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
575 clocks = <&ahb_gates 1>; 577 clocks = <&ahb_gates 1>;
576 phys = <&usbphy 1>; 578 phys = <&usbphy 1>;
577 phy-names = "usb"; 579 phy-names = "usb";
@@ -581,7 +583,7 @@
581 ohci0: usb@01c14400 { 583 ohci0: usb@01c14400 {
582 compatible = "allwinner,sun7i-a20-ohci", "generic-ohci"; 584 compatible = "allwinner,sun7i-a20-ohci", "generic-ohci";
583 reg = <0x01c14400 0x100>; 585 reg = <0x01c14400 0x100>;
584 interrupts = <0 64 4>; 586 interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
585 clocks = <&usb_clk 6>, <&ahb_gates 2>; 587 clocks = <&usb_clk 6>, <&ahb_gates 2>;
586 phys = <&usbphy 1>; 588 phys = <&usbphy 1>;
587 phy-names = "usb"; 589 phy-names = "usb";
@@ -591,7 +593,7 @@
591 spi2: spi@01c17000 { 593 spi2: spi@01c17000 {
592 compatible = "allwinner,sun4i-a10-spi"; 594 compatible = "allwinner,sun4i-a10-spi";
593 reg = <0x01c17000 0x1000>; 595 reg = <0x01c17000 0x1000>;
594 interrupts = <0 12 4>; 596 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
595 clocks = <&ahb_gates 22>, <&spi2_clk>; 597 clocks = <&ahb_gates 22>, <&spi2_clk>;
596 clock-names = "ahb", "mod"; 598 clock-names = "ahb", "mod";
597 dmas = <&dma SUN4I_DMA_DEDICATED 29>, 599 dmas = <&dma SUN4I_DMA_DEDICATED 29>,
@@ -605,7 +607,7 @@
605 ahci: sata@01c18000 { 607 ahci: sata@01c18000 {
606 compatible = "allwinner,sun4i-a10-ahci"; 608 compatible = "allwinner,sun4i-a10-ahci";
607 reg = <0x01c18000 0x1000>; 609 reg = <0x01c18000 0x1000>;
608 interrupts = <0 56 4>; 610 interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
609 clocks = <&pll6 0>, <&ahb_gates 25>; 611 clocks = <&pll6 0>, <&ahb_gates 25>;
610 status = "disabled"; 612 status = "disabled";
611 }; 613 };
@@ -613,7 +615,7 @@
613 ehci1: usb@01c1c000 { 615 ehci1: usb@01c1c000 {
614 compatible = "allwinner,sun7i-a20-ehci", "generic-ehci"; 616 compatible = "allwinner,sun7i-a20-ehci", "generic-ehci";
615 reg = <0x01c1c000 0x100>; 617 reg = <0x01c1c000 0x100>;
616 interrupts = <0 40 4>; 618 interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
617 clocks = <&ahb_gates 3>; 619 clocks = <&ahb_gates 3>;
618 phys = <&usbphy 2>; 620 phys = <&usbphy 2>;
619 phy-names = "usb"; 621 phy-names = "usb";
@@ -623,7 +625,7 @@
623 ohci1: usb@01c1c400 { 625 ohci1: usb@01c1c400 {
624 compatible = "allwinner,sun7i-a20-ohci", "generic-ohci"; 626 compatible = "allwinner,sun7i-a20-ohci", "generic-ohci";
625 reg = <0x01c1c400 0x100>; 627 reg = <0x01c1c400 0x100>;
626 interrupts = <0 65 4>; 628 interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
627 clocks = <&usb_clk 7>, <&ahb_gates 4>; 629 clocks = <&usb_clk 7>, <&ahb_gates 4>;
628 phys = <&usbphy 2>; 630 phys = <&usbphy 2>;
629 phy-names = "usb"; 631 phy-names = "usb";
@@ -633,7 +635,7 @@
633 spi3: spi@01c1f000 { 635 spi3: spi@01c1f000 {
634 compatible = "allwinner,sun4i-a10-spi"; 636 compatible = "allwinner,sun4i-a10-spi";
635 reg = <0x01c1f000 0x1000>; 637 reg = <0x01c1f000 0x1000>;
636 interrupts = <0 50 4>; 638 interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
637 clocks = <&ahb_gates 23>, <&spi3_clk>; 639 clocks = <&ahb_gates 23>, <&spi3_clk>;
638 clock-names = "ahb", "mod"; 640 clock-names = "ahb", "mod";
639 dmas = <&dma SUN4I_DMA_DEDICATED 31>, 641 dmas = <&dma SUN4I_DMA_DEDICATED 31>,
@@ -647,7 +649,7 @@
647 pio: pinctrl@01c20800 { 649 pio: pinctrl@01c20800 {
648 compatible = "allwinner,sun7i-a20-pinctrl"; 650 compatible = "allwinner,sun7i-a20-pinctrl";
649 reg = <0x01c20800 0x400>; 651 reg = <0x01c20800 0x400>;
650 interrupts = <0 28 4>; 652 interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
651 clocks = <&apb0_gates 5>; 653 clocks = <&apb0_gates 5>;
652 gpio-controller; 654 gpio-controller;
653 interrupt-controller; 655 interrupt-controller;
@@ -878,12 +880,12 @@
878 timer@01c20c00 { 880 timer@01c20c00 {
879 compatible = "allwinner,sun4i-a10-timer"; 881 compatible = "allwinner,sun4i-a10-timer";
880 reg = <0x01c20c00 0x90>; 882 reg = <0x01c20c00 0x90>;
881 interrupts = <0 22 4>, 883 interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>,
882 <0 23 4>, 884 <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>,
883 <0 24 4>, 885 <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>,
884 <0 25 4>, 886 <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>,
885 <0 67 4>, 887 <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
886 <0 68 4>; 888 <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
887 clocks = <&osc24M>; 889 clocks = <&osc24M>;
888 }; 890 };
889 891
@@ -895,7 +897,7 @@
895 rtc: rtc@01c20d00 { 897 rtc: rtc@01c20d00 {
896 compatible = "allwinner,sun7i-a20-rtc"; 898 compatible = "allwinner,sun7i-a20-rtc";
897 reg = <0x01c20d00 0x20>; 899 reg = <0x01c20d00 0x20>;
898 interrupts = <0 24 4>; 900 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
899 }; 901 };
900 902
901 pwm: pwm@01c20e00 { 903 pwm: pwm@01c20e00 {
@@ -910,7 +912,7 @@
910 compatible = "allwinner,sun4i-a10-ir"; 912 compatible = "allwinner,sun4i-a10-ir";
911 clocks = <&apb0_gates 6>, <&ir0_clk>; 913 clocks = <&apb0_gates 6>, <&ir0_clk>;
912 clock-names = "apb", "ir"; 914 clock-names = "apb", "ir";
913 interrupts = <0 5 4>; 915 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
914 reg = <0x01c21800 0x40>; 916 reg = <0x01c21800 0x40>;
915 status = "disabled"; 917 status = "disabled";
916 }; 918 };
@@ -919,7 +921,7 @@
919 compatible = "allwinner,sun4i-a10-ir"; 921 compatible = "allwinner,sun4i-a10-ir";
920 clocks = <&apb0_gates 7>, <&ir1_clk>; 922 clocks = <&apb0_gates 7>, <&ir1_clk>;
921 clock-names = "apb", "ir"; 923 clock-names = "apb", "ir";
922 interrupts = <0 6 4>; 924 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
923 reg = <0x01c21c00 0x40>; 925 reg = <0x01c21c00 0x40>;
924 status = "disabled"; 926 status = "disabled";
925 }; 927 };
@@ -927,7 +929,7 @@
927 lradc: lradc@01c22800 { 929 lradc: lradc@01c22800 {
928 compatible = "allwinner,sun4i-a10-lradc-keys"; 930 compatible = "allwinner,sun4i-a10-lradc-keys";
929 reg = <0x01c22800 0x100>; 931 reg = <0x01c22800 0x100>;
930 interrupts = <0 31 4>; 932 interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
931 status = "disabled"; 933 status = "disabled";
932 }; 934 };
933 935
@@ -939,13 +941,13 @@
939 rtp: rtp@01c25000 { 941 rtp: rtp@01c25000 {
940 compatible = "allwinner,sun4i-a10-ts"; 942 compatible = "allwinner,sun4i-a10-ts";
941 reg = <0x01c25000 0x100>; 943 reg = <0x01c25000 0x100>;
942 interrupts = <0 29 4>; 944 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
943 }; 945 };
944 946
945 uart0: serial@01c28000 { 947 uart0: serial@01c28000 {
946 compatible = "snps,dw-apb-uart"; 948 compatible = "snps,dw-apb-uart";
947 reg = <0x01c28000 0x400>; 949 reg = <0x01c28000 0x400>;
948 interrupts = <0 1 4>; 950 interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
949 reg-shift = <2>; 951 reg-shift = <2>;
950 reg-io-width = <4>; 952 reg-io-width = <4>;
951 clocks = <&apb1_gates 16>; 953 clocks = <&apb1_gates 16>;
@@ -955,7 +957,7 @@
955 uart1: serial@01c28400 { 957 uart1: serial@01c28400 {
956 compatible = "snps,dw-apb-uart"; 958 compatible = "snps,dw-apb-uart";
957 reg = <0x01c28400 0x400>; 959 reg = <0x01c28400 0x400>;
958 interrupts = <0 2 4>; 960 interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
959 reg-shift = <2>; 961 reg-shift = <2>;
960 reg-io-width = <4>; 962 reg-io-width = <4>;
961 clocks = <&apb1_gates 17>; 963 clocks = <&apb1_gates 17>;
@@ -965,7 +967,7 @@
965 uart2: serial@01c28800 { 967 uart2: serial@01c28800 {
966 compatible = "snps,dw-apb-uart"; 968 compatible = "snps,dw-apb-uart";
967 reg = <0x01c28800 0x400>; 969 reg = <0x01c28800 0x400>;
968 interrupts = <0 3 4>; 970 interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
969 reg-shift = <2>; 971 reg-shift = <2>;
970 reg-io-width = <4>; 972 reg-io-width = <4>;
971 clocks = <&apb1_gates 18>; 973 clocks = <&apb1_gates 18>;
@@ -975,7 +977,7 @@
975 uart3: serial@01c28c00 { 977 uart3: serial@01c28c00 {
976 compatible = "snps,dw-apb-uart"; 978 compatible = "snps,dw-apb-uart";
977 reg = <0x01c28c00 0x400>; 979 reg = <0x01c28c00 0x400>;
978 interrupts = <0 4 4>; 980 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
979 reg-shift = <2>; 981 reg-shift = <2>;
980 reg-io-width = <4>; 982 reg-io-width = <4>;
981 clocks = <&apb1_gates 19>; 983 clocks = <&apb1_gates 19>;
@@ -985,7 +987,7 @@
985 uart4: serial@01c29000 { 987 uart4: serial@01c29000 {
986 compatible = "snps,dw-apb-uart"; 988 compatible = "snps,dw-apb-uart";
987 reg = <0x01c29000 0x400>; 989 reg = <0x01c29000 0x400>;
988 interrupts = <0 17 4>; 990 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
989 reg-shift = <2>; 991 reg-shift = <2>;
990 reg-io-width = <4>; 992 reg-io-width = <4>;
991 clocks = <&apb1_gates 20>; 993 clocks = <&apb1_gates 20>;
@@ -995,7 +997,7 @@
995 uart5: serial@01c29400 { 997 uart5: serial@01c29400 {
996 compatible = "snps,dw-apb-uart"; 998 compatible = "snps,dw-apb-uart";
997 reg = <0x01c29400 0x400>; 999 reg = <0x01c29400 0x400>;
998 interrupts = <0 18 4>; 1000 interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
999 reg-shift = <2>; 1001 reg-shift = <2>;
1000 reg-io-width = <4>; 1002 reg-io-width = <4>;
1001 clocks = <&apb1_gates 21>; 1003 clocks = <&apb1_gates 21>;
@@ -1005,7 +1007,7 @@
1005 uart6: serial@01c29800 { 1007 uart6: serial@01c29800 {
1006 compatible = "snps,dw-apb-uart"; 1008 compatible = "snps,dw-apb-uart";
1007 reg = <0x01c29800 0x400>; 1009 reg = <0x01c29800 0x400>;
1008 interrupts = <0 19 4>; 1010 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
1009 reg-shift = <2>; 1011 reg-shift = <2>;
1010 reg-io-width = <4>; 1012 reg-io-width = <4>;
1011 clocks = <&apb1_gates 22>; 1013 clocks = <&apb1_gates 22>;
@@ -1015,7 +1017,7 @@
1015 uart7: serial@01c29c00 { 1017 uart7: serial@01c29c00 {
1016 compatible = "snps,dw-apb-uart"; 1018 compatible = "snps,dw-apb-uart";
1017 reg = <0x01c29c00 0x400>; 1019 reg = <0x01c29c00 0x400>;
1018 interrupts = <0 20 4>; 1020 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
1019 reg-shift = <2>; 1021 reg-shift = <2>;
1020 reg-io-width = <4>; 1022 reg-io-width = <4>;
1021 clocks = <&apb1_gates 23>; 1023 clocks = <&apb1_gates 23>;
@@ -1025,7 +1027,7 @@
1025 i2c0: i2c@01c2ac00 { 1027 i2c0: i2c@01c2ac00 {
1026 compatible = "allwinner,sun7i-a20-i2c", "allwinner,sun4i-a10-i2c"; 1028 compatible = "allwinner,sun7i-a20-i2c", "allwinner,sun4i-a10-i2c";
1027 reg = <0x01c2ac00 0x400>; 1029 reg = <0x01c2ac00 0x400>;
1028 interrupts = <0 7 4>; 1030 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
1029 clocks = <&apb1_gates 0>; 1031 clocks = <&apb1_gates 0>;
1030 status = "disabled"; 1032 status = "disabled";
1031 #address-cells = <1>; 1033 #address-cells = <1>;
@@ -1035,7 +1037,7 @@
1035 i2c1: i2c@01c2b000 { 1037 i2c1: i2c@01c2b000 {
1036 compatible = "allwinner,sun7i-a20-i2c", "allwinner,sun4i-a10-i2c"; 1038 compatible = "allwinner,sun7i-a20-i2c", "allwinner,sun4i-a10-i2c";
1037 reg = <0x01c2b000 0x400>; 1039 reg = <0x01c2b000 0x400>;
1038 interrupts = <0 8 4>; 1040 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
1039 clocks = <&apb1_gates 1>; 1041 clocks = <&apb1_gates 1>;
1040 status = "disabled"; 1042 status = "disabled";
1041 #address-cells = <1>; 1043 #address-cells = <1>;
@@ -1045,7 +1047,7 @@
1045 i2c2: i2c@01c2b400 { 1047 i2c2: i2c@01c2b400 {
1046 compatible = "allwinner,sun7i-a20-i2c", "allwinner,sun4i-a10-i2c"; 1048 compatible = "allwinner,sun7i-a20-i2c", "allwinner,sun4i-a10-i2c";
1047 reg = <0x01c2b400 0x400>; 1049 reg = <0x01c2b400 0x400>;
1048 interrupts = <0 9 4>; 1050 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
1049 clocks = <&apb1_gates 2>; 1051 clocks = <&apb1_gates 2>;
1050 status = "disabled"; 1052 status = "disabled";
1051 #address-cells = <1>; 1053 #address-cells = <1>;
@@ -1055,7 +1057,7 @@
1055 i2c3: i2c@01c2b800 { 1057 i2c3: i2c@01c2b800 {
1056 compatible = "allwinner,sun7i-a20-i2c", "allwinner,sun4i-a10-i2c"; 1058 compatible = "allwinner,sun7i-a20-i2c", "allwinner,sun4i-a10-i2c";
1057 reg = <0x01c2b800 0x400>; 1059 reg = <0x01c2b800 0x400>;
1058 interrupts = <0 88 4>; 1060 interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
1059 clocks = <&apb1_gates 3>; 1061 clocks = <&apb1_gates 3>;
1060 status = "disabled"; 1062 status = "disabled";
1061 #address-cells = <1>; 1063 #address-cells = <1>;
@@ -1065,7 +1067,7 @@
1065 i2c4: i2c@01c2c000 { 1067 i2c4: i2c@01c2c000 {
1066 compatible = "allwinner,sun7i-a20-i2c", "allwinner,sun4i-a10-i2c"; 1068 compatible = "allwinner,sun7i-a20-i2c", "allwinner,sun4i-a10-i2c";
1067 reg = <0x01c2c000 0x400>; 1069 reg = <0x01c2c000 0x400>;
1068 interrupts = <0 89 4>; 1070 interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
1069 clocks = <&apb1_gates 15>; 1071 clocks = <&apb1_gates 15>;
1070 status = "disabled"; 1072 status = "disabled";
1071 #address-cells = <1>; 1073 #address-cells = <1>;
@@ -1075,7 +1077,7 @@
1075 gmac: ethernet@01c50000 { 1077 gmac: ethernet@01c50000 {
1076 compatible = "allwinner,sun7i-a20-gmac"; 1078 compatible = "allwinner,sun7i-a20-gmac";
1077 reg = <0x01c50000 0x10000>; 1079 reg = <0x01c50000 0x10000>;
1078 interrupts = <0 85 4>; 1080 interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
1079 interrupt-names = "macirq"; 1081 interrupt-names = "macirq";
1080 clocks = <&ahb_gates 49>, <&gmac_tx_clk>; 1082 clocks = <&ahb_gates 49>, <&gmac_tx_clk>;
1081 clock-names = "stmmaceth", "allwinner_gmac_tx"; 1083 clock-names = "stmmaceth", "allwinner_gmac_tx";
@@ -1090,10 +1092,10 @@
1090 hstimer@01c60000 { 1092 hstimer@01c60000 {
1091 compatible = "allwinner,sun7i-a20-hstimer"; 1093 compatible = "allwinner,sun7i-a20-hstimer";
1092 reg = <0x01c60000 0x1000>; 1094 reg = <0x01c60000 0x1000>;
1093 interrupts = <0 81 4>, 1095 interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>,
1094 <0 82 4>, 1096 <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>,
1095 <0 83 4>, 1097 <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>,
1096 <0 84 4>; 1098 <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
1097 clocks = <&ahb_gates 28>; 1099 clocks = <&ahb_gates 28>;
1098 }; 1100 };
1099 1101
@@ -1105,7 +1107,7 @@
1105 <0x01c86000 0x2000>; 1107 <0x01c86000 0x2000>;
1106 interrupt-controller; 1108 interrupt-controller;
1107 #interrupt-cells = <3>; 1109 #interrupt-cells = <3>;
1108 interrupts = <1 9 0xf04>; 1110 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
1109 }; 1111 };
1110 }; 1112 };
1111}; 1113};
diff --git a/arch/arm/boot/dts/sun8i-a23.dtsi b/arch/arm/boot/dts/sun8i-a23.dtsi
index 74b4ac086cca..6602fdee2694 100644
--- a/arch/arm/boot/dts/sun8i-a23.dtsi
+++ b/arch/arm/boot/dts/sun8i-a23.dtsi
@@ -49,6 +49,8 @@
49 49
50#include "skeleton.dtsi" 50#include "skeleton.dtsi"
51 51
52#include <dt-bindings/interrupt-controller/arm-gic.h>
53
52#include <dt-bindings/pinctrl/sun4i-a10.h> 54#include <dt-bindings/pinctrl/sun4i-a10.h>
53 55
54/ { 56/ {
@@ -244,7 +246,7 @@
244 dma: dma-controller@01c02000 { 246 dma: dma-controller@01c02000 {
245 compatible = "allwinner,sun8i-a23-dma"; 247 compatible = "allwinner,sun8i-a23-dma";
246 reg = <0x01c02000 0x1000>; 248 reg = <0x01c02000 0x1000>;
247 interrupts = <0 50 4>; 249 interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
248 clocks = <&ahb1_gates 6>; 250 clocks = <&ahb1_gates 6>;
249 resets = <&ahb1_rst 6>; 251 resets = <&ahb1_rst 6>;
250 #dma-cells = <1>; 252 #dma-cells = <1>;
@@ -257,7 +259,7 @@
257 clock-names = "ahb", "mmc"; 259 clock-names = "ahb", "mmc";
258 resets = <&ahb1_rst 8>; 260 resets = <&ahb1_rst 8>;
259 reset-names = "ahb"; 261 reset-names = "ahb";
260 interrupts = <0 60 4>; 262 interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
261 status = "disabled"; 263 status = "disabled";
262 }; 264 };
263 265
@@ -268,7 +270,7 @@
268 clock-names = "ahb", "mmc"; 270 clock-names = "ahb", "mmc";
269 resets = <&ahb1_rst 9>; 271 resets = <&ahb1_rst 9>;
270 reset-names = "ahb"; 272 reset-names = "ahb";
271 interrupts = <0 61 4>; 273 interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
272 status = "disabled"; 274 status = "disabled";
273 }; 275 };
274 276
@@ -279,16 +281,16 @@
279 clock-names = "ahb", "mmc"; 281 clock-names = "ahb", "mmc";
280 resets = <&ahb1_rst 10>; 282 resets = <&ahb1_rst 10>;
281 reset-names = "ahb"; 283 reset-names = "ahb";
282 interrupts = <0 62 4>; 284 interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
283 status = "disabled"; 285 status = "disabled";
284 }; 286 };
285 287
286 pio: pinctrl@01c20800 { 288 pio: pinctrl@01c20800 {
287 compatible = "allwinner,sun8i-a23-pinctrl"; 289 compatible = "allwinner,sun8i-a23-pinctrl";
288 reg = <0x01c20800 0x400>; 290 reg = <0x01c20800 0x400>;
289 interrupts = <0 11 4>, 291 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
290 <0 15 4>, 292 <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
291 <0 17 4>; 293 <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
292 clocks = <&apb1_gates 5>; 294 clocks = <&apb1_gates 5>;
293 gpio-controller; 295 gpio-controller;
294 interrupt-controller; 296 interrupt-controller;
@@ -360,21 +362,21 @@
360 timer@01c20c00 { 362 timer@01c20c00 {
361 compatible = "allwinner,sun4i-a10-timer"; 363 compatible = "allwinner,sun4i-a10-timer";
362 reg = <0x01c20c00 0xa0>; 364 reg = <0x01c20c00 0xa0>;
363 interrupts = <0 18 4>, 365 interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
364 <0 19 4>; 366 <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
365 clocks = <&osc24M>; 367 clocks = <&osc24M>;
366 }; 368 };
367 369
368 wdt0: watchdog@01c20ca0 { 370 wdt0: watchdog@01c20ca0 {
369 compatible = "allwinner,sun6i-a31-wdt"; 371 compatible = "allwinner,sun6i-a31-wdt";
370 reg = <0x01c20ca0 0x20>; 372 reg = <0x01c20ca0 0x20>;
371 interrupts = <0 25 4>; 373 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
372 }; 374 };
373 375
374 uart0: serial@01c28000 { 376 uart0: serial@01c28000 {
375 compatible = "snps,dw-apb-uart"; 377 compatible = "snps,dw-apb-uart";
376 reg = <0x01c28000 0x400>; 378 reg = <0x01c28000 0x400>;
377 interrupts = <0 0 4>; 379 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
378 reg-shift = <2>; 380 reg-shift = <2>;
379 reg-io-width = <4>; 381 reg-io-width = <4>;
380 clocks = <&apb2_gates 16>; 382 clocks = <&apb2_gates 16>;
@@ -387,7 +389,7 @@
387 uart1: serial@01c28400 { 389 uart1: serial@01c28400 {
388 compatible = "snps,dw-apb-uart"; 390 compatible = "snps,dw-apb-uart";
389 reg = <0x01c28400 0x400>; 391 reg = <0x01c28400 0x400>;
390 interrupts = <0 1 4>; 392 interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
391 reg-shift = <2>; 393 reg-shift = <2>;
392 reg-io-width = <4>; 394 reg-io-width = <4>;
393 clocks = <&apb2_gates 17>; 395 clocks = <&apb2_gates 17>;
@@ -400,7 +402,7 @@
400 uart2: serial@01c28800 { 402 uart2: serial@01c28800 {
401 compatible = "snps,dw-apb-uart"; 403 compatible = "snps,dw-apb-uart";
402 reg = <0x01c28800 0x400>; 404 reg = <0x01c28800 0x400>;
403 interrupts = <0 2 4>; 405 interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
404 reg-shift = <2>; 406 reg-shift = <2>;
405 reg-io-width = <4>; 407 reg-io-width = <4>;
406 clocks = <&apb2_gates 18>; 408 clocks = <&apb2_gates 18>;
@@ -413,7 +415,7 @@
413 uart3: serial@01c28c00 { 415 uart3: serial@01c28c00 {
414 compatible = "snps,dw-apb-uart"; 416 compatible = "snps,dw-apb-uart";
415 reg = <0x01c28c00 0x400>; 417 reg = <0x01c28c00 0x400>;
416 interrupts = <0 3 4>; 418 interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
417 reg-shift = <2>; 419 reg-shift = <2>;
418 reg-io-width = <4>; 420 reg-io-width = <4>;
419 clocks = <&apb2_gates 19>; 421 clocks = <&apb2_gates 19>;
@@ -426,7 +428,7 @@
426 uart4: serial@01c29000 { 428 uart4: serial@01c29000 {
427 compatible = "snps,dw-apb-uart"; 429 compatible = "snps,dw-apb-uart";
428 reg = <0x01c29000 0x400>; 430 reg = <0x01c29000 0x400>;
429 interrupts = <0 4 4>; 431 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
430 reg-shift = <2>; 432 reg-shift = <2>;
431 reg-io-width = <4>; 433 reg-io-width = <4>;
432 clocks = <&apb2_gates 20>; 434 clocks = <&apb2_gates 20>;
@@ -439,7 +441,7 @@
439 i2c0: i2c@01c2ac00 { 441 i2c0: i2c@01c2ac00 {
440 compatible = "allwinner,sun6i-a31-i2c"; 442 compatible = "allwinner,sun6i-a31-i2c";
441 reg = <0x01c2ac00 0x400>; 443 reg = <0x01c2ac00 0x400>;
442 interrupts = <0 6 4>; 444 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
443 clocks = <&apb2_gates 0>; 445 clocks = <&apb2_gates 0>;
444 resets = <&apb2_rst 0>; 446 resets = <&apb2_rst 0>;
445 status = "disabled"; 447 status = "disabled";
@@ -450,7 +452,7 @@
450 i2c1: i2c@01c2b000 { 452 i2c1: i2c@01c2b000 {
451 compatible = "allwinner,sun6i-a31-i2c"; 453 compatible = "allwinner,sun6i-a31-i2c";
452 reg = <0x01c2b000 0x400>; 454 reg = <0x01c2b000 0x400>;
453 interrupts = <0 7 4>; 455 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
454 clocks = <&apb2_gates 1>; 456 clocks = <&apb2_gates 1>;
455 resets = <&apb2_rst 1>; 457 resets = <&apb2_rst 1>;
456 status = "disabled"; 458 status = "disabled";
@@ -461,7 +463,7 @@
461 i2c2: i2c@01c2b400 { 463 i2c2: i2c@01c2b400 {
462 compatible = "allwinner,sun6i-a31-i2c"; 464 compatible = "allwinner,sun6i-a31-i2c";
463 reg = <0x01c2b400 0x400>; 465 reg = <0x01c2b400 0x400>;
464 interrupts = <0 8 4>; 466 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
465 clocks = <&apb2_gates 2>; 467 clocks = <&apb2_gates 2>;
466 resets = <&apb2_rst 2>; 468 resets = <&apb2_rst 2>;
467 status = "disabled"; 469 status = "disabled";
@@ -477,13 +479,14 @@
477 <0x01c86000 0x2000>; 479 <0x01c86000 0x2000>;
478 interrupt-controller; 480 interrupt-controller;
479 #interrupt-cells = <3>; 481 #interrupt-cells = <3>;
480 interrupts = <1 9 0xf04>; 482 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
481 }; 483 };
482 484
483 rtc: rtc@01f00000 { 485 rtc: rtc@01f00000 {
484 compatible = "allwinner,sun6i-a31-rtc"; 486 compatible = "allwinner,sun6i-a31-rtc";
485 reg = <0x01f00000 0x54>; 487 reg = <0x01f00000 0x54>;
486 interrupts = <0 40 4>, <0 41 4>; 488 interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
489 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
487 }; 490 };
488 491
489 prcm@01f01400 { 492 prcm@01f01400 {
@@ -533,7 +536,7 @@
533 r_uart: serial@01f02800 { 536 r_uart: serial@01f02800 {
534 compatible = "snps,dw-apb-uart"; 537 compatible = "snps,dw-apb-uart";
535 reg = <0x01f02800 0x400>; 538 reg = <0x01f02800 0x400>;
536 interrupts = <0 38 4>; 539 interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
537 reg-shift = <2>; 540 reg-shift = <2>;
538 reg-io-width = <4>; 541 reg-io-width = <4>;
539 clocks = <&apb0_gates 4>; 542 clocks = <&apb0_gates 4>;
@@ -544,7 +547,7 @@
544 r_pio: pinctrl@01f02c00 { 547 r_pio: pinctrl@01f02c00 {
545 compatible = "allwinner,sun8i-a23-r-pinctrl"; 548 compatible = "allwinner,sun8i-a23-r-pinctrl";
546 reg = <0x01f02c00 0x400>; 549 reg = <0x01f02c00 0x400>;
547 interrupts = <0 45 4>; 550 interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
548 clocks = <&apb0_gates 0>; 551 clocks = <&apb0_gates 0>;
549 resets = <&apb0_rst 0>; 552 resets = <&apb0_rst 0>;
550 gpio-controller; 553 gpio-controller;
diff --git a/arch/arm/boot/dts/sun9i-a80.dtsi b/arch/arm/boot/dts/sun9i-a80.dtsi
index de31b210e2c1..4b584cb9c2f0 100644
--- a/arch/arm/boot/dts/sun9i-a80.dtsi
+++ b/arch/arm/boot/dts/sun9i-a80.dtsi
@@ -49,6 +49,8 @@
49 49
50#include "skeleton64.dtsi" 50#include "skeleton64.dtsi"
51 51
52#include <dt-bindings/interrupt-controller/arm-gic.h>
53
52#include <dt-bindings/pinctrl/sun4i-a10.h> 54#include <dt-bindings/pinctrl/sun4i-a10.h>
53 55
54/ { 56/ {
@@ -293,7 +295,7 @@
293 <0x01c46000 0x2000>; 295 <0x01c46000 0x2000>;
294 interrupt-controller; 296 interrupt-controller;
295 #interrupt-cells = <3>; 297 #interrupt-cells = <3>;
296 interrupts = <1 9 0xf04>; 298 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
297 }; 299 };
298 300
299 ahb0_resets: reset@060005a0 { 301 ahb0_resets: reset@060005a0 {
@@ -329,12 +331,12 @@
329 timer@06000c00 { 331 timer@06000c00 {
330 compatible = "allwinner,sun4i-a10-timer"; 332 compatible = "allwinner,sun4i-a10-timer";
331 reg = <0x06000c00 0xa0>; 333 reg = <0x06000c00 0xa0>;
332 interrupts = <0 18 4>, 334 interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
333 <0 19 4>, 335 <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
334 <0 20 4>, 336 <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>,
335 <0 21 4>, 337 <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>,
336 <0 22 4>, 338 <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>,
337 <0 23 4>; 339 <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
338 340
339 clocks = <&osc24M>; 341 clocks = <&osc24M>;
340 }; 342 };
@@ -342,11 +344,11 @@
342 pio: pinctrl@06000800 { 344 pio: pinctrl@06000800 {
343 compatible = "allwinner,sun9i-a80-pinctrl"; 345 compatible = "allwinner,sun9i-a80-pinctrl";
344 reg = <0x06000800 0x400>; 346 reg = <0x06000800 0x400>;
345 interrupts = <0 11 4>, 347 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
346 <0 15 4>, 348 <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
347 <0 16 4>, 349 <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
348 <0 17 4>, 350 <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
349 <0 120 4>; 351 <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
350 clocks = <&apb0_gates 5>; 352 clocks = <&apb0_gates 5>;
351 gpio-controller; 353 gpio-controller;
352 interrupt-controller; 354 interrupt-controller;
@@ -379,7 +381,7 @@
379 uart0: serial@07000000 { 381 uart0: serial@07000000 {
380 compatible = "snps,dw-apb-uart"; 382 compatible = "snps,dw-apb-uart";
381 reg = <0x07000000 0x400>; 383 reg = <0x07000000 0x400>;
382 interrupts = <0 0 4>; 384 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
383 reg-shift = <2>; 385 reg-shift = <2>;
384 reg-io-width = <4>; 386 reg-io-width = <4>;
385 clocks = <&apb1_gates 16>; 387 clocks = <&apb1_gates 16>;
@@ -390,7 +392,7 @@
390 uart1: serial@07000400 { 392 uart1: serial@07000400 {
391 compatible = "snps,dw-apb-uart"; 393 compatible = "snps,dw-apb-uart";
392 reg = <0x07000400 0x400>; 394 reg = <0x07000400 0x400>;
393 interrupts = <0 1 4>; 395 interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
394 reg-shift = <2>; 396 reg-shift = <2>;
395 reg-io-width = <4>; 397 reg-io-width = <4>;
396 clocks = <&apb1_gates 17>; 398 clocks = <&apb1_gates 17>;
@@ -401,7 +403,7 @@
401 uart2: serial@07000800 { 403 uart2: serial@07000800 {
402 compatible = "snps,dw-apb-uart"; 404 compatible = "snps,dw-apb-uart";
403 reg = <0x07000800 0x400>; 405 reg = <0x07000800 0x400>;
404 interrupts = <0 2 4>; 406 interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
405 reg-shift = <2>; 407 reg-shift = <2>;
406 reg-io-width = <4>; 408 reg-io-width = <4>;
407 clocks = <&apb1_gates 18>; 409 clocks = <&apb1_gates 18>;
@@ -412,7 +414,7 @@
412 uart3: serial@07000c00 { 414 uart3: serial@07000c00 {
413 compatible = "snps,dw-apb-uart"; 415 compatible = "snps,dw-apb-uart";
414 reg = <0x07000c00 0x400>; 416 reg = <0x07000c00 0x400>;
415 interrupts = <0 3 4>; 417 interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
416 reg-shift = <2>; 418 reg-shift = <2>;
417 reg-io-width = <4>; 419 reg-io-width = <4>;
418 clocks = <&apb1_gates 19>; 420 clocks = <&apb1_gates 19>;
@@ -423,7 +425,7 @@
423 uart4: serial@07001000 { 425 uart4: serial@07001000 {
424 compatible = "snps,dw-apb-uart"; 426 compatible = "snps,dw-apb-uart";
425 reg = <0x07001000 0x400>; 427 reg = <0x07001000 0x400>;
426 interrupts = <0 4 4>; 428 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
427 reg-shift = <2>; 429 reg-shift = <2>;
428 reg-io-width = <4>; 430 reg-io-width = <4>;
429 clocks = <&apb1_gates 20>; 431 clocks = <&apb1_gates 20>;
@@ -434,7 +436,7 @@
434 uart5: serial@07001400 { 436 uart5: serial@07001400 {
435 compatible = "snps,dw-apb-uart"; 437 compatible = "snps,dw-apb-uart";
436 reg = <0x07001400 0x400>; 438 reg = <0x07001400 0x400>;
437 interrupts = <0 5 4>; 439 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
438 reg-shift = <2>; 440 reg-shift = <2>;
439 reg-io-width = <4>; 441 reg-io-width = <4>;
440 clocks = <&apb1_gates 21>; 442 clocks = <&apb1_gates 21>;
@@ -445,7 +447,7 @@
445 i2c0: i2c@07002800 { 447 i2c0: i2c@07002800 {
446 compatible = "allwinner,sun6i-a31-i2c"; 448 compatible = "allwinner,sun6i-a31-i2c";
447 reg = <0x07002800 0x400>; 449 reg = <0x07002800 0x400>;
448 interrupts = <0 6 4>; 450 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
449 clocks = <&apb1_gates 0>; 451 clocks = <&apb1_gates 0>;
450 resets = <&apb1_resets 0>; 452 resets = <&apb1_resets 0>;
451 status = "disabled"; 453 status = "disabled";
@@ -456,7 +458,7 @@
456 i2c1: i2c@07002c00 { 458 i2c1: i2c@07002c00 {
457 compatible = "allwinner,sun6i-a31-i2c"; 459 compatible = "allwinner,sun6i-a31-i2c";
458 reg = <0x07002c00 0x400>; 460 reg = <0x07002c00 0x400>;
459 interrupts = <0 7 4>; 461 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
460 clocks = <&apb1_gates 1>; 462 clocks = <&apb1_gates 1>;
461 resets = <&apb1_resets 1>; 463 resets = <&apb1_resets 1>;
462 status = "disabled"; 464 status = "disabled";
@@ -467,7 +469,7 @@
467 i2c2: i2c@07003000 { 469 i2c2: i2c@07003000 {
468 compatible = "allwinner,sun6i-a31-i2c"; 470 compatible = "allwinner,sun6i-a31-i2c";
469 reg = <0x07003000 0x400>; 471 reg = <0x07003000 0x400>;
470 interrupts = <0 8 4>; 472 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
471 clocks = <&apb1_gates 2>; 473 clocks = <&apb1_gates 2>;
472 resets = <&apb1_resets 2>; 474 resets = <&apb1_resets 2>;
473 status = "disabled"; 475 status = "disabled";
@@ -478,7 +480,7 @@
478 i2c3: i2c@07003400 { 480 i2c3: i2c@07003400 {
479 compatible = "allwinner,sun6i-a31-i2c"; 481 compatible = "allwinner,sun6i-a31-i2c";
480 reg = <0x07003400 0x400>; 482 reg = <0x07003400 0x400>;
481 interrupts = <0 9 4>; 483 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
482 clocks = <&apb1_gates 3>; 484 clocks = <&apb1_gates 3>;
483 resets = <&apb1_resets 3>; 485 resets = <&apb1_resets 3>;
484 status = "disabled"; 486 status = "disabled";
@@ -489,7 +491,7 @@
489 i2c4: i2c@07003800 { 491 i2c4: i2c@07003800 {
490 compatible = "allwinner,sun6i-a31-i2c"; 492 compatible = "allwinner,sun6i-a31-i2c";
491 reg = <0x07003800 0x400>; 493 reg = <0x07003800 0x400>;
492 interrupts = <0 10 4>; 494 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
493 clocks = <&apb1_gates 4>; 495 clocks = <&apb1_gates 4>;
494 resets = <&apb1_resets 4>; 496 resets = <&apb1_resets 4>;
495 status = "disabled"; 497 status = "disabled";
@@ -500,13 +502,13 @@
500 r_wdt: watchdog@08001000 { 502 r_wdt: watchdog@08001000 {
501 compatible = "allwinner,sun6i-a31-wdt"; 503 compatible = "allwinner,sun6i-a31-wdt";
502 reg = <0x08001000 0x20>; 504 reg = <0x08001000 0x20>;
503 interrupts = <0 36 4>; 505 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
504 }; 506 };
505 507
506 r_uart: serial@08002800 { 508 r_uart: serial@08002800 {
507 compatible = "snps,dw-apb-uart"; 509 compatible = "snps,dw-apb-uart";
508 reg = <0x08002800 0x400>; 510 reg = <0x08002800 0x400>;
509 interrupts = <0 38 4>; 511 interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
510 reg-shift = <2>; 512 reg-shift = <2>;
511 reg-io-width = <4>; 513 reg-io-width = <4>;
512 clocks = <&osc24M>; 514 clocks = <&osc24M>;
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-24 12:14:18 -0500