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authorSoren Brinkmann <soren.brinkmann@xilinx.com>2014-08-20 11:56:58 -0400
committerMichal Simek <michal.simek@xilinx.com>2014-09-01 07:10:23 -0400
commitedbd35e70dd563f5e8062bed292a9900073fca48 (patch)
tree688975052fc1ca97af78d7cc453291d7814db2c3 /arch/arm/boot/dts/zynq-7000.dtsi
parentda45581ea825d53a459a90deb48a50b99369502b (diff)
ARM: zynq: DT: Move size/address properties to dtsi
Move the GEM's size and address cells properties to the common dtsi file. Cc: Andreas Färber <afaerber@suse.de> Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Reviewed-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'arch/arm/boot/dts/zynq-7000.dtsi')
-rw-r--r--arch/arm/boot/dts/zynq-7000.dtsi4
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/zynq-7000.dtsi b/arch/arm/boot/dts/zynq-7000.dtsi
index 6cc83d4c6c76..4e6e96ef7bd0 100644
--- a/arch/arm/boot/dts/zynq-7000.dtsi
+++ b/arch/arm/boot/dts/zynq-7000.dtsi
@@ -195,6 +195,8 @@
195 interrupts = <0 22 4>; 195 interrupts = <0 22 4>;
196 clocks = <&clkc 30>, <&clkc 30>, <&clkc 13>; 196 clocks = <&clkc 30>, <&clkc 30>, <&clkc 13>;
197 clock-names = "pclk", "hclk", "tx_clk"; 197 clock-names = "pclk", "hclk", "tx_clk";
198 #address-cells = <1>;
199 #size-cells = <0>;
198 }; 200 };
199 201
200 gem1: ethernet@e000c000 { 202 gem1: ethernet@e000c000 {
@@ -204,6 +206,8 @@
204 interrupts = <0 45 4>; 206 interrupts = <0 45 4>;
205 clocks = <&clkc 31>, <&clkc 31>, <&clkc 14>; 207 clocks = <&clkc 31>, <&clkc 31>, <&clkc 14>;
206 clock-names = "pclk", "hclk", "tx_clk"; 208 clock-names = "pclk", "hclk", "tx_clk";
209 #address-cells = <1>;
210 #size-cells = <0>;
207 }; 211 };
208 212
209 sdhci0: sdhci@e0100000 { 213 sdhci0: sdhci@e0100000 {