aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/boot/dts/vexpress-v2p-ca5s.dts
diff options
context:
space:
mode:
authorPawel Moll <pawel.moll@arm.com>2012-05-10 12:12:07 -0400
committerPawel Moll <pawel.moll@arm.com>2012-05-21 04:30:37 -0400
commite29b65dbc5d0431e8f063fab19fafaaa744d55ce (patch)
treea0e08c67f6b7f1d47fdf30cf3a95f730b825a6b7 /arch/arm/boot/dts/vexpress-v2p-ca5s.dts
parent76e10d158efb6d4516018846f60c2ab5501900bc (diff)
ARM: vexpress: Device Tree updates
* Added extra regs for A15 VGIC * Added A15 architected timer node * Split A5 and A9 TWD nodes into two separate ones for timer and watchdog; interrupt definitions fixed on the way * Fixed typo in A5 GIC compatible value All the changes courtesy of Marc Zyngier. Signed-off-by: Pawel Moll <pawel.moll@arm.com>
Diffstat (limited to 'arch/arm/boot/dts/vexpress-v2p-ca5s.dts')
-rw-r--r--arch/arm/boot/dts/vexpress-v2p-ca5s.dts13
1 files changed, 9 insertions, 4 deletions
diff --git a/arch/arm/boot/dts/vexpress-v2p-ca5s.dts b/arch/arm/boot/dts/vexpress-v2p-ca5s.dts
index 6905e66d4748..18917a0f8604 100644
--- a/arch/arm/boot/dts/vexpress-v2p-ca5s.dts
+++ b/arch/arm/boot/dts/vexpress-v2p-ca5s.dts
@@ -77,13 +77,18 @@
77 77
78 timer@2c000600 { 78 timer@2c000600 {
79 compatible = "arm,cortex-a5-twd-timer"; 79 compatible = "arm,cortex-a5-twd-timer";
80 reg = <0x2c000600 0x38>; 80 reg = <0x2c000600 0x20>;
81 interrupts = <1 2 0x304>, 81 interrupts = <1 13 0x304>;
82 <1 3 0x304>; 82 };
83
84 watchdog@2c000620 {
85 compatible = "arm,cortex-a5-twd-wdt";
86 reg = <0x2c000620 0x20>;
87 interrupts = <1 14 0x304>;
83 }; 88 };
84 89
85 gic: interrupt-controller@2c001000 { 90 gic: interrupt-controller@2c001000 {
86 compatible = "arm,corex-a5-gic", "arm,cortex-a9-gic"; 91 compatible = "arm,cortex-a5-gic", "arm,cortex-a9-gic";
87 #interrupt-cells = <3>; 92 #interrupt-cells = <3>;
88 #address-cells = <0>; 93 #address-cells = <0>;
89 interrupt-controller; 94 interrupt-controller;