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authorPawel Moll <pawel.moll@arm.com>2014-09-18 05:23:06 -0400
committerArnd Bergmann <arnd@arndb.de>2014-09-25 17:54:33 -0400
commit478a4f81af4936c683a03488e15b087e28cb4f0d (patch)
tree7965c38fa9ed4fa927195e8c97f727d4287e6ab4 /arch/arm/boot/dts/vexpress-v2m-rs1.dtsi
parent667bbd533772e2539cf7d7fed7cd7d284a624e37 (diff)
ARM: vexpress: Add CLCD Device Tree properties
... for V2M-P1 motherboard CLCD (limited to 640x480 16bpp and using dedicated video RAM bank) and for V2P-CA9 (up to 1024x768 16bpp). Signed-off-by: Pawel Moll <pawel.moll@arm.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/boot/dts/vexpress-v2m-rs1.dtsi')
-rw-r--r--arch/arm/boot/dts/vexpress-v2m-rs1.dtsi36
1 files changed, 34 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi b/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi
index 756c986995a3..2efb2058ba49 100644
--- a/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi
+++ b/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi
@@ -41,7 +41,7 @@
41 bank-width = <4>; 41 bank-width = <4>;
42 }; 42 };
43 43
44 vram@2,00000000 { 44 v2m_video_ram: vram@2,00000000 {
45 compatible = "arm,vexpress-vram"; 45 compatible = "arm,vexpress-vram";
46 reg = <2 0x00000000 0x00800000>; 46 reg = <2 0x00000000 0x00800000>;
47 }; 47 };
@@ -246,9 +246,41 @@
246 clcd@1f0000 { 246 clcd@1f0000 {
247 compatible = "arm,pl111", "arm,primecell"; 247 compatible = "arm,pl111", "arm,primecell";
248 reg = <0x1f0000 0x1000>; 248 reg = <0x1f0000 0x1000>;
249 interrupt-names = "combined";
249 interrupts = <14>; 250 interrupts = <14>;
250 clocks = <&v2m_oscclk1>, <&smbclk>; 251 clocks = <&v2m_oscclk1>, <&smbclk>;
251 clock-names = "clcdclk", "apb_pclk"; 252 clock-names = "clcdclk", "apb_pclk";
253 memory-region = <&v2m_video_ram>;
254 max-memory-bandwidth = <50350000>; /* 16bpp @ 25.175MHz */
255
256 port {
257 v2m_clcd_pads: endpoint {
258 remote-endpoint = <&v2m_clcd_panel>;
259 arm,pl11x,tft-r0g0b0-pads = <0 8 16>;
260 };
261 };
262
263 panel {
264 compatible = "panel-dpi";
265
266 port {
267 v2m_clcd_panel: endpoint {
268 remote-endpoint = <&v2m_clcd_pads>;
269 };
270 };
271
272 panel-timing {
273 clock-frequency = <25175000>;
274 hactive = <640>;
275 hback-porch = <40>;
276 hfront-porch = <24>;
277 hsync-len = <96>;
278 vactive = <480>;
279 vback-porch = <32>;
280 vfront-porch = <11>;
281 vsync-len = <2>;
282 };
283 };
252 }; 284 };
253 }; 285 };
254 286
@@ -350,7 +382,7 @@
350 /* CLCD clock */ 382 /* CLCD clock */
351 compatible = "arm,vexpress-osc"; 383 compatible = "arm,vexpress-osc";
352 arm,vexpress-sysreg,func = <1 1>; 384 arm,vexpress-sysreg,func = <1 1>;
353 freq-range = <23750000 63500000>; 385 freq-range = <23750000 65000000>;
354 #clock-cells = <0>; 386 #clock-cells = <0>;
355 clock-output-names = "v2m:oscclk1"; 387 clock-output-names = "v2m:oscclk1";
356 }; 388 };