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authorBryan Wu <pengw@nvidia.com>2013-01-02 18:53:51 -0500
committerStephen Warren <swarren@nvidia.com>2013-01-28 13:24:07 -0500
commitd7df69fe256587c5f78961c4d69a95d4a5b12c71 (patch)
tree8ff94c8c2e0f5ade988640f8d66dbc2362fd8a89 /arch/arm/boot/dts/tegra30-beaver.dts
parent6b81c427c08c572ef9e4f20024e71eacbb1a70b6 (diff)
ARM: DT: tegra: Add Tegra30 Beaver board support
This patch adds support for Tegra30 Beaver board in upstream kernel. Beaver board is a Tegra30 SoC based development board, it has following features: - T30 or T33 SoC (Qual core ARM Cortex A9) - 2 GB DDR3L - 16 GB EMMC - 1 SD slot - 1 USB Standart A port and 1 USB micro AB port - PCI-E Gig Ethernet - Audio input/output - SATA port - HDMI output - UART and JTAG Signed-off-by: Bryan Wu <pengw@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
Diffstat (limited to 'arch/arm/boot/dts/tegra30-beaver.dts')
-rw-r--r--arch/arm/boot/dts/tegra30-beaver.dts374
1 files changed, 374 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/tegra30-beaver.dts b/arch/arm/boot/dts/tegra30-beaver.dts
new file mode 100644
index 000000000000..0f296a439eac
--- /dev/null
+++ b/arch/arm/boot/dts/tegra30-beaver.dts
@@ -0,0 +1,374 @@
1/dts-v1/;
2
3/include/ "tegra30.dtsi"
4
5/ {
6 model = "NVIDIA Tegra30 Beaver evaluation board";
7 compatible = "nvidia,beaver", "nvidia,tegra30";
8
9 memory {
10 reg = <0x80000000 0x80000000>;
11 };
12
13 pinmux {
14 pinctrl-names = "default";
15 pinctrl-0 = <&state_default>;
16
17 state_default: pinmux {
18 sdmmc1_clk_pz0 {
19 nvidia,pins = "sdmmc1_clk_pz0";
20 nvidia,function = "sdmmc1";
21 nvidia,pull = <0>;
22 nvidia,tristate = <0>;
23 };
24 sdmmc1_cmd_pz1 {
25 nvidia,pins = "sdmmc1_cmd_pz1",
26 "sdmmc1_dat0_py7",
27 "sdmmc1_dat1_py6",
28 "sdmmc1_dat2_py5",
29 "sdmmc1_dat3_py4";
30 nvidia,function = "sdmmc1";
31 nvidia,pull = <2>;
32 nvidia,tristate = <0>;
33 };
34 sdmmc3_clk_pa6 {
35 nvidia,pins = "sdmmc3_clk_pa6";
36 nvidia,function = "sdmmc3";
37 nvidia,pull = <0>;
38 nvidia,tristate = <0>;
39 };
40 sdmmc3_cmd_pa7 {
41 nvidia,pins = "sdmmc3_cmd_pa7",
42 "sdmmc3_dat0_pb7",
43 "sdmmc3_dat1_pb6",
44 "sdmmc3_dat2_pb5",
45 "sdmmc3_dat3_pb4";
46 nvidia,function = "sdmmc3";
47 nvidia,pull = <2>;
48 nvidia,tristate = <0>;
49 };
50 sdmmc4_clk_pcc4 {
51 nvidia,pins = "sdmmc4_clk_pcc4",
52 "sdmmc4_rst_n_pcc3";
53 nvidia,function = "sdmmc4";
54 nvidia,pull = <0>;
55 nvidia,tristate = <0>;
56 };
57 sdmmc4_dat0_paa0 {
58 nvidia,pins = "sdmmc4_dat0_paa0",
59 "sdmmc4_dat1_paa1",
60 "sdmmc4_dat2_paa2",
61 "sdmmc4_dat3_paa3",
62 "sdmmc4_dat4_paa4",
63 "sdmmc4_dat5_paa5",
64 "sdmmc4_dat6_paa6",
65 "sdmmc4_dat7_paa7";
66 nvidia,function = "sdmmc4";
67 nvidia,pull = <2>;
68 nvidia,tristate = <0>;
69 };
70 dap2_fs_pa2 {
71 nvidia,pins = "dap2_fs_pa2",
72 "dap2_sclk_pa3",
73 "dap2_din_pa4",
74 "dap2_dout_pa5";
75 nvidia,function = "i2s1";
76 nvidia,pull = <0>;
77 nvidia,tristate = <0>;
78 };
79 sdio3 {
80 nvidia,pins = "drive_sdio3";
81 nvidia,high-speed-mode = <0>;
82 nvidia,schmitt = <0>;
83 nvidia,pull-down-strength = <46>;
84 nvidia,pull-up-strength = <42>;
85 nvidia,slew-rate-rising = <1>;
86 nvidia,slew-rate-falling = <1>;
87 };
88 };
89 };
90
91 serial@70006000 {
92 status = "okay";
93 clock-frequency = <408000000>;
94 };
95
96 i2c@7000c000 {
97 status = "okay";
98 clock-frequency = <100000>;
99 };
100
101 i2c@7000c400 {
102 status = "okay";
103 clock-frequency = <100000>;
104 };
105
106 i2c@7000c500 {
107 status = "okay";
108 clock-frequency = <100000>;
109 };
110
111 i2c@7000c700 {
112 status = "okay";
113 clock-frequency = <100000>;
114 };
115
116 i2c@7000d000 {
117 status = "okay";
118 clock-frequency = <100000>;
119
120 tps62361 {
121 compatible = "ti,tps62361";
122 reg = <0x60>;
123
124 regulator-name = "tps62361-vout";
125 regulator-min-microvolt = <500000>;
126 regulator-max-microvolt = <1500000>;
127 regulator-boot-on;
128 regulator-always-on;
129 ti,vsel0-state-high;
130 ti,vsel1-state-high;
131 };
132
133 pmic: tps65911@2d {
134 compatible = "ti,tps65911";
135 reg = <0x2d>;
136
137 interrupts = <0 86 0x4>;
138 #interrupt-cells = <2>;
139 interrupt-controller;
140
141 ti,system-power-controller;
142
143 #gpio-cells = <2>;
144 gpio-controller;
145
146 vcc1-supply = <&vdd_5v_in_reg>;
147 vcc2-supply = <&vdd_5v_in_reg>;
148 vcc3-supply = <&vio_reg>;
149 vcc4-supply = <&vdd_5v_in_reg>;
150 vcc5-supply = <&vdd_5v_in_reg>;
151 vcc6-supply = <&vdd2_reg>;
152 vcc7-supply = <&vdd_5v_in_reg>;
153 vccio-supply = <&vdd_5v_in_reg>;
154
155 regulators {
156 #address-cells = <1>;
157 #size-cells = <0>;
158
159 vdd1_reg: vdd1 {
160 regulator-name = "vddio_ddr_1v2";
161 regulator-min-microvolt = <1200000>;
162 regulator-max-microvolt = <1200000>;
163 regulator-always-on;
164 };
165
166 vdd2_reg: vdd2 {
167 regulator-name = "vdd_1v5_gen";
168 regulator-min-microvolt = <1500000>;
169 regulator-max-microvolt = <1500000>;
170 regulator-always-on;
171 };
172
173 vddctrl_reg: vddctrl {
174 regulator-name = "vdd_cpu,vdd_sys";
175 regulator-min-microvolt = <1000000>;
176 regulator-max-microvolt = <1000000>;
177 regulator-always-on;
178 };
179
180 vio_reg: vio {
181 regulator-name = "vdd_1v8_gen";
182 regulator-min-microvolt = <1800000>;
183 regulator-max-microvolt = <1800000>;
184 regulator-always-on;
185 };
186
187 ldo1_reg: ldo1 {
188 regulator-name = "vdd_pexa,vdd_pexb";
189 regulator-min-microvolt = <1050000>;
190 regulator-max-microvolt = <1050000>;
191 };
192
193 ldo2_reg: ldo2 {
194 regulator-name = "vdd_sata,avdd_plle";
195 regulator-min-microvolt = <1050000>;
196 regulator-max-microvolt = <1050000>;
197 };
198
199 /* LDO3 is not connected to anything */
200
201 ldo4_reg: ldo4 {
202 regulator-name = "vdd_rtc";
203 regulator-min-microvolt = <1200000>;
204 regulator-max-microvolt = <1200000>;
205 regulator-always-on;
206 };
207
208 ldo5_reg: ldo5 {
209 regulator-name = "vddio_sdmmc,avdd_vdac";
210 regulator-min-microvolt = <3300000>;
211 regulator-max-microvolt = <3300000>;
212 regulator-always-on;
213 };
214
215 ldo6_reg: ldo6 {
216 regulator-name = "avdd_dsi_csi,pwrdet_mipi";
217 regulator-min-microvolt = <1200000>;
218 regulator-max-microvolt = <1200000>;
219 };
220
221 ldo7_reg: ldo7 {
222 regulator-name = "vdd_pllm,x,u,a_p_c_s";
223 regulator-min-microvolt = <1200000>;
224 regulator-max-microvolt = <1200000>;
225 regulator-always-on;
226 };
227
228 ldo8_reg: ldo8 {
229 regulator-name = "vdd_ddr_hs";
230 regulator-min-microvolt = <1000000>;
231 regulator-max-microvolt = <1000000>;
232 regulator-always-on;
233 };
234 };
235 };
236 };
237
238 spi@7000da00 {
239 status = "okay";
240 spi-max-frequency = <25000000>;
241 spi-flash@1 {
242 compatible = "winbond,w25q32";
243 reg = <1>;
244 spi-max-frequency = <20000000>;
245 };
246 };
247
248 ahub {
249 i2s@70080400 {
250 status = "okay";
251 };
252 };
253
254 pmc {
255 status = "okay";
256 nvidia,invert-interrupt;
257 };
258
259 sdhci@78000000 {
260 status = "okay";
261 cd-gpios = <&gpio 69 0>; /* gpio PI5 */
262 wp-gpios = <&gpio 155 0>; /* gpio PT3 */
263 power-gpios = <&gpio 31 0>; /* gpio PD7 */
264 bus-width = <4>;
265 };
266
267 sdhci@78000600 {
268 status = "okay";
269 bus-width = <8>;
270 };
271
272 regulators {
273 compatible = "simple-bus";
274 #address-cells = <1>;
275 #size-cells = <0>;
276
277 vdd_5v_in_reg: regulator@0 {
278 compatible = "regulator-fixed";
279 reg = <0>;
280 regulator-name = "vdd_5v_in";
281 regulator-min-microvolt = <5000000>;
282 regulator-max-microvolt = <5000000>;
283 regulator-always-on;
284 };
285
286 chargepump_5v_reg: regulator@1 {
287 compatible = "regulator-fixed";
288 reg = <1>;
289 regulator-name = "chargepump_5v";
290 regulator-min-microvolt = <5000000>;
291 regulator-max-microvolt = <5000000>;
292 regulator-boot-on;
293 regulator-always-on;
294 enable-active-high;
295 gpio = <&pmic 0 0>; /* PMIC TPS65911 GPIO0 */
296 };
297
298 ddr_reg: regulator@2 {
299 compatible = "regulator-fixed";
300 reg = <2>;
301 regulator-name = "vdd_ddr";
302 regulator-min-microvolt = <1500000>;
303 regulator-max-microvolt = <1500000>;
304 regulator-always-on;
305 regulator-boot-on;
306 enable-active-high;
307 gpio = <&pmic 7 0>; /* PMIC TPS65911 GPIO7 */
308 vin-supply = <&vdd_5v_in_reg>;
309 };
310
311 vdd_5v_sata_reg: regulator@3 {
312 compatible = "regulator-fixed";
313 reg = <3>;
314 regulator-name = "vdd_5v_sata";
315 regulator-min-microvolt = <5000000>;
316 regulator-max-microvolt = <5000000>;
317 regulator-always-on;
318 regulator-boot-on;
319 enable-active-high;
320 gpio = <&gpio 30 0>; /* gpio PD6 */
321 vin-supply = <&vdd_5v_in_reg>;
322 };
323
324 usb1_vbus_reg: regulator@4 {
325 compatible = "regulator-fixed";
326 reg = <4>;
327 regulator-name = "usb1_vbus";
328 regulator-min-microvolt = <5000000>;
329 regulator-max-microvolt = <5000000>;
330 enable-active-high;
331 gpio = <&gpio 68 0>; /* GPIO PI4 */
332 gpio-open-drain;
333 vin-supply = <&vdd_5v_in_reg>;
334 };
335
336 usb3_vbus_reg: regulator@5 {
337 compatible = "regulator-fixed";
338 reg = <5>;
339 regulator-name = "usb3_vbus";
340 regulator-min-microvolt = <5000000>;
341 regulator-max-microvolt = <5000000>;
342 enable-active-high;
343 gpio = <&gpio 63 0>; /* GPIO PH7 */
344 gpio-open-drain;
345 vin-supply = <&vdd_5v_in_reg>;
346 };
347
348 sys_3v3_reg: regulator@6 {
349 compatible = "regulator-fixed";
350 reg = <6>;
351 regulator-name = "sys_3v3,vdd_3v3_alw";
352 regulator-min-microvolt = <3300000>;
353 regulator-max-microvolt = <3300000>;
354 regulator-always-on;
355 regulator-boot-on;
356 enable-active-high;
357 gpio = <&pmic 6 0>; /* PMIC TPS65911 GPIO6 */
358 vin-supply = <&vdd_5v_in_reg>;
359 };
360
361 sys_3v3_pexs_reg: regulator@7 {
362 compatible = "regulator-fixed";
363 reg = <7>;
364 regulator-name = "sys_3v3_pexs";
365 regulator-min-microvolt = <3300000>;
366 regulator-max-microvolt = <3300000>;
367 regulator-always-on;
368 regulator-boot-on;
369 enable-active-high;
370 gpio = <&gpio 95 0>; /* gpio PL7 */
371 vin-supply = <&sys_3v3_reg>;
372 };
373 };
374};
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-10 21:56:29 -0500