clk: tegra: Fix cdev1 and cdev2 IDs

Correct IDs for cdev1 and cdev2 are 94 and 93 respectively.

Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
[swarren: split into separate driver and device-tree patches]
Signed-off-by: Stephen Warren <swarren@nvidia.com>

1 files changed, 1 insertions, 1 deletions

diff --git a/arch/arm/boot/dts/tegra20-ventana.dts b/arch/arm/boot/dts/tegra20-ventana.dts
index 395df485d558..dd38f1f03834 100644
--- a/arch/arm/boot/dts/tegra20-ventana.dts
+++ b/arch/arm/boot/dts/tegra20-ventana.dts
@@ -640,7 +640,7 @@
                 nvidia,int-mic-en-gpios = <&gpio 184 0>; /* gpio PX0 */
                 nvidia,ext-mic-en-gpios = <&gpio 185 0>; /* gpio PX1 */
 
-                clocks = <&tegra_car 112>, <&tegra_car 113>, <&tegra_car 93>;
+                clocks = <&tegra_car 112>, <&tegra_car 113>, <&tegra_car 94>;
                 clock-names = "pll_a", "pll_a_out0", "mclk";
         };
 };