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authorStephen Warren <swarren@nvidia.com>2013-03-12 19:03:30 -0400
committerStephen Warren <swarren@nvidia.com>2013-05-28 18:13:51 -0400
commit15e5c647279913786788a2afaf9cd1a22b5ca7f8 (patch)
treeb3fb1d4a8d799b5637ecb040d20624516692fbaa /arch/arm/boot/dts/tegra114.dtsi
parenta1c85860e29d600f36363ffb16bdcb643a0336dc (diff)
ARM: tegra: add audio-related nodes to Tegra114 DT
Add nodes for the Tegra114 AHUB and I2S controllers. Signed-off-by: Stephen Warren <swarren@nvidia.com>
Diffstat (limited to 'arch/arm/boot/dts/tegra114.dtsi')
-rw-r--r--arch/arm/boot/dts/tegra114.dtsi71
1 files changed, 71 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/tegra114.dtsi b/arch/arm/boot/dts/tegra114.dtsi
index 289c8a28c210..abf6c40d28c6 100644
--- a/arch/arm/boot/dts/tegra114.dtsi
+++ b/arch/arm/boot/dts/tegra114.dtsi
@@ -327,6 +327,77 @@
327 nvidia,ahb = <&ahb>; 327 nvidia,ahb = <&ahb>;
328 }; 328 };
329 329
330 ahub {
331 compatible = "nvidia,tegra114-ahub";
332 reg = <0x70080000 0x200>,
333 <0x70080200 0x100>,
334 <0x70081000 0x200>;
335 interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
336 nvidia,dma-request-selector = <&apbdma 1>, <&apbdma 2>,
337 <&apbdma 3>, <&apbdma 4>, <&apbdma 6>, <&apbdma 7>,
338 <&apbdma 12>, <&apbdma 13>, <&apbdma 14>,
339 <&apbdma 29>;
340 clocks = <&tegra_car TEGRA114_CLK_D_AUDIO>,
341 <&tegra_car TEGRA114_CLK_APBIF>,
342 <&tegra_car TEGRA114_CLK_I2S0>,
343 <&tegra_car TEGRA114_CLK_I2S1>,
344 <&tegra_car TEGRA114_CLK_I2S2>,
345 <&tegra_car TEGRA114_CLK_I2S3>,
346 <&tegra_car TEGRA114_CLK_I2S4>,
347 <&tegra_car TEGRA114_CLK_DAM0>,
348 <&tegra_car TEGRA114_CLK_DAM1>,
349 <&tegra_car TEGRA114_CLK_DAM2>,
350 <&tegra_car TEGRA114_CLK_SPDIF_IN>,
351 <&tegra_car TEGRA114_CLK_AMX>,
352 <&tegra_car TEGRA114_CLK_ADX>;
353 clock-names = "d_audio", "apbif", "i2s0", "i2s1", "i2s2",
354 "i2s3", "i2s4", "dam0", "dam1", "dam2",
355 "spdif_in", "amx", "adx";
356 ranges;
357 #address-cells = <1>;
358 #size-cells = <1>;
359
360 tegra_i2s0: i2s@70080300 {
361 compatible = "nvidia,tegra114-i2s", "nvidia,tegra30-i2s";
362 reg = <0x70080300 0x100>;
363 nvidia,ahub-cif-ids = <4 4>;
364 clocks = <&tegra_car TEGRA114_CLK_I2S0>;
365 status = "disabled";
366 };
367
368 tegra_i2s1: i2s@70080400 {
369 compatible = "nvidia,tegra114-i2s", "nvidia,tegra30-i2s";
370 reg = <0x70080400 0x100>;
371 nvidia,ahub-cif-ids = <5 5>;
372 clocks = <&tegra_car TEGRA114_CLK_I2S1>;
373 status = "disabled";
374 };
375
376 tegra_i2s2: i2s@70080500 {
377 compatible = "nvidia,tegra114-i2s", "nvidia,tegra30-i2s";
378 reg = <0x70080500 0x100>;
379 nvidia,ahub-cif-ids = <6 6>;
380 clocks = <&tegra_car TEGRA114_CLK_I2S2>;
381 status = "disabled";
382 };
383
384 tegra_i2s3: i2s@70080600 {
385 compatible = "nvidia,tegra114-i2s", "nvidia,tegra30-i2s";
386 reg = <0x70080600 0x100>;
387 nvidia,ahub-cif-ids = <7 7>;
388 clocks = <&tegra_car TEGRA114_CLK_I2S3>;
389 status = "disabled";
390 };
391
392 tegra_i2s4: i2s@70080700 {
393 compatible = "nvidia,tegra114-i2s", "nvidia,tegra30-i2s";
394 reg = <0x70080700 0x100>;
395 nvidia,ahub-cif-ids = <8 8>;
396 clocks = <&tegra_car TEGRA114_CLK_I2S4>;
397 status = "disabled";
398 };
399 };
400
330 sdhci@78000000 { 401 sdhci@78000000 {
331 compatible = "nvidia,tegra114-sdhci", "nvidia,tegra30-sdhci"; 402 compatible = "nvidia,tegra114-sdhci", "nvidia,tegra30-sdhci";
332 reg = <0x78000000 0x200>; 403 reg = <0x78000000 0x200>;