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authorChen-Yu Tsai <wens@csie.org>2015-01-11 23:34:03 -0500
committerMaxime Ripard <maxime.ripard@free-electrons.com>2015-01-21 03:59:09 -0500
commitb6d34248b8485ef5dc51952bd5e72ca2b9226ff0 (patch)
treef8588213f786b85c7044a5f2b1e08a6d830d3887 /arch/arm/boot/dts/sun7i-a20.dtsi
parentddfd0232ede34e673fe338d1e5a7ec7aa022aa99 (diff)
ARM: dts: sun7i: Add cpu thermal zones to dtsi
The core temperature sensor now supports thermal zones. Add a thermal zone mapping for the cpus with passive cooling (cpufreq throttling). Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Eduardo Valentin <edubezval@gmail.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Diffstat (limited to 'arch/arm/boot/dts/sun7i-a20.dtsi')
-rw-r--r--arch/arm/boot/dts/sun7i-a20.dtsi33
1 files changed, 33 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
index beb0b7f6464c..929630aee299 100644
--- a/arch/arm/boot/dts/sun7i-a20.dtsi
+++ b/arch/arm/boot/dts/sun7i-a20.dtsi
@@ -50,6 +50,7 @@
50#include "skeleton.dtsi" 50#include "skeleton.dtsi"
51 51
52#include <dt-bindings/interrupt-controller/arm-gic.h> 52#include <dt-bindings/interrupt-controller/arm-gic.h>
53#include <dt-bindings/thermal/thermal.h>
53 54
54#include <dt-bindings/dma/sun4i-a10.h> 55#include <dt-bindings/dma/sun4i-a10.h>
55#include <dt-bindings/pinctrl/sun4i-a10.h> 56#include <dt-bindings/pinctrl/sun4i-a10.h>
@@ -133,6 +134,38 @@
133 }; 134 };
134 }; 135 };
135 136
137 thermal-zones {
138 cpu_thermal {
139 /* milliseconds */
140 polling-delay-passive = <250>;
141 polling-delay = <1000>;
142 thermal-sensors = <&rtp>;
143
144 cooling-maps {
145 map0 {
146 trip = <&cpu_alert0>;
147 cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
148 };
149 };
150
151 trips {
152 cpu_alert0: cpu_alert0 {
153 /* milliCelsius */
154 temperature = <75000>;
155 hysteresis = <2000>;
156 type = "passive";
157 };
158
159 cpu_crit: cpu_crit {
160 /* milliCelsius */
161 temperature = <100000>;
162 hysteresis = <2000>;
163 type = "critical";
164 };
165 };
166 };
167 };
168
136 memory { 169 memory {
137 reg = <0x40000000 0x80000000>; 170 reg = <0x40000000 0x80000000>;
138 }; 171 };