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authorChen-Yu Tsai <wens@csie.org>2014-11-26 02:16:53 -0500
committerMaxime Ripard <maxime.ripard@free-electrons.com>2014-12-21 17:51:37 -0500
commit42cc71365ebf1ec35a667d76d32be8503c6d84e9 (patch)
tree91c1f68e27b6db1faef734a139d5e34c0ad00d88 /arch/arm/boot/dts/sun6i-a31.dtsi
parent7954dfaee386d45d6ec655e5153ad67edf311a56 (diff)
ARM: dts: sun6i: Unify ahb1 clock nodes
The clock driver has unified support for the ahb1 clock. Unify the clock nodes so it works. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Diffstat (limited to 'arch/arm/boot/dts/sun6i-a31.dtsi')
-rw-r--r--arch/arm/boot/dts/sun6i-a31.dtsi14
1 files changed, 3 insertions, 11 deletions
diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6i-a31.dtsi
index f47156b6572b..62d932e9b7d1 100644
--- a/arch/arm/boot/dts/sun6i-a31.dtsi
+++ b/arch/arm/boot/dts/sun6i-a31.dtsi
@@ -174,19 +174,11 @@
174 clock-output-names = "axi"; 174 clock-output-names = "axi";
175 }; 175 };
176 176
177 ahb1_mux: ahb1_mux@01c20054 {
178 #clock-cells = <0>;
179 compatible = "allwinner,sun6i-a31-ahb1-mux-clk";
180 reg = <0x01c20054 0x4>;
181 clocks = <&osc32k>, <&osc24M>, <&axi>, <&pll6 0>;
182 clock-output-names = "ahb1_mux";
183 };
184
185 ahb1: ahb1@01c20054 { 177 ahb1: ahb1@01c20054 {
186 #clock-cells = <0>; 178 #clock-cells = <0>;
187 compatible = "allwinner,sun4i-a10-ahb-clk"; 179 compatible = "allwinner,sun6i-a31-ahb1-clk";
188 reg = <0x01c20054 0x4>; 180 reg = <0x01c20054 0x4>;
189 clocks = <&ahb1_mux>; 181 clocks = <&osc32k>, <&osc24M>, <&axi>, <&pll6 0>;
190 clock-output-names = "ahb1"; 182 clock-output-names = "ahb1";
191 }; 183 };
192 184
@@ -367,7 +359,7 @@
367 #dma-cells = <1>; 359 #dma-cells = <1>;
368 360
369 /* DMA controller requires AHB1 clocked from PLL6 */ 361 /* DMA controller requires AHB1 clocked from PLL6 */
370 assigned-clocks = <&ahb1_mux>; 362 assigned-clocks = <&ahb1>;
371 assigned-clock-parents = <&pll6 0>; 363 assigned-clock-parents = <&pll6 0>;
372 }; 364 };
373 365