diff options
author | Chen-Yu Tsai <wens@csie.org> | 2015-01-05 21:35:20 -0500 |
---|---|---|
committer | Maxime Ripard <maxime.ripard@free-electrons.com> | 2015-01-21 03:58:59 -0500 |
commit | 882facf7400f4acecc814977e980cd6f7e7ae718 (patch) | |
tree | 5e3259f66d25e11026b684a6bac284d65104e233 /arch/arm/boot/dts/sun5i-a13.dtsi | |
parent | d96b7161916f1b5c1a676fba2d54ef0106a88aff (diff) |
ARM: dts: sun5i: Add cpu clock reference and operating points to dtsi
The cpu core is clocked from the "cpu" clock. Add a reference to it
in the first cpu node. Also add "cpu0" label to the node.
The operating points were taken from the A13 FEX files in the
sunxi-boards repository. All FEX files have the same settings.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Diffstat (limited to 'arch/arm/boot/dts/sun5i-a13.dtsi')
-rw-r--r-- | arch/arm/boot/dts/sun5i-a13.dtsi | 18 |
1 files changed, 17 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/sun5i-a13.dtsi b/arch/arm/boot/dts/sun5i-a13.dtsi index b3c3573f8fbc..dee2aa5bc9ed 100644 --- a/arch/arm/boot/dts/sun5i-a13.dtsi +++ b/arch/arm/boot/dts/sun5i-a13.dtsi | |||
@@ -27,10 +27,26 @@ | |||
27 | cpus { | 27 | cpus { |
28 | #address-cells = <1>; | 28 | #address-cells = <1>; |
29 | #size-cells = <0>; | 29 | #size-cells = <0>; |
30 | cpu@0 { | 30 | |
31 | cpu0: cpu@0 { | ||
31 | device_type = "cpu"; | 32 | device_type = "cpu"; |
32 | compatible = "arm,cortex-a8"; | 33 | compatible = "arm,cortex-a8"; |
33 | reg = <0x0>; | 34 | reg = <0x0>; |
35 | clocks = <&cpu>; | ||
36 | clock-latency = <244144>; /* 8 32k periods */ | ||
37 | operating-points = < | ||
38 | /* kHz uV */ | ||
39 | 1104000 1500000 | ||
40 | 1008000 1400000 | ||
41 | 912000 1350000 | ||
42 | 864000 1300000 | ||
43 | 624000 1200000 | ||
44 | 576000 1200000 | ||
45 | 432000 1200000 | ||
46 | >; | ||
47 | #cooling-cells = <2>; | ||
48 | cooling-min-level = <0>; | ||
49 | cooling-max-level = <6>; | ||
34 | }; | 50 | }; |
35 | }; | 51 | }; |
36 | 52 | ||