diff options
author | Maxime Ripard <maxime.ripard@free-electrons.com> | 2014-02-22 16:35:55 -0500 |
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committer | Maxime Ripard <maxime.ripard@free-electrons.com> | 2014-02-24 04:01:42 -0500 |
commit | 65918e26069a1aa3f693360a0d77bd41cd1b680b (patch) | |
tree | 42e168e280d1829a616a41ea1fe483bc984340a7 /arch/arm/boot/dts/sun4i-a10.dtsi | |
parent | 36ab3e73b7acd50f77070de696cb349abfd8ae6f (diff) |
ARM: dt: sun4i: Add A10 SPI controller nodes
The A10 has 4 SPI controllers that are now supported. Add them in the DT.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Diffstat (limited to 'arch/arm/boot/dts/sun4i-a10.dtsi')
-rw-r--r-- | arch/arm/boot/dts/sun4i-a10.dtsi | 44 |
1 files changed, 44 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi index 5b18f7d94853..2c01b0b77de2 100644 --- a/arch/arm/boot/dts/sun4i-a10.dtsi +++ b/arch/arm/boot/dts/sun4i-a10.dtsi | |||
@@ -339,6 +339,28 @@ | |||
339 | #size-cells = <1>; | 339 | #size-cells = <1>; |
340 | ranges; | 340 | ranges; |
341 | 341 | ||
342 | spi0: spi@01c05000 { | ||
343 | compatible = "allwinner,sun4i-a10-spi"; | ||
344 | reg = <0x01c05000 0x1000>; | ||
345 | interrupts = <10>; | ||
346 | clocks = <&ahb_gates 20>, <&spi0_clk>; | ||
347 | clock-names = "ahb", "mod"; | ||
348 | status = "disabled"; | ||
349 | #address-cells = <1>; | ||
350 | #size-cells = <0>; | ||
351 | }; | ||
352 | |||
353 | spi1: spi@01c06000 { | ||
354 | compatible = "allwinner,sun4i-a10-spi"; | ||
355 | reg = <0x01c06000 0x1000>; | ||
356 | interrupts = <11>; | ||
357 | clocks = <&ahb_gates 21>, <&spi1_clk>; | ||
358 | clock-names = "ahb", "mod"; | ||
359 | status = "disabled"; | ||
360 | #address-cells = <1>; | ||
361 | #size-cells = <0>; | ||
362 | }; | ||
363 | |||
342 | emac: ethernet@01c0b000 { | 364 | emac: ethernet@01c0b000 { |
343 | compatible = "allwinner,sun4i-emac"; | 365 | compatible = "allwinner,sun4i-emac"; |
344 | reg = <0x01c0b000 0x1000>; | 366 | reg = <0x01c0b000 0x1000>; |
@@ -355,6 +377,28 @@ | |||
355 | #size-cells = <0>; | 377 | #size-cells = <0>; |
356 | }; | 378 | }; |
357 | 379 | ||
380 | spi2: spi@01c17000 { | ||
381 | compatible = "allwinner,sun4i-a10-spi"; | ||
382 | reg = <0x01c17000 0x1000>; | ||
383 | interrupts = <12>; | ||
384 | clocks = <&ahb_gates 22>, <&spi2_clk>; | ||
385 | clock-names = "ahb", "mod"; | ||
386 | status = "disabled"; | ||
387 | #address-cells = <1>; | ||
388 | #size-cells = <0>; | ||
389 | }; | ||
390 | |||
391 | spi3: spi@01c1f000 { | ||
392 | compatible = "allwinner,sun4i-a10-spi"; | ||
393 | reg = <0x01c1f000 0x1000>; | ||
394 | interrupts = <50>; | ||
395 | clocks = <&ahb_gates 23>, <&spi3_clk>; | ||
396 | clock-names = "ahb", "mod"; | ||
397 | status = "disabled"; | ||
398 | #address-cells = <1>; | ||
399 | #size-cells = <0>; | ||
400 | }; | ||
401 | |||
358 | intc: interrupt-controller@01c20400 { | 402 | intc: interrupt-controller@01c20400 { |
359 | compatible = "allwinner,sun4i-ic"; | 403 | compatible = "allwinner,sun4i-ic"; |
360 | reg = <0x01c20400 0x400>; | 404 | reg = <0x01c20400 0x400>; |