diff options
| author | Vipul Kumar Samar <vipulkumar.samar@st.com> | 2012-07-04 23:51:47 -0400 |
|---|---|---|
| committer | Viresh Kumar <viresh.kumar@linaro.org> | 2012-11-26 05:22:53 -0500 |
| commit | 7db083e0e1b70b0300eeb5945538e725c018f8e0 (patch) | |
| tree | cf0adb82f4069bb585192dd4d5bf413a4014d17e /arch/arm/boot/dts/spear1340-evb.dts | |
| parent | 7cef07d5cd25b1286376d1e8948f75b89d34a37e (diff) | |
ARM: SPEAr: DT: Update pinctrl list
This patch updates pinctrl configuration for SPEAr SoC's.
Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com>
Signed-off-by: Vipul Kumar Samar <vipulkumar.samar@st.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Diffstat (limited to 'arch/arm/boot/dts/spear1340-evb.dts')
| -rw-r--r-- | arch/arm/boot/dts/spear1340-evb.dts | 35 |
1 files changed, 21 insertions, 14 deletions
diff --git a/arch/arm/boot/dts/spear1340-evb.dts b/arch/arm/boot/dts/spear1340-evb.dts index 045f7123ffac..1fc558424d96 100644 --- a/arch/arm/boot/dts/spear1340-evb.dts +++ b/arch/arm/boot/dts/spear1340-evb.dts | |||
| @@ -38,20 +38,15 @@ | |||
| 38 | st,pins = "fsmc_8bit_grp"; | 38 | st,pins = "fsmc_8bit_grp"; |
| 39 | st,function = "fsmc"; | 39 | st,function = "fsmc"; |
| 40 | }; | 40 | }; |
| 41 | kbd { | ||
| 42 | st,pins = "keyboard_row_col_grp", | ||
| 43 | "keyboard_col5_grp"; | ||
| 44 | st,function = "keyboard"; | ||
| 45 | }; | ||
| 46 | uart0 { | 41 | uart0 { |
| 47 | st,pins = "uart0_grp", "uart0_enh_grp"; | 42 | st,pins = "uart0_grp"; |
| 48 | st,function = "uart0"; | 43 | st,function = "uart0"; |
| 49 | }; | 44 | }; |
| 50 | i2c0-pmx { | 45 | i2c0 { |
| 51 | st,pins = "i2c0_grp"; | 46 | st,pins = "i2c0_grp"; |
| 52 | st,function = "i2c0"; | 47 | st,function = "i2c0"; |
| 53 | }; | 48 | }; |
| 54 | i2c1-pmx { | 49 | i2c1 { |
| 55 | st,pins = "i2c1_grp"; | 50 | st,pins = "i2c1_grp"; |
| 56 | st,function = "i2c1"; | 51 | st,function = "i2c1"; |
| 57 | }; | 52 | }; |
| @@ -64,14 +59,9 @@ | |||
| 64 | st,function = "spdif_out"; | 59 | st,function = "spdif_out"; |
| 65 | }; | 60 | }; |
| 66 | ssp0 { | 61 | ssp0 { |
| 67 | st,pins = "ssp0_grp", "ssp0_cs1_grp", | 62 | st,pins = "ssp0_grp", "ssp0_cs1_grp", "ssp0_cs2_grp", "ssp0_cs3_grp"; |
| 68 | "ssp0_cs3_grp"; | ||
| 69 | st,function = "ssp0"; | 63 | st,function = "ssp0"; |
| 70 | }; | 64 | }; |
| 71 | pwm { | ||
| 72 | st,pins = "pwm2_grp", "pwm3_grp"; | ||
| 73 | st,function = "pwm"; | ||
| 74 | }; | ||
| 75 | smi-pmx { | 65 | smi-pmx { |
| 76 | st,pins = "smi_grp"; | 66 | st,pins = "smi_grp"; |
| 77 | st,function = "smi"; | 67 | st,function = "smi"; |
| @@ -84,6 +74,18 @@ | |||
| 84 | st,pins = "gmii_grp", "rgmii_grp"; | 74 | st,pins = "gmii_grp", "rgmii_grp"; |
| 85 | st,function = "gmac"; | 75 | st,function = "gmac"; |
| 86 | }; | 76 | }; |
| 77 | cam0 { | ||
| 78 | st,pins = "cam0_grp"; | ||
| 79 | st,function = "cam0"; | ||
| 80 | }; | ||
| 81 | cam1 { | ||
| 82 | st,pins = "cam1_grp"; | ||
| 83 | st,function = "cam1"; | ||
| 84 | }; | ||
| 85 | cam2 { | ||
| 86 | st,pins = "cam2_grp"; | ||
| 87 | st,function = "cam2"; | ||
| 88 | }; | ||
| 87 | cam3 { | 89 | cam3 { |
| 88 | st,pins = "cam3_grp"; | 90 | st,pins = "cam3_grp"; |
| 89 | st,function = "cam3"; | 91 | st,function = "cam3"; |
| @@ -108,6 +110,11 @@ | |||
| 108 | st,pins = "sata_grp"; | 110 | st,pins = "sata_grp"; |
| 109 | st,function = "sata"; | 111 | st,function = "sata"; |
| 110 | }; | 112 | }; |
| 113 | pcie { | ||
| 114 | st,pins = "pcie_grp"; | ||
| 115 | st,function = "pcie"; | ||
| 116 | }; | ||
| 117 | |||
| 111 | }; | 118 | }; |
| 112 | }; | 119 | }; |
| 113 | 120 | ||