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authorLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>2014-01-07 03:22:53 -0500
committerSimon Horman <horms+renesas@verge.net.au>2014-02-03 20:16:58 -0500
commit3f2beaa9f2d7229c041975e40868dee2e3c4a598 (patch)
tree12bfb49e8ade6d3bfab5ddcdbf1b5e747da53d36 /arch/arm/boot/dts/r8a7790.dtsi
parent597af20fa8f810a26c84179a8ac58cb3fce6c102 (diff)
ARM: shmobile: r8a7790: Add VIN clocks to device tree
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'arch/arm/boot/dts/r8a7790.dtsi')
-rw-r--r--arch/arm/boot/dts/r8a7790.dtsi9
1 files changed, 6 insertions, 3 deletions
diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index 15e2a97e5bdf..9e4202c92819 100644
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi
@@ -708,10 +708,13 @@
708 mstp8_clks: mstp8_clks@e6150990 { 708 mstp8_clks: mstp8_clks@e6150990 {
709 compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks"; 709 compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
710 reg = <0 0xe6150990 0 4>, <0 0xe61509a0 0 4>; 710 reg = <0 0xe6150990 0 4>, <0 0xe61509a0 0 4>;
711 clocks = <&p_clk>; 711 clocks = <&zg_clk>, <&zg_clk>, <&zg_clk>, <&zg_clk>, <&p_clk>;
712 #clock-cells = <1>; 712 #clock-cells = <1>;
713 renesas,clock-indices = <R8A7790_CLK_ETHER>; 713 renesas,clock-indices = <
714 clock-output-names = "ether"; 714 R8A7790_CLK_VIN3 R8A7790_CLK_VIN2 R8A7790_CLK_VIN1
715 R8A7790_CLK_VIN0 R8A7790_CLK_ETHER
716 >;
717 clock-output-names = "vin3", "vin2", "vin1", "vin0", "ether";
715 }; 718 };
716 mstp9_clks: mstp9_clks@e6150994 { 719 mstp9_clks: mstp9_clks@e6150994 {
717 compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks"; 720 compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";