diff options
author | Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> | 2014-01-21 10:00:46 -0500 |
---|---|---|
committer | Simon Horman <horms+renesas@verge.net.au> | 2014-10-26 20:53:56 -0400 |
commit | 3ac6a83c09cbb74ebb3d3e7e6e40e1ead3ff9d01 (patch) | |
tree | be27ee9755fd30d577450a655260003dee3f4103 /arch/arm/boot/dts/r8a7790.dtsi | |
parent | 1f08bbe8ac737a728812df88cbb3049842df7b84 (diff) |
ARM: shmobile: r8a7790: Add DU node to device tree
Add the DU device with a disabled state. Boards that want to enable the
DU need to specify the output topology.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
[horms+renesas@verge.net.au: resolved minor conflict]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'arch/arm/boot/dts/r8a7790.dtsi')
-rw-r--r-- | arch/arm/boot/dts/r8a7790.dtsi | 90 |
1 files changed, 90 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi index d0e17733dc1a..b7c59b7b06b0 100644 --- a/arch/arm/boot/dts/r8a7790.dtsi +++ b/arch/arm/boot/dts/r8a7790.dtsi | |||
@@ -600,6 +600,96 @@ | |||
600 | status = "disabled"; | 600 | status = "disabled"; |
601 | }; | 601 | }; |
602 | 602 | ||
603 | vsp1@fe920000 { | ||
604 | compatible = "renesas,vsp1"; | ||
605 | reg = <0 0xfe920000 0 0x8000>; | ||
606 | interrupts = <0 266 IRQ_TYPE_LEVEL_HIGH>; | ||
607 | clocks = <&mstp1_clks R8A7790_CLK_VSP1_R>; | ||
608 | |||
609 | renesas,has-sru; | ||
610 | renesas,#rpf = <5>; | ||
611 | renesas,#uds = <1>; | ||
612 | renesas,#wpf = <4>; | ||
613 | }; | ||
614 | |||
615 | vsp1@fe928000 { | ||
616 | compatible = "renesas,vsp1"; | ||
617 | reg = <0 0xfe928000 0 0x8000>; | ||
618 | interrupts = <0 267 IRQ_TYPE_LEVEL_HIGH>; | ||
619 | clocks = <&mstp1_clks R8A7790_CLK_VSP1_S>; | ||
620 | |||
621 | renesas,has-lut; | ||
622 | renesas,has-sru; | ||
623 | renesas,#rpf = <5>; | ||
624 | renesas,#uds = <3>; | ||
625 | renesas,#wpf = <4>; | ||
626 | }; | ||
627 | |||
628 | vsp1@fe930000 { | ||
629 | compatible = "renesas,vsp1"; | ||
630 | reg = <0 0xfe930000 0 0x8000>; | ||
631 | interrupts = <0 246 IRQ_TYPE_LEVEL_HIGH>; | ||
632 | clocks = <&mstp1_clks R8A7790_CLK_VSP1_DU0>; | ||
633 | |||
634 | renesas,has-lif; | ||
635 | renesas,has-lut; | ||
636 | renesas,#rpf = <4>; | ||
637 | renesas,#uds = <1>; | ||
638 | renesas,#wpf = <4>; | ||
639 | }; | ||
640 | |||
641 | vsp1@fe938000 { | ||
642 | compatible = "renesas,vsp1"; | ||
643 | reg = <0 0xfe938000 0 0x8000>; | ||
644 | interrupts = <0 247 IRQ_TYPE_LEVEL_HIGH>; | ||
645 | clocks = <&mstp1_clks R8A7790_CLK_VSP1_DU1>; | ||
646 | |||
647 | renesas,has-lif; | ||
648 | renesas,has-lut; | ||
649 | renesas,#rpf = <4>; | ||
650 | renesas,#uds = <1>; | ||
651 | renesas,#wpf = <4>; | ||
652 | }; | ||
653 | |||
654 | du: display@feb00000 { | ||
655 | compatible = "renesas,du-r8a7790"; | ||
656 | reg = <0 0xfeb00000 0 0x70000>, | ||
657 | <0 0xfeb90000 0 0x1c>, | ||
658 | <0 0xfeb94000 0 0x1c>; | ||
659 | reg-names = "du", "lvds.0", "lvds.1"; | ||
660 | interrupts = <0 256 IRQ_TYPE_LEVEL_HIGH>, | ||
661 | <0 268 IRQ_TYPE_LEVEL_HIGH>, | ||
662 | <0 269 IRQ_TYPE_LEVEL_HIGH>; | ||
663 | clocks = <&mstp7_clks R8A7790_CLK_DU0>, | ||
664 | <&mstp7_clks R8A7790_CLK_DU1>, | ||
665 | <&mstp7_clks R8A7790_CLK_DU2>, | ||
666 | <&mstp7_clks R8A7790_CLK_LVDS0>, | ||
667 | <&mstp7_clks R8A7790_CLK_LVDS1>; | ||
668 | clock-names = "du.0", "du.1", "du.2", "lvds.0", "lvds.1"; | ||
669 | status = "disabled"; | ||
670 | |||
671 | ports { | ||
672 | #address-cells = <1>; | ||
673 | #size-cells = <0>; | ||
674 | |||
675 | port@0 { | ||
676 | reg = <0>; | ||
677 | du_out_rgb: endpoint { | ||
678 | }; | ||
679 | }; | ||
680 | port@1 { | ||
681 | reg = <1>; | ||
682 | du_out_lvds0: endpoint { | ||
683 | }; | ||
684 | }; | ||
685 | port@2 { | ||
686 | reg = <2>; | ||
687 | du_out_lvds1: endpoint { | ||
688 | }; | ||
689 | }; | ||
690 | }; | ||
691 | }; | ||
692 | |||
603 | clocks { | 693 | clocks { |
604 | #address-cells = <2>; | 694 | #address-cells = <2>; |
605 | #size-cells = <2>; | 695 | #size-cells = <2>; |