ARM: DT: msm8660: Add sdcc nodes

Add the sdcc nodes to support the SD card controller using pl180
mmci driver. We also add a temporary fixed regulator until the
regulator driver is mainlined.

Cc: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Kumar Gala <galak@codeaurora.org>

1 files changed, 51 insertions, 0 deletions

diff --git a/arch/arm/boot/dts/qcom-msm8660.dtsi b/arch/arm/boot/dts/qcom-msm8660.dtsi
index a3fd26b8139f..0affd6193f56 100644
--- a/arch/arm/boot/dts/qcom-msm8660.dtsi
+++ b/arch/arm/boot/dts/qcom-msm8660.dtsi
@@ -2,6 +2,7 @@
 
 /include/ "skeleton.dtsi"
 
+#include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/clock/qcom,gcc-msm8660.h>
 #include <dt-bindings/soc/qcom,gsbi.h>
 
@@ -146,5 +147,55 @@
                                 };
                         };
                 };
+
+                /* Temporary fixed regulator */
+                vsdcc_fixed: vsdcc-regulator {
+                        compatible = "regulator-fixed";
+                        regulator-name = "SDCC Power";
+                        regulator-min-microvolt = <2700000>;
+                        regulator-max-microvolt = <2700000>;
+                        regulator-always-on;
+                };
+
+                amba {
+                        compatible = "arm,amba-bus";
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        ranges;
+                        sdcc1: sdcc@12400000 {
+                                status          = "disabled";
+                                compatible      = "arm,pl18x", "arm,primecell";
+                                arm,primecell-periphid = <0x00051180>;
+                                reg             = <0x12400000 0x8000>;
+                                interrupts      = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
+                                interrupt-names = "cmd_irq";
+                                clocks          = <&gcc SDC1_CLK>, <&gcc SDC1_H_CLK>;
+                                clock-names     = "mclk", "apb_pclk";
+                                bus-width       = <8>;
+                                max-frequency   = <48000000>;
+                                non-removable;
+                                cap-sd-highspeed;
+                                cap-mmc-highspeed;
+                                vmmc-supply = <&vsdcc_fixed>;
+                        };
+
+                        sdcc3: sdcc@12180000 {
+                                compatible      = "arm,pl18x", "arm,primecell";
+                                arm,primecell-periphid = <0x00051180>;
+                                status          = "disabled";
+                                reg             = <0x12180000 0x8000>;
+                                interrupts      = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
+                                interrupt-names = "cmd_irq";
+                                clocks          = <&gcc SDC3_CLK>, <&gcc SDC3_H_CLK>;
+                                clock-names     = "mclk", "apb_pclk";
+                                bus-width       = <4>;
+                                cap-sd-highspeed;
+                                cap-mmc-highspeed;
+                                max-frequency   = <48000000>;
+                                no-1-8-v;
+                                vmmc-supply = <&vsdcc_fixed>;
+                        };
+                };
         };
+
 };