ARM: dts: omap5 clock data

This patch creates a unique node for each clock in the OMAP5 power,
reset and clock manager (PRCM).

Signed-off-by: Tero Kristo <t-kristo@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>

1 files changed, 54 insertions, 0 deletions

diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
index fc3fad563861..2f12a47aa83c 100644
--- a/arch/arm/boot/dts/omap5.dtsi
+++ b/arch/arm/boot/dts/omap5.dtsi
@@ -107,6 +107,58 @@
                 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
                              <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
 
+                prm: prm@4ae06000 {
+                        compatible = "ti,omap5-prm";
+                        reg = <0x4ae06000 0x3000>;
+
+                        prm_clocks: clocks {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                        };
+
+                        prm_clockdomains: clockdomains {
+                        };
+                };
+
+                cm_core_aon: cm_core_aon@4a004000 {
+                        compatible = "ti,omap5-cm-core-aon";
+                        reg = <0x4a004000 0x2000>;
+
+                        cm_core_aon_clocks: clocks {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                        };
+
+                        cm_core_aon_clockdomains: clockdomains {
+                        };
+                };
+
+                scrm: scrm@4ae0a000 {
+                        compatible = "ti,omap5-scrm";
+                        reg = <0x4ae0a000 0x2000>;
+
+                        scrm_clocks: clocks {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                        };
+
+                        scrm_clockdomains: clockdomains {
+                        };
+                };
+
+                cm_core: cm_core@4a008000 {
+                        compatible = "ti,omap5-cm-core";
+                        reg = <0x4a008000 0x3000>;
+
+                        cm_core_clocks: clocks {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                        };
+
+                        cm_core_clockdomains: clockdomains {
+                        };
+                };
+
                 counter32k: counter@4ae04000 {
                         compatible = "ti,omap-counter32k";
                         reg = <0x4ae04000 0x40>;
@@ -739,3 +791,5 @@
                 };
         };
 };
+
+/include/ "omap54xx-clocks.dtsi"