ARM: dts: omap5-uevm: Provide USB Host PHY clock frequency

USB Host PHY clock on port 2 must be configured to 19.2MHz.
Provide this information.

Cc: Sricharan R <r.sricharan@ti.com>
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>

1 files changed, 7 insertions, 0 deletions

diff --git a/arch/arm/boot/dts/omap5-uevm.dts b/arch/arm/boot/dts/omap5-uevm.dts
index 30adeaf47883..08b72678abff 100644
--- a/arch/arm/boot/dts/omap5-uevm.dts
+++ b/arch/arm/boot/dts/omap5-uevm.dts
@@ -42,6 +42,13 @@
         hsusb2_phy: hsusb2_phy {
                 compatible = "usb-nop-xceiv";
                 reset-supply = <&hsusb2_reset>;
+        /**
+          * FIXME
+          * Put the right clock phandle here when available
+          *     clocks = <&auxclk1>;
+          *     clock-names = "main_clk";
+          */
+                clock-frequency = <19200000>;
         };
 
         /* HS USB Port 3 RESET */