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authorJon Hunter <jon-hunter@ti.com>2012-10-19 10:59:00 -0400
committerBenoit Cousson <b-cousson@ti.com>2012-10-29 11:56:32 -0400
commitfab8ad0b2b5f2b6d25c6020a61bf3339e53fec61 (patch)
tree8a0ddc775d0feae45f97b8d79a3cdd2b239ad9aa /arch/arm/boot/dts/omap2.dtsi
parent4c94ac29b5c1f0cef2281df97609f2cbcc09cf9c (diff)
ARM: dts: OMAP: Add timer nodes
Add the 12 GP timers nodes present in OMAP2. Add the 12 GP timers nodes present in OMAP3. Add the 11 GP timers nodes present in OMAP4. Add the 7 GP timers nodes present in AM33xx. Add documentation for timer properties specific to OMAP. Thanks to Vaibhav Hiremath for creating the AM33xx timer nodes. I have modified Vaibhav's original nodes adding information on which timers support a PWM output. V5 changes: - Updated timer register sizes for OMAP2/3/4. - Modified AM335x timer register size to be 1KB instead of 4KB to align with HWMOD. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Acked-Reviewed-&-Tested-By: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Diffstat (limited to 'arch/arm/boot/dts/omap2.dtsi')
-rw-r--r--arch/arm/boot/dts/omap2.dtsi85
1 files changed, 85 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/omap2.dtsi b/arch/arm/boot/dts/omap2.dtsi
index f366482216c0..761c4b69b25b 100644
--- a/arch/arm/boot/dts/omap2.dtsi
+++ b/arch/arm/boot/dts/omap2.dtsi
@@ -66,5 +66,90 @@
66 ti,hwmods = "uart3"; 66 ti,hwmods = "uart3";
67 clock-frequency = <48000000>; 67 clock-frequency = <48000000>;
68 }; 68 };
69
70 timer2: timer@4802a000 {
71 compatible = "ti,omap2-timer";
72 reg = <0x4802a000 0x400>;
73 interrupts = <38>;
74 ti,hwmods = "timer2";
75 };
76
77 timer3: timer@48078000 {
78 compatible = "ti,omap2-timer";
79 reg = <0x48078000 0x400>;
80 interrupts = <39>;
81 ti,hwmods = "timer3";
82 };
83
84 timer4: timer@4807a000 {
85 compatible = "ti,omap2-timer";
86 reg = <0x4807a000 0x400>;
87 interrupts = <40>;
88 ti,hwmods = "timer4";
89 };
90
91 timer5: timer@4807c000 {
92 compatible = "ti,omap2-timer";
93 reg = <0x4807c000 0x400>;
94 interrupts = <41>;
95 ti,hwmods = "timer5";
96 ti,timer-dsp;
97 };
98
99 timer6: timer@4807e000 {
100 compatible = "ti,omap2-timer";
101 reg = <0x4807e000 0x400>;
102 interrupts = <42>;
103 ti,hwmods = "timer6";
104 ti,timer-dsp;
105 };
106
107 timer7: timer@48080000 {
108 compatible = "ti,omap2-timer";
109 reg = <0x48080000 0x400>;
110 interrupts = <43>;
111 ti,hwmods = "timer7";
112 ti,timer-dsp;
113 };
114
115 timer8: timer@48082000 {
116 compatible = "ti,omap2-timer";
117 reg = <0x48082000 0x400>;
118 interrupts = <44>;
119 ti,hwmods = "timer8";
120 ti,timer-dsp;
121 };
122
123 timer9: timer@48084000 {
124 compatible = "ti,omap2-timer";
125 reg = <0x48084000 0x400>;
126 interrupts = <45>;
127 ti,hwmods = "timer9";
128 ti,timer-pwm;
129 };
130
131 timer10: timer@48086000 {
132 compatible = "ti,omap2-timer";
133 reg = <0x48086000 0x400>;
134 interrupts = <46>;
135 ti,hwmods = "timer10";
136 ti,timer-pwm;
137 };
138
139 timer11: timer@48088000 {
140 compatible = "ti,omap2-timer";
141 reg = <0x48088000 0x400>;
142 interrupts = <47>;
143 ti,hwmods = "timer11";
144 ti,timer-pwm;
145 };
146
147 timer12: timer@4808a000 {
148 compatible = "ti,omap2-timer";
149 reg = <0x4808a000 0x400>;
150 interrupts = <48>;
151 ti,hwmods = "timer12";
152 ti,timer-pwm;
153 };
69 }; 154 };
70}; 155};