diff options
author | Olof Johansson <olof@lixom.net> | 2012-10-01 17:23:11 -0400 |
---|---|---|
committer | Olof Johansson <olof@lixom.net> | 2012-10-01 17:23:11 -0400 |
commit | 7e95c548818d2b311090848083277fb907cfb56d (patch) | |
tree | 86fecf07ae1f01ba8bac5969974a7915b738baee /arch/arm/boot/dts/msm8660-surf.dts | |
parent | 6d55d5968a8622f3ea20ec40737aea1cfba6438c (diff) | |
parent | 99261fbad0a16f105b262d7525801697588ba526 (diff) |
Merge branch 'next/dt' into HEAD
Conflicts:
Documentation/devicetree/bindings/usb/platform-uhci.txt
arch/arm/mach-vt8500/bv07.c
arch/arm/mach-vt8500/devices-vt8500.c
arch/arm/mach-vt8500/devices-wm8505.c
arch/arm/mach-vt8500/devices.c
arch/arm/mach-vt8500/devices.h
arch/arm/mach-vt8500/wm8505_7in.c
Diffstat (limited to 'arch/arm/boot/dts/msm8660-surf.dts')
-rw-r--r-- | arch/arm/boot/dts/msm8660-surf.dts | 19 |
1 files changed, 18 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/msm8660-surf.dts b/arch/arm/boot/dts/msm8660-surf.dts index 45bc4bb04e57..31f2157cd7d7 100644 --- a/arch/arm/boot/dts/msm8660-surf.dts +++ b/arch/arm/boot/dts/msm8660-surf.dts | |||
@@ -7,7 +7,7 @@ | |||
7 | compatible = "qcom,msm8660-surf", "qcom,msm8660"; | 7 | compatible = "qcom,msm8660-surf", "qcom,msm8660"; |
8 | interrupt-parent = <&intc>; | 8 | interrupt-parent = <&intc>; |
9 | 9 | ||
10 | intc: interrupt-controller@02080000 { | 10 | intc: interrupt-controller@2080000 { |
11 | compatible = "qcom,msm-8660-qgic"; | 11 | compatible = "qcom,msm-8660-qgic"; |
12 | interrupt-controller; | 12 | interrupt-controller; |
13 | #interrupt-cells = <3>; | 13 | #interrupt-cells = <3>; |
@@ -15,6 +15,23 @@ | |||
15 | < 0x02081000 0x1000 >; | 15 | < 0x02081000 0x1000 >; |
16 | }; | 16 | }; |
17 | 17 | ||
18 | timer@2000004 { | ||
19 | compatible = "qcom,msm-gpt", "qcom,msm-timer"; | ||
20 | interrupts = <1 1 0x301>; | ||
21 | reg = <0x02000004 0x10>; | ||
22 | clock-frequency = <32768>; | ||
23 | cpu-offset = <0x40000>; | ||
24 | }; | ||
25 | |||
26 | timer@2000024 { | ||
27 | compatible = "qcom,msm-dgt", "qcom,msm-timer"; | ||
28 | interrupts = <1 0 0x301>; | ||
29 | reg = <0x02000024 0x10>, | ||
30 | <0x02000034 0x4>; | ||
31 | clock-frequency = <6750000>; | ||
32 | cpu-offset = <0x40000>; | ||
33 | }; | ||
34 | |||
18 | serial@19c400000 { | 35 | serial@19c400000 { |
19 | compatible = "qcom,msm-hsuart", "qcom,msm-uart"; | 36 | compatible = "qcom,msm-hsuart", "qcom,msm-uart"; |
20 | reg = <0x19c40000 0x1000>, | 37 | reg = <0x19c40000 0x1000>, |