diff options
| author | Tim Harvey <tharvey@gateworks.com> | 2014-09-09 02:07:29 -0400 |
|---|---|---|
| committer | Shawn Guo <shawn.guo@freescale.com> | 2014-09-15 22:27:20 -0400 |
| commit | 73e005c111bc3f77ca3793d465539a11e7604c71 (patch) | |
| tree | e91dc98592e46dfc7f3ff59e798b48ba5818cb18 /arch/arm/boot/dts/imx6qdl-gw54xx.dtsi | |
| parent | 326cdb16552c3670fefd583d94fe797e776130b6 (diff) | |
ARM: dts: imx: ventana: configure padconf for all pins
Follow the convention of configuring padconf for all pins and not leaving
any 0x80000000 to leave them un-configured.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Diffstat (limited to 'arch/arm/boot/dts/imx6qdl-gw54xx.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/imx6qdl-gw54xx.dtsi | 28 |
1 files changed, 14 insertions, 14 deletions
diff --git a/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi b/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi index ab7827abd71b..a366a9332509 100644 --- a/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi +++ b/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi | |||
| @@ -336,19 +336,19 @@ | |||
| 336 | imx6qdl-gw54xx { | 336 | imx6qdl-gw54xx { |
| 337 | pinctrl_hog: hoggrp { | 337 | pinctrl_hog: hoggrp { |
| 338 | fsl,pins = < | 338 | fsl,pins = < |
| 339 | MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000 /* OTG_PWR_EN */ | 339 | MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x0001b0b0 /* OTG_PWR_EN */ |
| 340 | MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x80000000 /* SPINOR_CS0# */ | 340 | MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x0001b0b0 /* SPINOR_CS0# */ |
| 341 | MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x80000000 /* GPS_PPS */ | 341 | MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x0001b0b0 /* GPS_PPS */ |
| 342 | MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x80000000 /* PCIE IRQ */ | 342 | MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x0001b0b0 /* PCIE IRQ */ |
| 343 | MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000 /* PCIE RST */ | 343 | MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x0001b0b0 /* PCIE RST */ |
| 344 | MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x000130b0 /* AUD4_MCK */ | 344 | MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x000130b0 /* AUD4_MCK */ |
| 345 | MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x80000000 /* CAN_STBY */ | 345 | MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x4001b0b0 /* CAN_STBY */ |
| 346 | MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x80000000 /* TOUCH_IRQ# */ | 346 | MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x0001b0b0 /* TOUCH_IRQ# */ |
| 347 | MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x80000000 /* user1 led */ | 347 | MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x0001b0b0 /* user1 led */ |
| 348 | MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x80000000 /* user2 led */ | 348 | MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x0001b0b0 /* user2 led */ |
| 349 | MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x80000000 /* user3 led */ | 349 | MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x0001b0b0 /* user3 led */ |
| 350 | MX6QDL_PAD_SD1_DAT0__GPIO1_IO16 0x80000000 /* USBHUB_RST# */ | 350 | MX6QDL_PAD_SD1_DAT0__GPIO1_IO16 0x4001b0b0 /* USBHUB_RST# */ |
| 351 | MX6QDL_PAD_SD1_DAT3__GPIO1_IO21 0x80000000 /* MIPI_DIO */ | 351 | MX6QDL_PAD_SD1_DAT3__GPIO1_IO21 0x4001b0b0 /* MIPI_DIO */ |
| 352 | >; | 352 | >; |
| 353 | }; | 353 | }; |
| 354 | 354 | ||
| @@ -384,8 +384,8 @@ | |||
| 384 | 384 | ||
| 385 | pinctrl_flexcan1: flexcan1grp { | 385 | pinctrl_flexcan1: flexcan1grp { |
| 386 | fsl,pins = < | 386 | fsl,pins = < |
| 387 | MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x80000000 | 387 | MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b0b1 |
| 388 | MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x80000000 | 388 | MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x1b0b1 |
| 389 | >; | 389 | >; |
| 390 | }; | 390 | }; |
| 391 | 391 | ||