ARM: dts: add dtsi for imx6q and imx6dl

Add dtsi for imx6q and imx6dl with non-common blocks moved into there.
Major differences between imx6dl and imx6q:

 * Dual vs. Quad cores
 * single vs. dual IPU
 * 128 vs. 256 KB OCRAM
 * imx6q: ECSPI5, OpenVG (GC355), SATA
 * imx6dl: I2C4, PXP, EPDC, LCDIF
 * iomuxc/pads definition

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>

1 files changed, 59 insertions, 0 deletions

diff --git a/arch/arm/boot/dts/imx6dl.dtsi b/arch/arm/boot/dts/imx6dl.dtsi
new file mode 100644
index 000000000000..63fafe2a606c
--- /dev/null
+++ b/arch/arm/boot/dts/imx6dl.dtsi
@@ -0,0 +1,59 @@
+/*
+ * Copyright 2013 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+/include/ "imx6qdl.dtsi"
+
+/ {
+        cpus {
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                cpu@0 {
+                        compatible = "arm,cortex-a9";
+                        reg = <0>;
+                        next-level-cache = <&L2>;
+                };
+
+                cpu@1 {
+                        compatible = "arm,cortex-a9";
+                        reg = <1>;
+                        next-level-cache = <&L2>;
+                };
+        };
+
+        soc {
+                aips1: aips-bus@02000000 {
+                        pxp: pxp@020f0000 {
+                                reg = <0x020f0000 0x4000>;
+                                interrupts = <0 98 0x04>;
+                        };
+
+                        epdc: epdc@020f4000 {
+                                reg = <0x020f4000 0x4000>;
+                                interrupts = <0 97 0x04>;
+                        };
+
+                        lcdif: lcdif@020f8000 {
+                                reg = <0x020f8000 0x4000>;
+                                interrupts = <0 39 0x04>;
+                        };
+                };
+
+                aips2: aips-bus@02100000 {
+                        i2c4: i2c@021f8000 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,imx1-i2c";
+                                reg = <0x021f8000 0x4000>;
+                                interrupts = <0 35 0x04>;
+                                status = "disabled";
+                        };
+                };
+        };
+};