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authorAlexander Shiyan <shc_work@mail.ru>2013-11-07 03:45:05 -0500
committerShawn Guo <shawn.guo@linaro.org>2014-02-09 08:32:35 -0500
commit6acde887126dfb1f7fb1ddd5e7523ccaaeca1149 (patch)
tree80ad0aa338e01ce6813edc70b80cce4176ee1afa /arch/arm/boot/dts/imx51.dtsi
parentdf0355f2b06caf8e7948534c278114bafc2f72e0 (diff)
ARM: dts: i.MX51: Update CPU node
This patch updates i.MX51 CPU node: - Alias for CPU is added to allow using this node in the parent DTS files. - Removed useless "clock_names" property. - "clock-latency" value increased to safe using with 32 kHz OSC. - Defined operating points voltages and "voltage tolerance" properties. Values are safe for both commercial and industrial CPU variants. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Diffstat (limited to 'arch/arm/boot/dts/imx51.dtsi')
-rw-r--r--arch/arm/boot/dts/imx51.dtsi12
1 files changed, 6 insertions, 6 deletions
diff --git a/arch/arm/boot/dts/imx51.dtsi b/arch/arm/boot/dts/imx51.dtsi
index 9b3f162c375e..e074b2a02ca1 100644
--- a/arch/arm/boot/dts/imx51.dtsi
+++ b/arch/arm/boot/dts/imx51.dtsi
@@ -64,18 +64,18 @@
64 cpus { 64 cpus {
65 #address-cells = <1>; 65 #address-cells = <1>;
66 #size-cells = <0>; 66 #size-cells = <0>;
67 cpu@0 { 67 cpu: cpu@0 {
68 device_type = "cpu"; 68 device_type = "cpu";
69 compatible = "arm,cortex-a8"; 69 compatible = "arm,cortex-a8";
70 reg = <0>; 70 reg = <0>;
71 clock-latency = <61036>; /* two CLK32 periods */ 71 clock-latency = <62500>;
72 clocks = <&clks 24>; 72 clocks = <&clks 24>;
73 clock-names = "cpu";
74 operating-points = < 73 operating-points = <
75 /* kHz uV (No regulator support) */ 74 166000 1000000
76 160000 0 75 600000 1050000
77 800000 0 76 800000 1100000
78 >; 77 >;
78 voltage-tolerance = <5>;
79 }; 79 };
80 }; 80 };
81 81