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authorAlexander Shiyan <shc_work@mail.ru>2014-02-04 09:59:32 -0500
committerShawn Guo <shawn.guo@linaro.org>2014-02-09 22:10:43 -0500
commit51aba3255e5ef60af35efdcd544fef5271c162ae (patch)
tree9b97473d15bb066dbc60e7e2f35b8d507bed44dc /arch/arm/boot/dts/imx27-phytec-phycard-s-rdk.dts
parentb037b9a5c216fc11505497a8f5597123dbf72e29 (diff)
ARM: dts: imx27-phytec-phycard-s-rdk: Add pinctrl definitions for SDHC2
This patch adds pinctrl definitions for SDHC2 for Phytec PCA100 RDK board. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Diffstat (limited to 'arch/arm/boot/dts/imx27-phytec-phycard-s-rdk.dts')
-rw-r--r--arch/arm/boot/dts/imx27-phytec-phycard-s-rdk.dts14
1 files changed, 14 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx27-phytec-phycard-s-rdk.dts b/arch/arm/boot/dts/imx27-phytec-phycard-s-rdk.dts
index 04cadfcb32f1..1cd3a879dc85 100644
--- a/arch/arm/boot/dts/imx27-phytec-phycard-s-rdk.dts
+++ b/arch/arm/boot/dts/imx27-phytec-phycard-s-rdk.dts
@@ -88,6 +88,18 @@
88 >; 88 >;
89 }; 89 };
90 90
91 pinctrl_sdhc2: sdhc2grp {
92 fsl,pins = <
93 MX27_PAD_SD2_CLK__SD2_CLK 0x0
94 MX27_PAD_SD2_CMD__SD2_CMD 0x0
95 MX27_PAD_SD2_D0__SD2_D0 0x0
96 MX27_PAD_SD2_D1__SD2_D1 0x0
97 MX27_PAD_SD2_D2__SD2_D2 0x0
98 MX27_PAD_SD2_D3__SD2_D3 0x0
99 MX27_PAD_SSI3_RXDAT__GPIO3_29 0x0 /* CD */
100 >;
101 };
102
91 pinctrl_uart1: uart1grp { 103 pinctrl_uart1: uart1grp {
92 fsl,pins = < 104 fsl,pins = <
93 MX27_PAD_UART1_TXD__UART1_TXD 0x0 105 MX27_PAD_UART1_TXD__UART1_TXD 0x0
@@ -124,6 +136,8 @@
124}; 136};
125 137
126&sdhci2 { 138&sdhci2 {
139 pinctrl-names = "default";
140 pinctrl-0 = <&pinctrl_sdhc2>;
127 cd-gpios = <&gpio3 29 GPIO_ACTIVE_HIGH>; 141 cd-gpios = <&gpio3 29 GPIO_ACTIVE_HIGH>;
128 status = "okay"; 142 status = "okay";
129}; 143};