Merge tag 'dt-for-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc into next

Pull ARM SoC devicetree updates from Olof Johansson:
 "As with previous release, this continues to be among the largest
  branches we merge, with lots of new contents.

  New things for this release are among other things:

   - DTSI contents for the new SoCs supported in 3.16 (see SoC pull request)
   - Qualcomm APQ8064 and APQ8084 SoCs and eval boards
   - Nvidia Jetson TK1 development board (Tegra T124-based)

  Two new SoCs that didn't need enough new platform code to stand out
  enough for me to notice when writing the SoC tag, but that adds new DT
  contents are:

   - TI DRA72
   - Marvell Berlin 2Q"

* tag 'dt-for-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (500 commits)
  ARM: dts: add secure firmware support for exynos5420-arndale-octa
  ARM: dts: add pmu sysreg node to exynos3250
  ARM: dts: correct the usb phy node in exynos5800-peach-pi
  ARM: dts: correct the usb phy node in exynos5420-peach-pit
  ARM: dts: add dts files for exynos5410 and exynos5410-smdk5410
  ARM: dts: add dts files for exynos3250 SoC
  ARM: dts: add mfc node for exynos5800
  ARM: dts: add Vbus regulator for USB 3.0 on exynos5800-peach-pi
  ARM: dts: enable fimd for exynos5800-peach-pi
  ARM: dts: enable display controller for exynos5800-peach-pi
  ARM: dts: enable hdmi for exynos5800-peach-pi
  ARM: dts: add dts file for exynos5800-peach-pi board
  ARM: dts: add dts file for exynos5800 SoC
  ARM: dts: add dts file for exynos5260-xyref5260 board
  ARM: dts: add dts files for exynos5260 SoC
  ARM: dts: update watchdog node name in exynos5440
  ARM: dts: use key code macros on Origen and Arndale boards
  ARM: dts: enable RTC and WDT nodes on Origen boards
  ARM: dts: qcom: Add APQ8084-MTP board support
  ARM: dts: qcom: Add APQ8084 SoC support
  ...

1 files changed, 108 insertions, 2 deletions

diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi
index 5e36449a831c..e38532271ef9 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -47,6 +47,8 @@
                 spi0 = &spi_0;
                 spi1 = &spi_1;
                 spi2 = &spi_2;
+                usbdrdphy0 = &usbdrd_phy0;
+                usbdrdphy1 = &usbdrd_phy1;
         };
 
         cpus {
@@ -176,6 +178,7 @@
                 interrupts = <0 96 0>;
                 clocks = <&clock CLK_MFC>;
                 clock-names = "mfc";
+                samsung,power-domain = <&mfc_pd>;
         };
 
         mmc_0: mmc@12200000 {
@@ -675,7 +678,7 @@
         };
 
         hdmi: hdmi@14530000 {
-                compatible = "samsung,exynos4212-hdmi";
+                compatible = "samsung,exynos5420-hdmi";
                 reg = <0x14530000 0x70000>;
                 interrupts = <0 95 0>;
                 clocks = <&clock CLK_HDMI>, <&clock CLK_SCLK_HDMI>,
@@ -683,9 +686,15 @@
                          <&clock CLK_MOUT_HDMI>;
                 clock-names = "hdmi", "sclk_hdmi", "sclk_pixel",
                         "sclk_hdmiphy", "mout_hdmi";
+                phy = <&hdmiphy>;
+                samsung,syscon-phandle = <&pmu_system_controller>;
                 status = "disabled";
         };
 
+        hdmiphy: hdmiphy@145D0000 {
+                reg = <0x145D0000 0x20>;
+        };
+
         mixer: mixer@14450000 {
                 compatible = "samsung,exynos5420-mixer";
                 reg = <0x14450000 0x10000>;
@@ -717,6 +726,11 @@
                 reg = <0x10040000 0x5000>;
         };
 
+        sysreg_system_controller: syscon@10050000 {
+                compatible = "samsung,exynos5-sysreg", "syscon";
+                reg = <0x10050000 0x5000>;
+        };
+
         tmu_cpu0: tmu@10060000 {
                 compatible = "samsung,exynos5420-tmu";
                 reg = <0x10060000 0x100>;
@@ -770,7 +784,99 @@
                 compatible = "samsung,exynos4210-secss";
                 reg = <0x10830000 0x10000>;
                 interrupts = <0 112 0>;
-                clocks = <&clock 471>;
+                clocks = <&clock CLK_SSS>;
                 clock-names = "secss";
         };
+
+        usbdrd3_0: usb@12000000 {
+                compatible = "samsung,exynos5250-dwusb3";
+                clocks = <&clock CLK_USBD300>;
+                clock-names = "usbdrd30";
+                #address-cells = <1>;
+                #size-cells = <1>;
+                ranges;
+
+                dwc3 {
+                        compatible = "snps,dwc3";
+                        reg = <0x12000000 0x10000>;
+                        interrupts = <0 72 0>;
+                        phys = <&usbdrd_phy0 0>, <&usbdrd_phy0 1>;
+                        phy-names = "usb2-phy", "usb3-phy";
+                };
+        };
+
+        usbdrd_phy0: phy@12100000 {
+                compatible = "samsung,exynos5420-usbdrd-phy";
+                reg = <0x12100000 0x100>;
+                clocks = <&clock CLK_USBD300>, <&clock CLK_SCLK_USBPHY300>;
+                clock-names = "phy", "ref";
+                samsung,pmu-syscon = <&pmu_system_controller>;
+                #phy-cells = <1>;
+        };
+
+        usbdrd3_1: usb@12400000 {
+                compatible = "samsung,exynos5250-dwusb3";
+                clocks = <&clock CLK_USBD301>;
+                clock-names = "usbdrd30";
+                #address-cells = <1>;
+                #size-cells = <1>;
+                ranges;
+
+                dwc3 {
+                        compatible = "snps,dwc3";
+                        reg = <0x12400000 0x10000>;
+                        interrupts = <0 73 0>;
+                        phys = <&usbdrd_phy1 0>, <&usbdrd_phy1 1>;
+                        phy-names = "usb2-phy", "usb3-phy";
+                };
+        };
+
+        usbdrd_phy1: phy@12500000 {
+                compatible = "samsung,exynos5420-usbdrd-phy";
+                reg = <0x12500000 0x100>;
+                clocks = <&clock CLK_USBD301>, <&clock CLK_SCLK_USBPHY301>;
+                clock-names = "phy", "ref";
+                samsung,pmu-syscon = <&pmu_system_controller>;
+                #phy-cells = <1>;
+        };
+
+        usbhost2: usb@12110000 {
+                compatible = "samsung,exynos4210-ehci";
+                reg = <0x12110000 0x100>;
+                interrupts = <0 71 0>;
+
+                clocks = <&clock CLK_USBH20>;
+                clock-names = "usbhost";
+                #address-cells = <1>;
+                #size-cells = <0>;
+                port@0 {
+                        reg = <0>;
+                        phys = <&usb2_phy 1>;
+                };
+        };
+
+        usbhost1: usb@12120000 {
+                compatible = "samsung,exynos4210-ohci";
+                reg = <0x12120000 0x100>;
+                interrupts = <0 71 0>;
+
+                clocks = <&clock CLK_USBH20>;
+                clock-names = "usbhost";
+                #address-cells = <1>;
+                #size-cells = <0>;
+                port@0 {
+                        reg = <0>;
+                        phys = <&usb2_phy 1>;
+                };
+        };
+
+        usb2_phy: phy@12130000 {
+                compatible = "samsung,exynos5250-usb2-phy";
+                reg = <0x12130000 0x100>;
+                clocks = <&clock CLK_USBH20>, <&clock CLK_SCLK_USBPHY300>;
+                clock-names = "phy", "ref";
+                #phy-cells = <1>;
+                samsung,sysreg-phandle = <&sysreg_system_controller>;
+                samsung,pmureg-phandle = <&pmu_system_controller>;
+        };
 };