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authorR Sricharan <r.sricharan@ti.com>2014-06-26 03:25:31 -0400
committerTony Lindgren <tony@atomide.com>2014-07-09 06:56:51 -0400
commita46631c4cda1488a69600efb93f38d84b7a57541 (patch)
tree189464464bd2987211349f7cba1b24f22048a6f9 /arch/arm/boot/dts/dra7.dtsi
parent513006334fb01c7c19b5e005357d94de43a370dd (diff)
ARM: dts: dra7: add crossbar device binding
There is a IRQ crossbar device in the soc, which maps the irq requests from the peripherals to the mpu interrupt controller's inputs. The Peripheral irq requests are connected to only one crossbar input and the output of the crossbar is connected to only one controller's input line. The crossbar device is used to map a peripheral input to a free mpu's interrupt controller line. Here, adding a new crossbar device node and replacing all the peripheral interrupt numbers with its fixed crossbar input lines. Signed-off-by: Sricharan R <r.sricharan@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Cc: Benoit Cousson <bcousson@baylibre.com> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> Cc: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/boot/dts/dra7.dtsi')
-rw-r--r--arch/arm/boot/dts/dra7.dtsi138
1 files changed, 80 insertions, 58 deletions
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index 1cf4ee10acf5..961be6b8ffbf 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -12,6 +12,9 @@
12 12
13#include "skeleton.dtsi" 13#include "skeleton.dtsi"
14 14
15#define MAX_SOURCES 400
16#define DIRECT_IRQ(irq) (MAX_SOURCES + irq)
17
15/ { 18/ {
16 #address-cells = <1>; 19 #address-cells = <1>;
17 #size-cells = <1>; 20 #size-cells = <1>;
@@ -80,8 +83,8 @@
80 ti,hwmods = "l3_main_1", "l3_main_2"; 83 ti,hwmods = "l3_main_1", "l3_main_2";
81 reg = <0x44000000 0x1000000>, 84 reg = <0x44000000 0x1000000>,
82 <0x45000000 0x1000>; 85 <0x45000000 0x1000>;
83 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>, 86 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
84 <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 87 <GIC_SPI DIRECT_IRQ(10) IRQ_TYPE_LEVEL_HIGH>;
85 88
86 prm: prm@4ae06000 { 89 prm: prm@4ae06000 {
87 compatible = "ti,dra7-prm"; 90 compatible = "ti,dra7-prm";
@@ -156,10 +159,10 @@
156 sdma: dma-controller@4a056000 { 159 sdma: dma-controller@4a056000 {
157 compatible = "ti,omap4430-sdma"; 160 compatible = "ti,omap4430-sdma";
158 reg = <0x4a056000 0x1000>; 161 reg = <0x4a056000 0x1000>;
159 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>, 162 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
160 <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>, 163 <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
161 <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>, 164 <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
162 <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; 165 <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
163 #dma-cells = <1>; 166 #dma-cells = <1>;
164 #dma-channels = <32>; 167 #dma-channels = <32>;
165 #dma-requests = <127>; 168 #dma-requests = <127>;
@@ -168,7 +171,7 @@
168 gpio1: gpio@4ae10000 { 171 gpio1: gpio@4ae10000 {
169 compatible = "ti,omap4-gpio"; 172 compatible = "ti,omap4-gpio";
170 reg = <0x4ae10000 0x200>; 173 reg = <0x4ae10000 0x200>;
171 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; 174 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
172 ti,hwmods = "gpio1"; 175 ti,hwmods = "gpio1";
173 gpio-controller; 176 gpio-controller;
174 #gpio-cells = <2>; 177 #gpio-cells = <2>;
@@ -179,7 +182,7 @@
179 gpio2: gpio@48055000 { 182 gpio2: gpio@48055000 {
180 compatible = "ti,omap4-gpio"; 183 compatible = "ti,omap4-gpio";
181 reg = <0x48055000 0x200>; 184 reg = <0x48055000 0x200>;
182 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; 185 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
183 ti,hwmods = "gpio2"; 186 ti,hwmods = "gpio2";
184 gpio-controller; 187 gpio-controller;
185 #gpio-cells = <2>; 188 #gpio-cells = <2>;
@@ -190,7 +193,7 @@
190 gpio3: gpio@48057000 { 193 gpio3: gpio@48057000 {
191 compatible = "ti,omap4-gpio"; 194 compatible = "ti,omap4-gpio";
192 reg = <0x48057000 0x200>; 195 reg = <0x48057000 0x200>;
193 interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; 196 interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
194 ti,hwmods = "gpio3"; 197 ti,hwmods = "gpio3";
195 gpio-controller; 198 gpio-controller;
196 #gpio-cells = <2>; 199 #gpio-cells = <2>;
@@ -201,7 +204,7 @@
201 gpio4: gpio@48059000 { 204 gpio4: gpio@48059000 {
202 compatible = "ti,omap4-gpio"; 205 compatible = "ti,omap4-gpio";
203 reg = <0x48059000 0x200>; 206 reg = <0x48059000 0x200>;
204 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; 207 interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
205 ti,hwmods = "gpio4"; 208 ti,hwmods = "gpio4";
206 gpio-controller; 209 gpio-controller;
207 #gpio-cells = <2>; 210 #gpio-cells = <2>;
@@ -212,7 +215,7 @@
212 gpio5: gpio@4805b000 { 215 gpio5: gpio@4805b000 {
213 compatible = "ti,omap4-gpio"; 216 compatible = "ti,omap4-gpio";
214 reg = <0x4805b000 0x200>; 217 reg = <0x4805b000 0x200>;
215 interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; 218 interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
216 ti,hwmods = "gpio5"; 219 ti,hwmods = "gpio5";
217 gpio-controller; 220 gpio-controller;
218 #gpio-cells = <2>; 221 #gpio-cells = <2>;
@@ -223,7 +226,7 @@
223 gpio6: gpio@4805d000 { 226 gpio6: gpio@4805d000 {
224 compatible = "ti,omap4-gpio"; 227 compatible = "ti,omap4-gpio";
225 reg = <0x4805d000 0x200>; 228 reg = <0x4805d000 0x200>;
226 interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>; 229 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
227 ti,hwmods = "gpio6"; 230 ti,hwmods = "gpio6";
228 gpio-controller; 231 gpio-controller;
229 #gpio-cells = <2>; 232 #gpio-cells = <2>;
@@ -234,7 +237,7 @@
234 gpio7: gpio@48051000 { 237 gpio7: gpio@48051000 {
235 compatible = "ti,omap4-gpio"; 238 compatible = "ti,omap4-gpio";
236 reg = <0x48051000 0x200>; 239 reg = <0x48051000 0x200>;
237 interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>; 240 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
238 ti,hwmods = "gpio7"; 241 ti,hwmods = "gpio7";
239 gpio-controller; 242 gpio-controller;
240 #gpio-cells = <2>; 243 #gpio-cells = <2>;
@@ -245,7 +248,7 @@
245 gpio8: gpio@48053000 { 248 gpio8: gpio@48053000 {
246 compatible = "ti,omap4-gpio"; 249 compatible = "ti,omap4-gpio";
247 reg = <0x48053000 0x200>; 250 reg = <0x48053000 0x200>;
248 interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>; 251 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
249 ti,hwmods = "gpio8"; 252 ti,hwmods = "gpio8";
250 gpio-controller; 253 gpio-controller;
251 #gpio-cells = <2>; 254 #gpio-cells = <2>;
@@ -256,7 +259,7 @@
256 uart1: serial@4806a000 { 259 uart1: serial@4806a000 {
257 compatible = "ti,omap4-uart"; 260 compatible = "ti,omap4-uart";
258 reg = <0x4806a000 0x100>; 261 reg = <0x4806a000 0x100>;
259 interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>; 262 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
260 ti,hwmods = "uart1"; 263 ti,hwmods = "uart1";
261 clock-frequency = <48000000>; 264 clock-frequency = <48000000>;
262 status = "disabled"; 265 status = "disabled";
@@ -265,7 +268,7 @@
265 uart2: serial@4806c000 { 268 uart2: serial@4806c000 {
266 compatible = "ti,omap4-uart"; 269 compatible = "ti,omap4-uart";
267 reg = <0x4806c000 0x100>; 270 reg = <0x4806c000 0x100>;
268 interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; 271 interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
269 ti,hwmods = "uart2"; 272 ti,hwmods = "uart2";
270 clock-frequency = <48000000>; 273 clock-frequency = <48000000>;
271 status = "disabled"; 274 status = "disabled";
@@ -274,7 +277,7 @@
274 uart3: serial@48020000 { 277 uart3: serial@48020000 {
275 compatible = "ti,omap4-uart"; 278 compatible = "ti,omap4-uart";
276 reg = <0x48020000 0x100>; 279 reg = <0x48020000 0x100>;
277 interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; 280 interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
278 ti,hwmods = "uart3"; 281 ti,hwmods = "uart3";
279 clock-frequency = <48000000>; 282 clock-frequency = <48000000>;
280 status = "disabled"; 283 status = "disabled";
@@ -283,7 +286,7 @@
283 uart4: serial@4806e000 { 286 uart4: serial@4806e000 {
284 compatible = "ti,omap4-uart"; 287 compatible = "ti,omap4-uart";
285 reg = <0x4806e000 0x100>; 288 reg = <0x4806e000 0x100>;
286 interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>; 289 interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
287 ti,hwmods = "uart4"; 290 ti,hwmods = "uart4";
288 clock-frequency = <48000000>; 291 clock-frequency = <48000000>;
289 status = "disabled"; 292 status = "disabled";
@@ -292,7 +295,7 @@
292 uart5: serial@48066000 { 295 uart5: serial@48066000 {
293 compatible = "ti,omap4-uart"; 296 compatible = "ti,omap4-uart";
294 reg = <0x48066000 0x100>; 297 reg = <0x48066000 0x100>;
295 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>; 298 interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
296 ti,hwmods = "uart5"; 299 ti,hwmods = "uart5";
297 clock-frequency = <48000000>; 300 clock-frequency = <48000000>;
298 status = "disabled"; 301 status = "disabled";
@@ -301,7 +304,7 @@
301 uart6: serial@48068000 { 304 uart6: serial@48068000 {
302 compatible = "ti,omap4-uart"; 305 compatible = "ti,omap4-uart";
303 reg = <0x48068000 0x100>; 306 reg = <0x48068000 0x100>;
304 interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>; 307 interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
305 ti,hwmods = "uart6"; 308 ti,hwmods = "uart6";
306 clock-frequency = <48000000>; 309 clock-frequency = <48000000>;
307 status = "disabled"; 310 status = "disabled";
@@ -310,6 +313,7 @@
310 uart7: serial@48420000 { 313 uart7: serial@48420000 {
311 compatible = "ti,omap4-uart"; 314 compatible = "ti,omap4-uart";
312 reg = <0x48420000 0x100>; 315 reg = <0x48420000 0x100>;
316 interrupts = <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>;
313 ti,hwmods = "uart7"; 317 ti,hwmods = "uart7";
314 clock-frequency = <48000000>; 318 clock-frequency = <48000000>;
315 status = "disabled"; 319 status = "disabled";
@@ -318,6 +322,7 @@
318 uart8: serial@48422000 { 322 uart8: serial@48422000 {
319 compatible = "ti,omap4-uart"; 323 compatible = "ti,omap4-uart";
320 reg = <0x48422000 0x100>; 324 reg = <0x48422000 0x100>;
325 interrupts = <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>;
321 ti,hwmods = "uart8"; 326 ti,hwmods = "uart8";
322 clock-frequency = <48000000>; 327 clock-frequency = <48000000>;
323 status = "disabled"; 328 status = "disabled";
@@ -326,6 +331,7 @@
326 uart9: serial@48424000 { 331 uart9: serial@48424000 {
327 compatible = "ti,omap4-uart"; 332 compatible = "ti,omap4-uart";
328 reg = <0x48424000 0x100>; 333 reg = <0x48424000 0x100>;
334 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>;
329 ti,hwmods = "uart9"; 335 ti,hwmods = "uart9";
330 clock-frequency = <48000000>; 336 clock-frequency = <48000000>;
331 status = "disabled"; 337 status = "disabled";
@@ -334,6 +340,7 @@
334 uart10: serial@4ae2b000 { 340 uart10: serial@4ae2b000 {
335 compatible = "ti,omap4-uart"; 341 compatible = "ti,omap4-uart";
336 reg = <0x4ae2b000 0x100>; 342 reg = <0x4ae2b000 0x100>;
343 interrupts = <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
337 ti,hwmods = "uart10"; 344 ti,hwmods = "uart10";
338 clock-frequency = <48000000>; 345 clock-frequency = <48000000>;
339 status = "disabled"; 346 status = "disabled";
@@ -342,7 +349,7 @@
342 timer1: timer@4ae18000 { 349 timer1: timer@4ae18000 {
343 compatible = "ti,omap5430-timer"; 350 compatible = "ti,omap5430-timer";
344 reg = <0x4ae18000 0x80>; 351 reg = <0x4ae18000 0x80>;
345 interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; 352 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
346 ti,hwmods = "timer1"; 353 ti,hwmods = "timer1";
347 ti,timer-alwon; 354 ti,timer-alwon;
348 }; 355 };
@@ -350,28 +357,28 @@
350 timer2: timer@48032000 { 357 timer2: timer@48032000 {
351 compatible = "ti,omap5430-timer"; 358 compatible = "ti,omap5430-timer";
352 reg = <0x48032000 0x80>; 359 reg = <0x48032000 0x80>;
353 interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; 360 interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
354 ti,hwmods = "timer2"; 361 ti,hwmods = "timer2";
355 }; 362 };
356 363
357 timer3: timer@48034000 { 364 timer3: timer@48034000 {
358 compatible = "ti,omap5430-timer"; 365 compatible = "ti,omap5430-timer";
359 reg = <0x48034000 0x80>; 366 reg = <0x48034000 0x80>;
360 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>; 367 interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
361 ti,hwmods = "timer3"; 368 ti,hwmods = "timer3";
362 }; 369 };
363 370
364 timer4: timer@48036000 { 371 timer4: timer@48036000 {
365 compatible = "ti,omap5430-timer"; 372 compatible = "ti,omap5430-timer";
366 reg = <0x48036000 0x80>; 373 reg = <0x48036000 0x80>;
367 interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>; 374 interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
368 ti,hwmods = "timer4"; 375 ti,hwmods = "timer4";
369 }; 376 };
370 377
371 timer5: timer@48820000 { 378 timer5: timer@48820000 {
372 compatible = "ti,omap5430-timer"; 379 compatible = "ti,omap5430-timer";
373 reg = <0x48820000 0x80>; 380 reg = <0x48820000 0x80>;
374 interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>; 381 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
375 ti,hwmods = "timer5"; 382 ti,hwmods = "timer5";
376 ti,timer-dsp; 383 ti,timer-dsp;
377 }; 384 };
@@ -379,7 +386,7 @@
379 timer6: timer@48822000 { 386 timer6: timer@48822000 {
380 compatible = "ti,omap5430-timer"; 387 compatible = "ti,omap5430-timer";
381 reg = <0x48822000 0x80>; 388 reg = <0x48822000 0x80>;
382 interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>; 389 interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
383 ti,hwmods = "timer6"; 390 ti,hwmods = "timer6";
384 ti,timer-dsp; 391 ti,timer-dsp;
385 ti,timer-pwm; 392 ti,timer-pwm;
@@ -388,7 +395,7 @@
388 timer7: timer@48824000 { 395 timer7: timer@48824000 {
389 compatible = "ti,omap5430-timer"; 396 compatible = "ti,omap5430-timer";
390 reg = <0x48824000 0x80>; 397 reg = <0x48824000 0x80>;
391 interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>; 398 interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
392 ti,hwmods = "timer7"; 399 ti,hwmods = "timer7";
393 ti,timer-dsp; 400 ti,timer-dsp;
394 }; 401 };
@@ -396,7 +403,7 @@
396 timer8: timer@48826000 { 403 timer8: timer@48826000 {
397 compatible = "ti,omap5430-timer"; 404 compatible = "ti,omap5430-timer";
398 reg = <0x48826000 0x80>; 405 reg = <0x48826000 0x80>;
399 interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>; 406 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
400 ti,hwmods = "timer8"; 407 ti,hwmods = "timer8";
401 ti,timer-dsp; 408 ti,timer-dsp;
402 ti,timer-pwm; 409 ti,timer-pwm;
@@ -405,21 +412,21 @@
405 timer9: timer@4803e000 { 412 timer9: timer@4803e000 {
406 compatible = "ti,omap5430-timer"; 413 compatible = "ti,omap5430-timer";
407 reg = <0x4803e000 0x80>; 414 reg = <0x4803e000 0x80>;
408 interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>; 415 interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
409 ti,hwmods = "timer9"; 416 ti,hwmods = "timer9";
410 }; 417 };
411 418
412 timer10: timer@48086000 { 419 timer10: timer@48086000 {
413 compatible = "ti,omap5430-timer"; 420 compatible = "ti,omap5430-timer";
414 reg = <0x48086000 0x80>; 421 reg = <0x48086000 0x80>;
415 interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>; 422 interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
416 ti,hwmods = "timer10"; 423 ti,hwmods = "timer10";
417 }; 424 };
418 425
419 timer11: timer@48088000 { 426 timer11: timer@48088000 {
420 compatible = "ti,omap5430-timer"; 427 compatible = "ti,omap5430-timer";
421 reg = <0x48088000 0x80>; 428 reg = <0x48088000 0x80>;
422 interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>; 429 interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
423 ti,hwmods = "timer11"; 430 ti,hwmods = "timer11";
424 ti,timer-pwm; 431 ti,timer-pwm;
425 }; 432 };
@@ -427,6 +434,7 @@
427 timer13: timer@48828000 { 434 timer13: timer@48828000 {
428 compatible = "ti,omap5430-timer"; 435 compatible = "ti,omap5430-timer";
429 reg = <0x48828000 0x80>; 436 reg = <0x48828000 0x80>;
437 interrupts = <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>;
430 ti,hwmods = "timer13"; 438 ti,hwmods = "timer13";
431 status = "disabled"; 439 status = "disabled";
432 }; 440 };
@@ -434,6 +442,7 @@
434 timer14: timer@4882a000 { 442 timer14: timer@4882a000 {
435 compatible = "ti,omap5430-timer"; 443 compatible = "ti,omap5430-timer";
436 reg = <0x4882a000 0x80>; 444 reg = <0x4882a000 0x80>;
445 interrupts = <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>;
437 ti,hwmods = "timer14"; 446 ti,hwmods = "timer14";
438 status = "disabled"; 447 status = "disabled";
439 }; 448 };
@@ -441,6 +450,7 @@
441 timer15: timer@4882c000 { 450 timer15: timer@4882c000 {
442 compatible = "ti,omap5430-timer"; 451 compatible = "ti,omap5430-timer";
443 reg = <0x4882c000 0x80>; 452 reg = <0x4882c000 0x80>;
453 interrupts = <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>;
444 ti,hwmods = "timer15"; 454 ti,hwmods = "timer15";
445 status = "disabled"; 455 status = "disabled";
446 }; 456 };
@@ -448,6 +458,7 @@
448 timer16: timer@4882e000 { 458 timer16: timer@4882e000 {
449 compatible = "ti,omap5430-timer"; 459 compatible = "ti,omap5430-timer";
450 reg = <0x4882e000 0x80>; 460 reg = <0x4882e000 0x80>;
461 interrupts = <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>;
451 ti,hwmods = "timer16"; 462 ti,hwmods = "timer16";
452 status = "disabled"; 463 status = "disabled";
453 }; 464 };
@@ -455,7 +466,7 @@
455 wdt2: wdt@4ae14000 { 466 wdt2: wdt@4ae14000 {
456 compatible = "ti,omap4-wdt"; 467 compatible = "ti,omap4-wdt";
457 reg = <0x4ae14000 0x80>; 468 reg = <0x4ae14000 0x80>;
458 interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>; 469 interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
459 ti,hwmods = "wd_timer2"; 470 ti,hwmods = "wd_timer2";
460 }; 471 };
461 472
@@ -469,14 +480,14 @@
469 dmm@4e000000 { 480 dmm@4e000000 {
470 compatible = "ti,omap5-dmm"; 481 compatible = "ti,omap5-dmm";
471 reg = <0x4e000000 0x800>; 482 reg = <0x4e000000 0x800>;
472 interrupts = <0 113 0x4>; 483 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
473 ti,hwmods = "dmm"; 484 ti,hwmods = "dmm";
474 }; 485 };
475 486
476 i2c1: i2c@48070000 { 487 i2c1: i2c@48070000 {
477 compatible = "ti,omap4-i2c"; 488 compatible = "ti,omap4-i2c";
478 reg = <0x48070000 0x100>; 489 reg = <0x48070000 0x100>;
479 interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>; 490 interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
480 #address-cells = <1>; 491 #address-cells = <1>;
481 #size-cells = <0>; 492 #size-cells = <0>;
482 ti,hwmods = "i2c1"; 493 ti,hwmods = "i2c1";
@@ -486,7 +497,7 @@
486 i2c2: i2c@48072000 { 497 i2c2: i2c@48072000 {
487 compatible = "ti,omap4-i2c"; 498 compatible = "ti,omap4-i2c";
488 reg = <0x48072000 0x100>; 499 reg = <0x48072000 0x100>;
489 interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>; 500 interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
490 #address-cells = <1>; 501 #address-cells = <1>;
491 #size-cells = <0>; 502 #size-cells = <0>;
492 ti,hwmods = "i2c2"; 503 ti,hwmods = "i2c2";
@@ -496,7 +507,7 @@
496 i2c3: i2c@48060000 { 507 i2c3: i2c@48060000 {
497 compatible = "ti,omap4-i2c"; 508 compatible = "ti,omap4-i2c";
498 reg = <0x48060000 0x100>; 509 reg = <0x48060000 0x100>;
499 interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>; 510 interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
500 #address-cells = <1>; 511 #address-cells = <1>;
501 #size-cells = <0>; 512 #size-cells = <0>;
502 ti,hwmods = "i2c3"; 513 ti,hwmods = "i2c3";
@@ -506,7 +517,7 @@
506 i2c4: i2c@4807a000 { 517 i2c4: i2c@4807a000 {
507 compatible = "ti,omap4-i2c"; 518 compatible = "ti,omap4-i2c";
508 reg = <0x4807a000 0x100>; 519 reg = <0x4807a000 0x100>;
509 interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>; 520 interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
510 #address-cells = <1>; 521 #address-cells = <1>;
511 #size-cells = <0>; 522 #size-cells = <0>;
512 ti,hwmods = "i2c4"; 523 ti,hwmods = "i2c4";
@@ -516,7 +527,7 @@
516 i2c5: i2c@4807c000 { 527 i2c5: i2c@4807c000 {
517 compatible = "ti,omap4-i2c"; 528 compatible = "ti,omap4-i2c";
518 reg = <0x4807c000 0x100>; 529 reg = <0x4807c000 0x100>;
519 interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>; 530 interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
520 #address-cells = <1>; 531 #address-cells = <1>;
521 #size-cells = <0>; 532 #size-cells = <0>;
522 ti,hwmods = "i2c5"; 533 ti,hwmods = "i2c5";
@@ -526,7 +537,7 @@
526 mmc1: mmc@4809c000 { 537 mmc1: mmc@4809c000 {
527 compatible = "ti,omap4-hsmmc"; 538 compatible = "ti,omap4-hsmmc";
528 reg = <0x4809c000 0x400>; 539 reg = <0x4809c000 0x400>;
529 interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>; 540 interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
530 ti,hwmods = "mmc1"; 541 ti,hwmods = "mmc1";
531 ti,dual-volt; 542 ti,dual-volt;
532 ti,needs-special-reset; 543 ti,needs-special-reset;
@@ -539,7 +550,7 @@
539 mmc2: mmc@480b4000 { 550 mmc2: mmc@480b4000 {
540 compatible = "ti,omap4-hsmmc"; 551 compatible = "ti,omap4-hsmmc";
541 reg = <0x480b4000 0x400>; 552 reg = <0x480b4000 0x400>;
542 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>; 553 interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
543 ti,hwmods = "mmc2"; 554 ti,hwmods = "mmc2";
544 ti,needs-special-reset; 555 ti,needs-special-reset;
545 dmas = <&sdma 47>, <&sdma 48>; 556 dmas = <&sdma 47>, <&sdma 48>;
@@ -550,7 +561,7 @@
550 mmc3: mmc@480ad000 { 561 mmc3: mmc@480ad000 {
551 compatible = "ti,omap4-hsmmc"; 562 compatible = "ti,omap4-hsmmc";
552 reg = <0x480ad000 0x400>; 563 reg = <0x480ad000 0x400>;
553 interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>; 564 interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
554 ti,hwmods = "mmc3"; 565 ti,hwmods = "mmc3";
555 ti,needs-special-reset; 566 ti,needs-special-reset;
556 dmas = <&sdma 77>, <&sdma 78>; 567 dmas = <&sdma 77>, <&sdma 78>;
@@ -561,7 +572,7 @@
561 mmc4: mmc@480d1000 { 572 mmc4: mmc@480d1000 {
562 compatible = "ti,omap4-hsmmc"; 573 compatible = "ti,omap4-hsmmc";
563 reg = <0x480d1000 0x400>; 574 reg = <0x480d1000 0x400>;
564 interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>; 575 interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
565 ti,hwmods = "mmc4"; 576 ti,hwmods = "mmc4";
566 ti,needs-special-reset; 577 ti,needs-special-reset;
567 dmas = <&sdma 57>, <&sdma 58>; 578 dmas = <&sdma 57>, <&sdma 58>;
@@ -704,7 +715,7 @@
704 mcspi1: spi@48098000 { 715 mcspi1: spi@48098000 {
705 compatible = "ti,omap4-mcspi"; 716 compatible = "ti,omap4-mcspi";
706 reg = <0x48098000 0x200>; 717 reg = <0x48098000 0x200>;
707 interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>; 718 interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
708 #address-cells = <1>; 719 #address-cells = <1>;
709 #size-cells = <0>; 720 #size-cells = <0>;
710 ti,hwmods = "mcspi1"; 721 ti,hwmods = "mcspi1";
@@ -725,7 +736,7 @@
725 mcspi2: spi@4809a000 { 736 mcspi2: spi@4809a000 {
726 compatible = "ti,omap4-mcspi"; 737 compatible = "ti,omap4-mcspi";
727 reg = <0x4809a000 0x200>; 738 reg = <0x4809a000 0x200>;
728 interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>; 739 interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
729 #address-cells = <1>; 740 #address-cells = <1>;
730 #size-cells = <0>; 741 #size-cells = <0>;
731 ti,hwmods = "mcspi2"; 742 ti,hwmods = "mcspi2";
@@ -741,7 +752,7 @@
741 mcspi3: spi@480b8000 { 752 mcspi3: spi@480b8000 {
742 compatible = "ti,omap4-mcspi"; 753 compatible = "ti,omap4-mcspi";
743 reg = <0x480b8000 0x200>; 754 reg = <0x480b8000 0x200>;
744 interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>; 755 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
745 #address-cells = <1>; 756 #address-cells = <1>;
746 #size-cells = <0>; 757 #size-cells = <0>;
747 ti,hwmods = "mcspi3"; 758 ti,hwmods = "mcspi3";
@@ -754,7 +765,7 @@
754 mcspi4: spi@480ba000 { 765 mcspi4: spi@480ba000 {
755 compatible = "ti,omap4-mcspi"; 766 compatible = "ti,omap4-mcspi";
756 reg = <0x480ba000 0x200>; 767 reg = <0x480ba000 0x200>;
757 interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>; 768 interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
758 #address-cells = <1>; 769 #address-cells = <1>;
759 #size-cells = <0>; 770 #size-cells = <0>;
760 ti,hwmods = "mcspi4"; 771 ti,hwmods = "mcspi4";
@@ -774,7 +785,7 @@
774 clocks = <&qspi_gfclk_div>; 785 clocks = <&qspi_gfclk_div>;
775 clock-names = "fck"; 786 clock-names = "fck";
776 num-cs = <4>; 787 num-cs = <4>;
777 interrupts = <0 343 0x4>; 788 interrupts = <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>;
778 status = "disabled"; 789 status = "disabled";
779 }; 790 };
780 791
@@ -810,7 +821,7 @@
810 sata: sata@4a141100 { 821 sata: sata@4a141100 {
811 compatible = "snps,dwc-ahci"; 822 compatible = "snps,dwc-ahci";
812 reg = <0x4a140000 0x1100>, <0x4a141100 0x7>; 823 reg = <0x4a140000 0x1100>, <0x4a141100 0x7>;
813 interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>; 824 interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
814 phys = <&sata_phy>; 825 phys = <&sata_phy>;
815 phy-names = "sata-phy"; 826 phy-names = "sata-phy";
816 clocks = <&sata_ref_clk>; 827 clocks = <&sata_ref_clk>;
@@ -887,7 +898,7 @@
887 compatible = "ti,dwc3"; 898 compatible = "ti,dwc3";
888 ti,hwmods = "usb_otg_ss1"; 899 ti,hwmods = "usb_otg_ss1";
889 reg = <0x48880000 0x10000>; 900 reg = <0x48880000 0x10000>;
890 interrupts = <0 77 4>; 901 interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
891 #address-cells = <1>; 902 #address-cells = <1>;
892 #size-cells = <1>; 903 #size-cells = <1>;
893 utmi-mode = <2>; 904 utmi-mode = <2>;
@@ -895,7 +906,7 @@
895 usb1: usb@48890000 { 906 usb1: usb@48890000 {
896 compatible = "snps,dwc3"; 907 compatible = "snps,dwc3";
897 reg = <0x48890000 0x17000>; 908 reg = <0x48890000 0x17000>;
898 interrupts = <0 76 4>; 909 interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
899 phys = <&usb2_phy1>, <&usb3_phy1>; 910 phys = <&usb2_phy1>, <&usb3_phy1>;
900 phy-names = "usb2-phy", "usb3-phy"; 911 phy-names = "usb2-phy", "usb3-phy";
901 tx-fifo-resize; 912 tx-fifo-resize;
@@ -908,7 +919,7 @@
908 compatible = "ti,dwc3"; 919 compatible = "ti,dwc3";
909 ti,hwmods = "usb_otg_ss2"; 920 ti,hwmods = "usb_otg_ss2";
910 reg = <0x488c0000 0x10000>; 921 reg = <0x488c0000 0x10000>;
911 interrupts = <0 92 4>; 922 interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
912 #address-cells = <1>; 923 #address-cells = <1>;
913 #size-cells = <1>; 924 #size-cells = <1>;
914 utmi-mode = <2>; 925 utmi-mode = <2>;
@@ -916,7 +927,7 @@
916 usb2: usb@488d0000 { 927 usb2: usb@488d0000 {
917 compatible = "snps,dwc3"; 928 compatible = "snps,dwc3";
918 reg = <0x488d0000 0x17000>; 929 reg = <0x488d0000 0x17000>;
919 interrupts = <0 78 4>; 930 interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
920 phys = <&usb2_phy2>; 931 phys = <&usb2_phy2>;
921 phy-names = "usb2-phy"; 932 phy-names = "usb2-phy";
922 tx-fifo-resize; 933 tx-fifo-resize;
@@ -930,7 +941,7 @@
930 compatible = "ti,dwc3"; 941 compatible = "ti,dwc3";
931 ti,hwmods = "usb_otg_ss3"; 942 ti,hwmods = "usb_otg_ss3";
932 reg = <0x48900000 0x10000>; 943 reg = <0x48900000 0x10000>;
933 /* interrupts = <0 TBD 4>; */ 944 interrupts = <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>;
934 #address-cells = <1>; 945 #address-cells = <1>;
935 #size-cells = <1>; 946 #size-cells = <1>;
936 utmi-mode = <2>; 947 utmi-mode = <2>;
@@ -939,7 +950,7 @@
939 usb3: usb@48910000 { 950 usb3: usb@48910000 {
940 compatible = "snps,dwc3"; 951 compatible = "snps,dwc3";
941 reg = <0x48910000 0x17000>; 952 reg = <0x48910000 0x17000>;
942 /* interrupts = <0 93 4>; */ 953 interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
943 tx-fifo-resize; 954 tx-fifo-resize;
944 maximum-speed = "high-speed"; 955 maximum-speed = "high-speed";
945 dr_mode = "otg"; 956 dr_mode = "otg";
@@ -950,7 +961,7 @@
950 compatible = "ti,dwc3"; 961 compatible = "ti,dwc3";
951 ti,hwmods = "usb_otg_ss4"; 962 ti,hwmods = "usb_otg_ss4";
952 reg = <0x48940000 0x10000>; 963 reg = <0x48940000 0x10000>;
953 /* interrupts = <0 TBD 4>; */ 964 interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>;
954 #address-cells = <1>; 965 #address-cells = <1>;
955 #size-cells = <1>; 966 #size-cells = <1>;
956 utmi-mode = <2>; 967 utmi-mode = <2>;
@@ -959,7 +970,7 @@
959 usb4: usb@48950000 { 970 usb4: usb@48950000 {
960 compatible = "snps,dwc3"; 971 compatible = "snps,dwc3";
961 reg = <0x48950000 0x17000>; 972 reg = <0x48950000 0x17000>;
962 /* interrupts = <0 TBD 4>; */ 973 interrupts = <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
963 tx-fifo-resize; 974 tx-fifo-resize;
964 maximum-speed = "high-speed"; 975 maximum-speed = "high-speed";
965 dr_mode = "otg"; 976 dr_mode = "otg";
@@ -969,7 +980,7 @@
969 elm: elm@48078000 { 980 elm: elm@48078000 {
970 compatible = "ti,am3352-elm"; 981 compatible = "ti,am3352-elm";
971 reg = <0x48078000 0xfc0>; /* device IO registers */ 982 reg = <0x48078000 0xfc0>; /* device IO registers */
972 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 983 interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
973 ti,hwmods = "elm"; 984 ti,hwmods = "elm";
974 status = "disabled"; 985 status = "disabled";
975 }; 986 };
@@ -978,13 +989,24 @@
978 compatible = "ti,am3352-gpmc"; 989 compatible = "ti,am3352-gpmc";
979 ti,hwmods = "gpmc"; 990 ti,hwmods = "gpmc";
980 reg = <0x50000000 0x37c>; /* device IO registers */ 991 reg = <0x50000000 0x37c>; /* device IO registers */
981 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; 992 interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
982 gpmc,num-cs = <8>; 993 gpmc,num-cs = <8>;
983 gpmc,num-waitpins = <2>; 994 gpmc,num-waitpins = <2>;
984 #address-cells = <2>; 995 #address-cells = <2>;
985 #size-cells = <1>; 996 #size-cells = <1>;
986 status = "disabled"; 997 status = "disabled";
987 }; 998 };
999
1000 crossbar_mpu: crossbar@4a020000 {
1001 compatible = "ti,irq-crossbar";
1002 reg = <0x4a002a48 0x130>;
1003 ti,max-irqs = <160>;
1004 ti,max-crossbar-sources = <MAX_SOURCES>;
1005 ti,reg-size = <2>;
1006 ti,irqs-reserved = <0 1 2 3 5 6 131 132>;
1007 ti,irqs-skip = <10 133 139 140>;
1008 ti,irqs-safe-map = <0>;
1009 };
988 }; 1010 };
989}; 1011};
990 1012
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-14 15:25:19 -0500