diff options
| author | Boris BREZILLON <b.brezillon@overkiz.com> | 2013-08-07 06:14:26 -0400 |
|---|---|---|
| committer | Nicolas Ferre <nicolas.ferre@atmel.com> | 2013-10-16 09:47:07 -0400 |
| commit | d195608acc78db293468694ed5225a39e440429d (patch) | |
| tree | 0018e973d8baf55db02ab43d93c77f5d9bbb165b /arch/arm/boot/dts/at91sam9x5.dtsi | |
| parent | d54322d8f69344d7248cfea038b5810fa2ba1b35 (diff) | |
ARM: at91/dt: split sam9x5 peripheral definitions
This patch splits the sam9x5 peripheral definitions into:
- a common base for all sam9x5 SoCs (at91sam9x5.dtsi)
- several optional peripheral definitions which will be included by specific
sam9x5 SoCs (at91sam9x5_'periph name'.dtsi)
This provides a better representation of the real hardware (drop unneeded
dt nodes) and avoids future peripheral id conflict (lcdc and isi both use
peripheral id 25).
Signed-off-by: Boris BREZILLON <b.brezillon@overkiz.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Diffstat (limited to 'arch/arm/boot/dts/at91sam9x5.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/at91sam9x5.dtsi | 67 |
1 files changed, 0 insertions, 67 deletions
diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi b/arch/arm/boot/dts/at91sam9x5.dtsi index cf78ac0b04b1..417899002c41 100644 --- a/arch/arm/boot/dts/at91sam9x5.dtsi +++ b/arch/arm/boot/dts/at91sam9x5.dtsi | |||
| @@ -206,29 +206,6 @@ | |||
| 206 | }; | 206 | }; |
| 207 | }; | 207 | }; |
| 208 | 208 | ||
| 209 | usart3 { | ||
| 210 | pinctrl_usart3: usart3-0 { | ||
| 211 | atmel,pins = | ||
| 212 | <AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PC22 periph B with pullup */ | ||
| 213 | AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC23 periph B */ | ||
| 214 | }; | ||
| 215 | |||
| 216 | pinctrl_usart3_rts: usart3_rts-0 { | ||
| 217 | atmel,pins = | ||
| 218 | <AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC24 periph B */ | ||
| 219 | }; | ||
| 220 | |||
| 221 | pinctrl_usart3_cts: usart3_cts-0 { | ||
| 222 | atmel,pins = | ||
| 223 | <AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC25 periph B */ | ||
| 224 | }; | ||
| 225 | |||
| 226 | pinctrl_usart3_sck: usart3_sck-0 { | ||
| 227 | atmel,pins = | ||
| 228 | <AT91_PIOC 26 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC26 periph B */ | ||
| 229 | }; | ||
| 230 | }; | ||
| 231 | |||
| 232 | uart0 { | 209 | uart0 { |
| 233 | pinctrl_uart0: uart0-0 { | 210 | pinctrl_uart0: uart0-0 { |
| 234 | atmel,pins = | 211 | atmel,pins = |
| @@ -277,34 +254,6 @@ | |||
| 277 | }; | 254 | }; |
| 278 | }; | 255 | }; |
| 279 | 256 | ||
| 280 | macb0 { | ||
| 281 | pinctrl_macb0_rmii: macb0_rmii-0 { | ||
| 282 | atmel,pins = | ||
| 283 | <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB0 periph A */ | ||
| 284 | AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB1 periph A */ | ||
| 285 | AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB2 periph A */ | ||
| 286 | AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB3 periph A */ | ||
| 287 | AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB4 periph A */ | ||
| 288 | AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB5 periph A */ | ||
| 289 | AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB6 periph A */ | ||
| 290 | AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB7 periph A */ | ||
| 291 | AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB9 periph A */ | ||
| 292 | AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB10 periph A */ | ||
| 293 | }; | ||
| 294 | |||
| 295 | pinctrl_macb0_rmii_mii: macb0_rmii_mii-0 { | ||
| 296 | atmel,pins = | ||
| 297 | <AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB8 periph A */ | ||
| 298 | AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB11 periph A */ | ||
| 299 | AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB12 periph A */ | ||
| 300 | AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB13 periph A */ | ||
| 301 | AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB14 periph A */ | ||
| 302 | AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB15 periph A */ | ||
| 303 | AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB16 periph A */ | ||
| 304 | AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB17 periph A */ | ||
| 305 | }; | ||
| 306 | }; | ||
| 307 | |||
| 308 | mmc0 { | 257 | mmc0 { |
| 309 | pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 { | 258 | pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 { |
| 310 | atmel,pins = | 259 | atmel,pins = |
| @@ -608,22 +557,6 @@ | |||
| 608 | status = "disabled"; | 557 | status = "disabled"; |
| 609 | }; | 558 | }; |
| 610 | 559 | ||
| 611 | macb0: ethernet@f802c000 { | ||
| 612 | compatible = "cdns,at32ap7000-macb", "cdns,macb"; | ||
| 613 | reg = <0xf802c000 0x100>; | ||
| 614 | interrupts = <24 IRQ_TYPE_LEVEL_HIGH 3>; | ||
| 615 | pinctrl-names = "default"; | ||
| 616 | pinctrl-0 = <&pinctrl_macb0_rmii>; | ||
| 617 | status = "disabled"; | ||
| 618 | }; | ||
| 619 | |||
| 620 | macb1: ethernet@f8030000 { | ||
| 621 | compatible = "cdns,at32ap7000-macb", "cdns,macb"; | ||
| 622 | reg = <0xf8030000 0x100>; | ||
| 623 | interrupts = <27 IRQ_TYPE_LEVEL_HIGH 3>; | ||
| 624 | status = "disabled"; | ||
| 625 | }; | ||
| 626 | |||
| 627 | i2c0: i2c@f8010000 { | 560 | i2c0: i2c@f8010000 { |
| 628 | compatible = "atmel,at91sam9x5-i2c"; | 561 | compatible = "atmel,at91sam9x5-i2c"; |
| 629 | reg = <0xf8010000 0x100>; | 562 | reg = <0xf8010000 0x100>; |