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authorAlexandre Belloni <alexandre.belloni@free-electrons.com>2014-04-15 07:07:42 -0400
committerNicolas Ferre <nicolas.ferre@atmel.com>2014-04-18 10:17:12 -0400
commita4c1d6c75822eb76b818cbffda2cf26a3e3ba5ac (patch)
tree423934aebbd0aa6f298cfdee823e264a3f4b0058 /arch/arm/boot/dts/at91sam9rl.dtsi
parentc9eaa447e77efe77b7fa4c953bd62de8297fd6c5 (diff)
ARM: at91/dt: sam9rl: add lcd, adc, usb gadget and pwm support
This patch adds support for the ADC, LCD, USB gadget and PWM controllers to the at91sam9rl. It also reorders the pinctrl_spi0 as it was not correctly sorted. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Diffstat (limited to 'arch/arm/boot/dts/at91sam9rl.dtsi')
-rw-r--r--arch/arm/boot/dts/at91sam9rl.dtsi265
1 files changed, 256 insertions, 9 deletions
diff --git a/arch/arm/boot/dts/at91sam9rl.dtsi b/arch/arm/boot/dts/at91sam9rl.dtsi
index 63e1784d272c..6202e161314a 100644
--- a/arch/arm/boot/dts/at91sam9rl.dtsi
+++ b/arch/arm/boot/dts/at91sam9rl.dtsi
@@ -11,6 +11,7 @@
11#include <dt-bindings/clk/at91.h> 11#include <dt-bindings/clk/at91.h>
12#include <dt-bindings/interrupt-controller/irq.h> 12#include <dt-bindings/interrupt-controller/irq.h>
13#include <dt-bindings/gpio/gpio.h> 13#include <dt-bindings/gpio/gpio.h>
14#include <dt-bindings/pwm/pwm.h>
14 15
15/ { 16/ {
16 model = "Atmel AT91SAM9RL family SoC"; 17 model = "Atmel AT91SAM9RL family SoC";
@@ -32,6 +33,7 @@
32 i2c1 = &i2c1; 33 i2c1 = &i2c1;
33 ssc0 = &ssc0; 34 ssc0 = &ssc0;
34 ssc1 = &ssc1; 35 ssc1 = &ssc1;
36 pwm0 = &pwm0;
35 }; 37 };
36 38
37 cpus { 39 cpus {
@@ -48,12 +50,31 @@
48 reg = <0x20000000 0x04000000>; 50 reg = <0x20000000 0x04000000>;
49 }; 51 };
50 52
53 clocks {
54 adc_op_clk: adc_op_clk{
55 compatible = "fixed-clock";
56 #clock-cells = <0>;
57 clock-frequency = <1000000>;
58 };
59 };
60
51 ahb { 61 ahb {
52 compatible = "simple-bus"; 62 compatible = "simple-bus";
53 #address-cells = <1>; 63 #address-cells = <1>;
54 #size-cells = <1>; 64 #size-cells = <1>;
55 ranges; 65 ranges;
56 66
67 fb0: fb@00500000 {
68 compatible = "atmel,at91sam9rl-lcdc";
69 reg = <0x00500000 0x1000>;
70 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 3>;
71 pinctrl-names = "default";
72 pinctrl-0 = <&pinctrl_fb>;
73 clocks = <&lcd_clk>, <&lcd_clk>;
74 clock-names = "hclk", "lcdc_clk";
75 status = "disabled";
76 };
77
57 nand0: nand@40000000 { 78 nand0: nand@40000000 {
58 compatible = "atmel,at91rm9200-nand"; 79 compatible = "atmel,at91rm9200-nand";
59 #address-cells = <1>; 80 #address-cells = <1>;
@@ -187,6 +208,16 @@
187 status = "disabled"; 208 status = "disabled";
188 }; 209 };
189 210
211 pwm0: pwm@fffc8000 {
212 compatible = "atmel,at91sam9rl-pwm";
213 reg = <0xfffc8000 0x300>;
214 interrupts = <19 IRQ_TYPE_LEVEL_HIGH 4>;
215 #pwm-cells = <3>;
216 clocks = <&pwm_clk>;
217 clock-names = "pwm_clk";
218 status = "disabled";
219 };
220
190 spi0: spi@fffcc000 { 221 spi0: spi@fffcc000 {
191 #address-cells = <1>; 222 #address-cells = <1>;
192 #size-cells = <0>; 223 #size-cells = <0>;
@@ -200,6 +231,111 @@
200 status = "disabled"; 231 status = "disabled";
201 }; 232 };
202 233
234 adc0: adc@fffd0000 {
235 #address-cells = <1>;
236 #size-cells = <0>;
237 compatible = "atmel,at91sam9rl-adc";
238 reg = <0xfffd0000 0x100>;
239 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>;
240 clocks = <&adc_clk>, <&adc_op_clk>;
241 clock-names = "adc_clk", "adc_op_clk";
242 atmel,adc-use-external-triggers;
243 atmel,adc-channels-used = <0x3f>;
244 atmel,adc-vref = <3300>;
245 atmel,adc-startup-time = <40>;
246 atmel,adc-res = <8 10>;
247 atmel,adc-res-names = "lowres", "highres";
248 atmel,adc-use-res = "highres";
249
250 trigger@0 {
251 reg = <0>;
252 trigger-name = "timer-counter-0";
253 trigger-value = <0x1>;
254 };
255 trigger@1 {
256 reg = <1>;
257 trigger-name = "timer-counter-1";
258 trigger-value = <0x3>;
259 };
260
261 trigger@2 {
262 reg = <2>;
263 trigger-name = "timer-counter-2";
264 trigger-value = <0x5>;
265 };
266
267 trigger@3 {
268 reg = <3>;
269 trigger-name = "external";
270 trigger-value = <0x13>;
271 trigger-external;
272 };
273 };
274
275 usb0: gadget@fffd4000 {
276 #address-cells = <1>;
277 #size-cells = <0>;
278 compatible = "atmel,at91sam9rl-udc";
279 reg = <0x00600000 0x100000>,
280 <0xfffd4000 0x4000>;
281 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
282 clocks = <&udphs_clk>, <&utmi>;
283 clock-names = "pclk", "hclk";
284 status = "disabled";
285
286 ep0 {
287 reg = <0>;
288 atmel,fifo-size = <64>;
289 atmel,nb-banks = <1>;
290 };
291
292 ep1 {
293 reg = <1>;
294 atmel,fifo-size = <1024>;
295 atmel,nb-banks = <2>;
296 atmel,can-dma;
297 atmel,can-isoc;
298 };
299
300 ep2 {
301 reg = <2>;
302 atmel,fifo-size = <1024>;
303 atmel,nb-banks = <2>;
304 atmel,can-dma;
305 atmel,can-isoc;
306 };
307
308 ep3 {
309 reg = <3>;
310 atmel,fifo-size = <1024>;
311 atmel,nb-banks = <3>;
312 atmel,can-dma;
313 };
314
315 ep4 {
316 reg = <4>;
317 atmel,fifo-size = <1024>;
318 atmel,nb-banks = <3>;
319 atmel,can-dma;
320 };
321
322 ep5 {
323 reg = <5>;
324 atmel,fifo-size = <1024>;
325 atmel,nb-banks = <3>;
326 atmel,can-dma;
327 atmel,can-isoc;
328 };
329
330 ep6 {
331 reg = <6>;
332 atmel,fifo-size = <1024>;
333 atmel,nb-banks = <3>;
334 atmel,can-dma;
335 atmel,can-isoc;
336 };
337 };
338
203 ramc0: ramc@ffffea00 { 339 ramc0: ramc@ffffea00 {
204 compatible = "atmel,at91sam9260-sdramc"; 340 compatible = "atmel,at91sam9260-sdramc";
205 reg = <0xffffea00 0x200>; 341 reg = <0xffffea00 0x200>;
@@ -238,6 +374,44 @@
238 <0x003fffff 0x0001ff3c>; /* pioD */ 374 <0x003fffff 0x0001ff3c>; /* pioD */
239 375
240 /* shared pinctrl settings */ 376 /* shared pinctrl settings */
377 adc0 {
378 pinctrl_adc0_ts: adc0_ts-0 {
379 atmel,pins =
380 <AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE>,
381 <AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE>,
382 <AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE>,
383 <AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE>;
384 };
385
386 pinctrl_adc0_ad0: adc0_ad0-0 {
387 atmel,pins = <AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE>;
388 };
389
390 pinctrl_adc0_ad1: adc0_ad1-0 {
391 atmel,pins = <AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE>;
392 };
393
394 pinctrl_adc0_ad2: adc0_ad2-0 {
395 atmel,pins = <AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE>;
396 };
397
398 pinctrl_adc0_ad3: adc0_ad3-0 {
399 atmel,pins = <AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE>;
400 };
401
402 pinctrl_adc0_ad4: adc0_ad4-0 {
403 atmel,pins = <AT91_PIOD 6 AT91_PERIPH_A AT91_PINCTRL_NONE>;
404 };
405
406 pinctrl_adc0_ad5: adc0_ad5-0 {
407 atmel,pins = <AT91_PIOD 7 AT91_PERIPH_A AT91_PINCTRL_NONE>;
408 };
409
410 pinctrl_adc0_adtrg: adc0_adtrg-0 {
411 atmel,pins = <AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE>;
412 };
413 };
414
241 dbgu { 415 dbgu {
242 pinctrl_dbgu: dbgu-0 { 416 pinctrl_dbgu: dbgu-0 {
243 atmel,pins = 417 atmel,pins =
@@ -246,6 +420,33 @@
246 }; 420 };
247 }; 421 };
248 422
423 fb {
424 pinctrl_fb: fb-0 {
425 atmel,pins =
426 <AT91_PIOC 1 AT91_PERIPH_B AT91_PINCTRL_NONE>,
427 <AT91_PIOC 3 AT91_PERIPH_A AT91_PINCTRL_NONE>,
428 <AT91_PIOC 5 AT91_PERIPH_A AT91_PINCTRL_NONE>,
429 <AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE>,
430 <AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE>,
431 <AT91_PIOC 9 AT91_PERIPH_B AT91_PINCTRL_NONE>,
432 <AT91_PIOC 10 AT91_PERIPH_B AT91_PINCTRL_NONE>,
433 <AT91_PIOC 11 AT91_PERIPH_B AT91_PINCTRL_NONE>,
434 <AT91_PIOC 12 AT91_PERIPH_B AT91_PINCTRL_NONE>,
435 <AT91_PIOC 13 AT91_PERIPH_B AT91_PINCTRL_NONE>,
436 <AT91_PIOC 15 AT91_PERIPH_B AT91_PINCTRL_NONE>,
437 <AT91_PIOC 16 AT91_PERIPH_B AT91_PINCTRL_NONE>,
438 <AT91_PIOC 17 AT91_PERIPH_B AT91_PINCTRL_NONE>,
439 <AT91_PIOC 18 AT91_PERIPH_B AT91_PINCTRL_NONE>,
440 <AT91_PIOC 19 AT91_PERIPH_B AT91_PINCTRL_NONE>,
441 <AT91_PIOC 20 AT91_PERIPH_B AT91_PINCTRL_NONE>,
442 <AT91_PIOC 21 AT91_PERIPH_B AT91_PINCTRL_NONE>,
443 <AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE>,
444 <AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_NONE>,
445 <AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE>,
446 <AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE>;
447 };
448 };
449
249 i2c_gpio0 { 450 i2c_gpio0 {
250 pinctrl_i2c_gpio0: i2c_gpio0-0 { 451 pinctrl_i2c_gpio0: i2c_gpio0-0 {
251 atmel,pins = 452 atmel,pins =
@@ -307,6 +508,61 @@
307 }; 508 };
308 }; 509 };
309 510
511 pwm0 {
512 pinctrl_pwm0_pwm0_0: pwm0_pwm0-0 {
513 atmel,pins = <AT91_PIOB 8 AT91_PERIPH_B AT91_PINCTRL_NONE>;
514 };
515
516 pinctrl_pwm0_pwm0_1: pwm0_pwm0-1 {
517 atmel,pins = <AT91_PIOC 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;
518 };
519
520 pinctrl_pwm0_pwm0_2: pwm0_pwm0-2 {
521 atmel,pins = <AT91_PIOD 14 AT91_PERIPH_B AT91_PINCTRL_NONE>;
522 };
523
524 pinctrl_pwm0_pwm1_0: pwm0_pwm1-0 {
525 atmel,pins = <AT91_PIOB 9 AT91_PERIPH_B AT91_PINCTRL_NONE>;
526 };
527
528 pinctrl_pwm0_pwm1_1: pwm0_pwm1-1 {
529 atmel,pins = <AT91_PIOC 3 AT91_PERIPH_B AT91_PINCTRL_NONE>;
530 };
531
532 pinctrl_pwm0_pwm1_2: pwm0_pwm1-2 {
533 atmel,pins = <AT91_PIOD 15 AT91_PERIPH_B AT91_PINCTRL_NONE>;
534 };
535
536 pinctrl_pwm0_pwm2_0: pwm0_pwm2-0 {
537 atmel,pins = <AT91_PIOD 5 AT91_PERIPH_B AT91_PINCTRL_NONE>;
538 };
539
540 pinctrl_pwm0_pwm2_1: pwm0_pwm2-1 {
541 atmel,pins = <AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE>;
542 };
543
544 pinctrl_pwm0_pwm2_2: pwm0_pwm2-2 {
545 atmel,pins = <AT91_PIOD 16 AT91_PERIPH_B AT91_PINCTRL_NONE>;
546 };
547
548 pinctrl_pwm0_pwm3_0: pwm0_pwm3-0 {
549 atmel,pins = <AT91_PIOD 8 AT91_PERIPH_B AT91_PINCTRL_NONE>;
550 };
551
552 pinctrl_pwm0_pwm3_1: pwm0_pwm3-1 {
553 atmel,pins = <AT91_PIOD 18 AT91_PERIPH_A AT91_PINCTRL_NONE>;
554 };
555 };
556
557 spi0 {
558 pinctrl_spi0: spi0-0 {
559 atmel,pins =
560 <AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_NONE>,
561 <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE>,
562 <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;
563 };
564 };
565
310 ssc0 { 566 ssc0 {
311 pinctrl_ssc0_tx: ssc0_tx-0 { 567 pinctrl_ssc0_tx: ssc0_tx-0 {
312 atmel,pins = 568 atmel,pins =
@@ -339,15 +595,6 @@
339 }; 595 };
340 }; 596 };
341 597
342 spi0 {
343 pinctrl_spi0: spi0-0 {
344 atmel,pins =
345 <AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_NONE>,
346 <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE>,
347 <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;
348 };
349 };
350
351 tcb0 { 598 tcb0 {
352 pinctrl_tcb0_tclk0: tcb0_tclk0-0 { 599 pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
353 atmel,pins = <AT91_PIOA 3 AT91_PERIPH_B AT91_PINCTRL_NONE>; 600 atmel,pins = <AT91_PIOA 3 AT91_PERIPH_B AT91_PINCTRL_NONE>;
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-13 21:00:44 -0500