diff options
author | Alexandre Belloni <alexandre.belloni@free-electrons.com> | 2014-03-12 05:43:43 -0400 |
---|---|---|
committer | Nicolas Ferre <nicolas.ferre@atmel.com> | 2014-03-12 06:30:59 -0400 |
commit | 8dc5d8e8f7bad257aaa5e8a4a6397690a363d44a (patch) | |
tree | e5ac25e0bde1ef2828a1cc91f6cae32db667ead2 /arch/arm/boot/dts/at91sam9rl.dtsi | |
parent | 72a3fe972935875a1cbf9614ac0dfa58f967dc45 (diff) |
ARM: at91/dt: define at91sam9rl clocks
Define at91sam9rl clocks in at91sam9rl dtsi file.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: Boris BREZILLON <b.brezillon.dev@gmail.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Diffstat (limited to 'arch/arm/boot/dts/at91sam9rl.dtsi')
-rw-r--r-- | arch/arm/boot/dts/at91sam9rl.dtsi | 227 |
1 files changed, 226 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/at91sam9rl.dtsi b/arch/arm/boot/dts/at91sam9rl.dtsi index 3d2db0978c4d..63e1784d272c 100644 --- a/arch/arm/boot/dts/at91sam9rl.dtsi +++ b/arch/arm/boot/dts/at91sam9rl.dtsi | |||
@@ -8,6 +8,7 @@ | |||
8 | 8 | ||
9 | #include "skeleton.dtsi" | 9 | #include "skeleton.dtsi" |
10 | #include <dt-bindings/pinctrl/at91.h> | 10 | #include <dt-bindings/pinctrl/at91.h> |
11 | #include <dt-bindings/clk/at91.h> | ||
11 | #include <dt-bindings/interrupt-controller/irq.h> | 12 | #include <dt-bindings/interrupt-controller/irq.h> |
12 | #include <dt-bindings/gpio/gpio.h> | 13 | #include <dt-bindings/gpio/gpio.h> |
13 | 14 | ||
@@ -81,6 +82,8 @@ | |||
81 | interrupts = <16 IRQ_TYPE_LEVEL_HIGH 0>, | 82 | interrupts = <16 IRQ_TYPE_LEVEL_HIGH 0>, |
82 | <17 IRQ_TYPE_LEVEL_HIGH 0>, | 83 | <17 IRQ_TYPE_LEVEL_HIGH 0>, |
83 | <18 IRQ_TYPE_LEVEL_HIGH 0>; | 84 | <18 IRQ_TYPE_LEVEL_HIGH 0>; |
85 | clocks = <&tc0_clk>, <&tc1_clk>, <&tc2_clk>; | ||
86 | clock-names = "t0_clk", "t1_clk", "t2_clk"; | ||
84 | }; | 87 | }; |
85 | 88 | ||
86 | mmc0: mmc@fffa4000 { | 89 | mmc0: mmc@fffa4000 { |
@@ -90,6 +93,8 @@ | |||
90 | #address-cells = <1>; | 93 | #address-cells = <1>; |
91 | #size-cells = <0>; | 94 | #size-cells = <0>; |
92 | pinctrl-names = "default"; | 95 | pinctrl-names = "default"; |
96 | clocks = <&mci0_clk>; | ||
97 | clock-names = "mci_clk"; | ||
93 | status = "disabled"; | 98 | status = "disabled"; |
94 | }; | 99 | }; |
95 | 100 | ||
@@ -99,6 +104,7 @@ | |||
99 | interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>; | 104 | interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>; |
100 | #address-cells = <1>; | 105 | #address-cells = <1>; |
101 | #size-cells = <0>; | 106 | #size-cells = <0>; |
107 | clocks = <&twi0_clk>; | ||
102 | status = "disabled"; | 108 | status = "disabled"; |
103 | }; | 109 | }; |
104 | 110 | ||
@@ -119,6 +125,8 @@ | |||
119 | atmel,use-dma-tx; | 125 | atmel,use-dma-tx; |
120 | pinctrl-names = "default"; | 126 | pinctrl-names = "default"; |
121 | pinctrl-0 = <&pinctrl_usart0>; | 127 | pinctrl-0 = <&pinctrl_usart0>; |
128 | clocks = <&usart0_clk>; | ||
129 | clock-names = "usart"; | ||
122 | status = "disabled"; | 130 | status = "disabled"; |
123 | }; | 131 | }; |
124 | 132 | ||
@@ -130,6 +138,8 @@ | |||
130 | atmel,use-dma-tx; | 138 | atmel,use-dma-tx; |
131 | pinctrl-names = "default"; | 139 | pinctrl-names = "default"; |
132 | pinctrl-0 = <&pinctrl_usart1>; | 140 | pinctrl-0 = <&pinctrl_usart1>; |
141 | clocks = <&usart1_clk>; | ||
142 | clock-names = "usart"; | ||
133 | status = "disabled"; | 143 | status = "disabled"; |
134 | }; | 144 | }; |
135 | 145 | ||
@@ -141,6 +151,8 @@ | |||
141 | atmel,use-dma-tx; | 151 | atmel,use-dma-tx; |
142 | pinctrl-names = "default"; | 152 | pinctrl-names = "default"; |
143 | pinctrl-0 = <&pinctrl_usart2>; | 153 | pinctrl-0 = <&pinctrl_usart2>; |
154 | clocks = <&usart2_clk>; | ||
155 | clock-names = "usart"; | ||
144 | status = "disabled"; | 156 | status = "disabled"; |
145 | }; | 157 | }; |
146 | 158 | ||
@@ -152,6 +164,8 @@ | |||
152 | atmel,use-dma-tx; | 164 | atmel,use-dma-tx; |
153 | pinctrl-names = "default"; | 165 | pinctrl-names = "default"; |
154 | pinctrl-0 = <&pinctrl_usart3>; | 166 | pinctrl-0 = <&pinctrl_usart3>; |
167 | clocks = <&usart3_clk>; | ||
168 | clock-names = "usart"; | ||
155 | status = "disabled"; | 169 | status = "disabled"; |
156 | }; | 170 | }; |
157 | 171 | ||
@@ -181,6 +195,8 @@ | |||
181 | interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>; | 195 | interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>; |
182 | pinctrl-names = "default"; | 196 | pinctrl-names = "default"; |
183 | pinctrl-0 = <&pinctrl_spi0>; | 197 | pinctrl-0 = <&pinctrl_spi0>; |
198 | clocks = <&spi0_clk>; | ||
199 | clock-names = "spi_clk"; | ||
184 | status = "disabled"; | 200 | status = "disabled"; |
185 | }; | 201 | }; |
186 | 202 | ||
@@ -203,6 +219,8 @@ | |||
203 | interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; | 219 | interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; |
204 | pinctrl-names = "default"; | 220 | pinctrl-names = "default"; |
205 | pinctrl-0 = <&pinctrl_dbgu>; | 221 | pinctrl-0 = <&pinctrl_dbgu>; |
222 | clocks = <&mck>; | ||
223 | clock-names = "usart"; | ||
206 | status = "disabled"; | 224 | status = "disabled"; |
207 | }; | 225 | }; |
208 | 226 | ||
@@ -484,6 +502,7 @@ | |||
484 | gpio-controller; | 502 | gpio-controller; |
485 | interrupt-controller; | 503 | interrupt-controller; |
486 | #interrupt-cells = <2>; | 504 | #interrupt-cells = <2>; |
505 | clocks = <&pioA_clk>; | ||
487 | }; | 506 | }; |
488 | 507 | ||
489 | pioB: gpio@fffff600 { | 508 | pioB: gpio@fffff600 { |
@@ -494,6 +513,7 @@ | |||
494 | gpio-controller; | 513 | gpio-controller; |
495 | interrupt-controller; | 514 | interrupt-controller; |
496 | #interrupt-cells = <2>; | 515 | #interrupt-cells = <2>; |
516 | clocks = <&pioB_clk>; | ||
497 | }; | 517 | }; |
498 | 518 | ||
499 | pioC: gpio@fffff800 { | 519 | pioC: gpio@fffff800 { |
@@ -504,6 +524,7 @@ | |||
504 | gpio-controller; | 524 | gpio-controller; |
505 | interrupt-controller; | 525 | interrupt-controller; |
506 | #interrupt-cells = <2>; | 526 | #interrupt-cells = <2>; |
527 | clocks = <&pioC_clk>; | ||
507 | }; | 528 | }; |
508 | 529 | ||
509 | pioD: gpio@fffffa00 { | 530 | pioD: gpio@fffffa00 { |
@@ -514,12 +535,215 @@ | |||
514 | gpio-controller; | 535 | gpio-controller; |
515 | interrupt-controller; | 536 | interrupt-controller; |
516 | #interrupt-cells = <2>; | 537 | #interrupt-cells = <2>; |
538 | clocks = <&pioD_clk>; | ||
517 | }; | 539 | }; |
518 | }; | 540 | }; |
519 | 541 | ||
520 | pmc: pmc@fffffc00 { | 542 | pmc: pmc@fffffc00 { |
521 | compatible = "atmel,at91rm9200-pmc"; | 543 | compatible = "atmel,at91sam9g45-pmc"; |
522 | reg = <0xfffffc00 0x100>; | 544 | reg = <0xfffffc00 0x100>; |
545 | interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; | ||
546 | interrupt-controller; | ||
547 | #address-cells = <1>; | ||
548 | #size-cells = <0>; | ||
549 | #interrupt-cells = <1>; | ||
550 | |||
551 | clk32k: slck { | ||
552 | compatible = "fixed-clock"; | ||
553 | #clock-cells = <0>; | ||
554 | clock-frequency = <32768>; | ||
555 | }; | ||
556 | |||
557 | main: mainck { | ||
558 | compatible = "atmel,at91rm9200-clk-main"; | ||
559 | #clock-cells = <0>; | ||
560 | interrupts-extended = <&pmc AT91_PMC_MOSCS>; | ||
561 | clocks = <&clk32k>; | ||
562 | }; | ||
563 | |||
564 | plla: pllack { | ||
565 | compatible = "atmel,at91rm9200-clk-pll"; | ||
566 | #clock-cells = <0>; | ||
567 | interrupts-extended = <&pmc AT91_PMC_LOCKA>; | ||
568 | clocks = <&main>; | ||
569 | reg = <0>; | ||
570 | atmel,clk-input-range = <1000000 32000000>; | ||
571 | #atmel,pll-clk-output-range-cells = <4>; | ||
572 | atmel,pll-clk-output-ranges = <80000000 200000000 190000000 240000000>; | ||
573 | }; | ||
574 | |||
575 | utmi: utmick { | ||
576 | compatible = "atmel,at91sam9x5-clk-utmi"; | ||
577 | #clock-cells = <0>; | ||
578 | interrupt-parent = <&pmc>; | ||
579 | interrupts = <AT91_PMC_LOCKU>; | ||
580 | clocks = <&main>; | ||
581 | }; | ||
582 | |||
583 | mck: masterck { | ||
584 | compatible = "atmel,at91rm9200-clk-master"; | ||
585 | #clock-cells = <0>; | ||
586 | interrupts-extended = <&pmc AT91_PMC_MCKRDY>; | ||
587 | clocks = <&clk32k>, <&main>, <&plla>, <&utmi>; | ||
588 | atmel,clk-output-range = <0 94000000>; | ||
589 | atmel,clk-divisors = <1 2 4 3>; | ||
590 | }; | ||
591 | |||
592 | prog: progck { | ||
593 | compatible = "atmel,at91rm9200-clk-programmable"; | ||
594 | #address-cells = <1>; | ||
595 | #size-cells = <0>; | ||
596 | interrupt-parent = <&pmc>; | ||
597 | clocks = <&clk32k>, <&main>, <&plla>, <&utmi>, <&mck>; | ||
598 | |||
599 | prog0: prog0 { | ||
600 | #clock-cells = <0>; | ||
601 | reg = <0>; | ||
602 | interrupts = <AT91_PMC_PCKRDY(0)>; | ||
603 | }; | ||
604 | |||
605 | prog1: prog1 { | ||
606 | #clock-cells = <0>; | ||
607 | reg = <1>; | ||
608 | interrupts = <AT91_PMC_PCKRDY(1)>; | ||
609 | }; | ||
610 | }; | ||
611 | |||
612 | systemck { | ||
613 | compatible = "atmel,at91rm9200-clk-system"; | ||
614 | #address-cells = <1>; | ||
615 | #size-cells = <0>; | ||
616 | |||
617 | pck0: pck0 { | ||
618 | #clock-cells = <0>; | ||
619 | reg = <8>; | ||
620 | clocks = <&prog0>; | ||
621 | }; | ||
622 | |||
623 | pck1: pck1 { | ||
624 | #clock-cells = <0>; | ||
625 | reg = <9>; | ||
626 | clocks = <&prog1>; | ||
627 | }; | ||
628 | |||
629 | }; | ||
630 | |||
631 | periphck { | ||
632 | compatible = "atmel,at91rm9200-clk-peripheral"; | ||
633 | #address-cells = <1>; | ||
634 | #size-cells = <0>; | ||
635 | clocks = <&mck>; | ||
636 | |||
637 | pioA_clk: pioA_clk { | ||
638 | #clock-cells = <0>; | ||
639 | reg = <2>; | ||
640 | }; | ||
641 | |||
642 | pioB_clk: pioB_clk { | ||
643 | #clock-cells = <0>; | ||
644 | reg = <3>; | ||
645 | }; | ||
646 | |||
647 | pioC_clk: pioC_clk { | ||
648 | #clock-cells = <0>; | ||
649 | reg = <4>; | ||
650 | }; | ||
651 | |||
652 | pioD_clk: pioD_clk { | ||
653 | #clock-cells = <0>; | ||
654 | reg = <5>; | ||
655 | }; | ||
656 | |||
657 | usart0_clk: usart0_clk { | ||
658 | #clock-cells = <0>; | ||
659 | reg = <6>; | ||
660 | }; | ||
661 | |||
662 | usart1_clk: usart1_clk { | ||
663 | #clock-cells = <0>; | ||
664 | reg = <7>; | ||
665 | }; | ||
666 | |||
667 | usart2_clk: usart2_clk { | ||
668 | #clock-cells = <0>; | ||
669 | reg = <8>; | ||
670 | }; | ||
671 | |||
672 | usart3_clk: usart3_clk { | ||
673 | #clock-cells = <0>; | ||
674 | reg = <9>; | ||
675 | }; | ||
676 | |||
677 | mci0_clk: mci0_clk { | ||
678 | #clock-cells = <0>; | ||
679 | reg = <10>; | ||
680 | }; | ||
681 | |||
682 | twi0_clk: twi0_clk { | ||
683 | #clock-cells = <0>; | ||
684 | reg = <11>; | ||
685 | }; | ||
686 | |||
687 | twi1_clk: twi1_clk { | ||
688 | #clock-cells = <0>; | ||
689 | reg = <12>; | ||
690 | }; | ||
691 | |||
692 | spi0_clk: spi0_clk { | ||
693 | #clock-cells = <0>; | ||
694 | reg = <13>; | ||
695 | }; | ||
696 | |||
697 | ssc0_clk: ssc0_clk { | ||
698 | #clock-cells = <0>; | ||
699 | reg = <14>; | ||
700 | }; | ||
701 | |||
702 | ssc1_clk: ssc1_clk { | ||
703 | #clock-cells = <0>; | ||
704 | reg = <15>; | ||
705 | }; | ||
706 | |||
707 | tc0_clk: tc0_clk { | ||
708 | #clock-cells = <0>; | ||
709 | reg = <16>; | ||
710 | }; | ||
711 | |||
712 | tc1_clk: tc1_clk { | ||
713 | #clock-cells = <0>; | ||
714 | reg = <17>; | ||
715 | }; | ||
716 | |||
717 | tc2_clk: tc2_clk { | ||
718 | #clock-cells = <0>; | ||
719 | reg = <18>; | ||
720 | }; | ||
721 | |||
722 | pwm_clk: pwm_clk { | ||
723 | #clock-cells = <0>; | ||
724 | reg = <19>; | ||
725 | }; | ||
726 | |||
727 | adc_clk: adc_clk { | ||
728 | #clock-cells = <0>; | ||
729 | reg = <20>; | ||
730 | }; | ||
731 | |||
732 | dma0_clk: dma0_clk { | ||
733 | #clock-cells = <0>; | ||
734 | reg = <21>; | ||
735 | }; | ||
736 | |||
737 | udphs_clk: udphs_clk { | ||
738 | #clock-cells = <0>; | ||
739 | reg = <22>; | ||
740 | }; | ||
741 | |||
742 | lcd_clk: lcd_clk { | ||
743 | #clock-cells = <0>; | ||
744 | reg = <23>; | ||
745 | }; | ||
746 | }; | ||
523 | }; | 747 | }; |
524 | 748 | ||
525 | rstc@fffffd00 { | 749 | rstc@fffffd00 { |
@@ -536,6 +760,7 @@ | |||
536 | compatible = "atmel,at91sam9260-pit"; | 760 | compatible = "atmel,at91sam9260-pit"; |
537 | reg = <0xfffffd30 0xf>; | 761 | reg = <0xfffffd30 0xf>; |
538 | interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; | 762 | interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; |
763 | clocks = <&mck>; | ||
539 | }; | 764 | }; |
540 | 765 | ||
541 | watchdog@fffffd40 { | 766 | watchdog@fffffd40 { |