diff options
author | Alexandre Belloni <alexandre.belloni@free-electrons.com> | 2014-03-12 05:43:38 -0400 |
---|---|---|
committer | Nicolas Ferre <nicolas.ferre@atmel.com> | 2014-03-12 06:30:27 -0400 |
commit | 7aff448f3e5d8961588ae1980abfd6ab3a1e1cdf (patch) | |
tree | 45db7331c390759c41a6ee1b982ba69d0cd43464 /arch/arm/boot/dts/at91sam9rl.dtsi | |
parent | 09ab012acc50435552018bca23f6f4e6e329ef83 (diff) |
ARM: at91: Add at91sam9rl DT SoC support
This adds preliminary DT support for the at91sam9rl.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: Boris BREZILLON <b.brezillon.dev@gmail.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Diffstat (limited to 'arch/arm/boot/dts/at91sam9rl.dtsi')
-rw-r--r-- | arch/arm/boot/dts/at91sam9rl.dtsi | 577 |
1 files changed, 577 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/at91sam9rl.dtsi b/arch/arm/boot/dts/at91sam9rl.dtsi new file mode 100644 index 000000000000..3d2db0978c4d --- /dev/null +++ b/arch/arm/boot/dts/at91sam9rl.dtsi | |||
@@ -0,0 +1,577 @@ | |||
1 | /* | ||
2 | * at91sam9rl.dtsi - Device Tree Include file for AT91SAM9RL family SoC | ||
3 | * | ||
4 | * Copyright (C) 2014 Alexandre Belloni <alexandre.belloni@free-electrons.com> | ||
5 | * | ||
6 | * Licensed under GPLv2 or later. | ||
7 | */ | ||
8 | |||
9 | #include "skeleton.dtsi" | ||
10 | #include <dt-bindings/pinctrl/at91.h> | ||
11 | #include <dt-bindings/interrupt-controller/irq.h> | ||
12 | #include <dt-bindings/gpio/gpio.h> | ||
13 | |||
14 | / { | ||
15 | model = "Atmel AT91SAM9RL family SoC"; | ||
16 | compatible = "atmel,at91sam9rl", "atmel,at91sam9"; | ||
17 | interrupt-parent = <&aic>; | ||
18 | |||
19 | aliases { | ||
20 | serial0 = &dbgu; | ||
21 | serial1 = &usart0; | ||
22 | serial2 = &usart1; | ||
23 | serial3 = &usart2; | ||
24 | serial4 = &usart3; | ||
25 | gpio0 = &pioA; | ||
26 | gpio1 = &pioB; | ||
27 | gpio2 = &pioC; | ||
28 | gpio3 = &pioD; | ||
29 | tcb0 = &tcb0; | ||
30 | i2c0 = &i2c0; | ||
31 | i2c1 = &i2c1; | ||
32 | ssc0 = &ssc0; | ||
33 | ssc1 = &ssc1; | ||
34 | }; | ||
35 | |||
36 | cpus { | ||
37 | #address-cells = <0>; | ||
38 | #size-cells = <0>; | ||
39 | |||
40 | cpu { | ||
41 | compatible = "arm,arm926ej-s"; | ||
42 | device_type = "cpu"; | ||
43 | }; | ||
44 | }; | ||
45 | |||
46 | memory { | ||
47 | reg = <0x20000000 0x04000000>; | ||
48 | }; | ||
49 | |||
50 | ahb { | ||
51 | compatible = "simple-bus"; | ||
52 | #address-cells = <1>; | ||
53 | #size-cells = <1>; | ||
54 | ranges; | ||
55 | |||
56 | nand0: nand@40000000 { | ||
57 | compatible = "atmel,at91rm9200-nand"; | ||
58 | #address-cells = <1>; | ||
59 | #size-cells = <1>; | ||
60 | reg = <0x40000000 0x10000000>, | ||
61 | <0xffffe800 0x200>; | ||
62 | atmel,nand-addr-offset = <21>; | ||
63 | atmel,nand-cmd-offset = <22>; | ||
64 | pinctrl-names = "default"; | ||
65 | pinctrl-0 = <&pinctrl_nand>; | ||
66 | gpios = <&pioD 17 GPIO_ACTIVE_HIGH>, | ||
67 | <&pioB 6 GPIO_ACTIVE_HIGH>, | ||
68 | <0>; | ||
69 | status = "disabled"; | ||
70 | }; | ||
71 | |||
72 | apb { | ||
73 | compatible = "simple-bus"; | ||
74 | #address-cells = <1>; | ||
75 | #size-cells = <1>; | ||
76 | ranges; | ||
77 | |||
78 | tcb0: timer@fffa0000 { | ||
79 | compatible = "atmel,at91rm9200-tcb"; | ||
80 | reg = <0xfffa0000 0x100>; | ||
81 | interrupts = <16 IRQ_TYPE_LEVEL_HIGH 0>, | ||
82 | <17 IRQ_TYPE_LEVEL_HIGH 0>, | ||
83 | <18 IRQ_TYPE_LEVEL_HIGH 0>; | ||
84 | }; | ||
85 | |||
86 | mmc0: mmc@fffa4000 { | ||
87 | compatible = "atmel,hsmci"; | ||
88 | reg = <0xfffa4000 0x600>; | ||
89 | interrupts = <10 IRQ_TYPE_LEVEL_HIGH 0>; | ||
90 | #address-cells = <1>; | ||
91 | #size-cells = <0>; | ||
92 | pinctrl-names = "default"; | ||
93 | status = "disabled"; | ||
94 | }; | ||
95 | |||
96 | i2c0: i2c@fffa8000 { | ||
97 | compatible = "atmel,at91sam9260-i2c"; | ||
98 | reg = <0xfffa8000 0x100>; | ||
99 | interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>; | ||
100 | #address-cells = <1>; | ||
101 | #size-cells = <0>; | ||
102 | status = "disabled"; | ||
103 | }; | ||
104 | |||
105 | i2c1: i2c@fffac000 { | ||
106 | compatible = "atmel,at91sam9260-i2c"; | ||
107 | reg = <0xfffac000 0x100>; | ||
108 | interrupts = <12 IRQ_TYPE_LEVEL_HIGH 6>; | ||
109 | #address-cells = <1>; | ||
110 | #size-cells = <0>; | ||
111 | status = "disabled"; | ||
112 | }; | ||
113 | |||
114 | usart0: serial@fffb0000 { | ||
115 | compatible = "atmel,at91sam9260-usart"; | ||
116 | reg = <0xfffb0000 0x200>; | ||
117 | interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>; | ||
118 | atmel,use-dma-rx; | ||
119 | atmel,use-dma-tx; | ||
120 | pinctrl-names = "default"; | ||
121 | pinctrl-0 = <&pinctrl_usart0>; | ||
122 | status = "disabled"; | ||
123 | }; | ||
124 | |||
125 | usart1: serial@fffb4000 { | ||
126 | compatible = "atmel,at91sam9260-usart"; | ||
127 | reg = <0xfffb4000 0x200>; | ||
128 | interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>; | ||
129 | atmel,use-dma-rx; | ||
130 | atmel,use-dma-tx; | ||
131 | pinctrl-names = "default"; | ||
132 | pinctrl-0 = <&pinctrl_usart1>; | ||
133 | status = "disabled"; | ||
134 | }; | ||
135 | |||
136 | usart2: serial@fffb8000 { | ||
137 | compatible = "atmel,at91sam9260-usart"; | ||
138 | reg = <0xfffb8000 0x200>; | ||
139 | interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>; | ||
140 | atmel,use-dma-rx; | ||
141 | atmel,use-dma-tx; | ||
142 | pinctrl-names = "default"; | ||
143 | pinctrl-0 = <&pinctrl_usart2>; | ||
144 | status = "disabled"; | ||
145 | }; | ||
146 | |||
147 | usart3: serial@fffbc000 { | ||
148 | compatible = "atmel,at91sam9260-usart"; | ||
149 | reg = <0xfffbc000 0x200>; | ||
150 | interrupts = <9 IRQ_TYPE_LEVEL_HIGH 5>; | ||
151 | atmel,use-dma-rx; | ||
152 | atmel,use-dma-tx; | ||
153 | pinctrl-names = "default"; | ||
154 | pinctrl-0 = <&pinctrl_usart3>; | ||
155 | status = "disabled"; | ||
156 | }; | ||
157 | |||
158 | ssc0: ssc@fffc0000 { | ||
159 | compatible = "atmel,at91rm9200-ssc"; | ||
160 | reg = <0xfffc0000 0x4000>; | ||
161 | interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>; | ||
162 | pinctrl-names = "default"; | ||
163 | pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>; | ||
164 | status = "disabled"; | ||
165 | }; | ||
166 | |||
167 | ssc1: ssc@fffc4000 { | ||
168 | compatible = "atmel,at91rm9200-ssc"; | ||
169 | reg = <0xfffc4000 0x4000>; | ||
170 | interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>; | ||
171 | pinctrl-names = "default"; | ||
172 | pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>; | ||
173 | status = "disabled"; | ||
174 | }; | ||
175 | |||
176 | spi0: spi@fffcc000 { | ||
177 | #address-cells = <1>; | ||
178 | #size-cells = <0>; | ||
179 | compatible = "atmel,at91rm9200-spi"; | ||
180 | reg = <0xfffcc000 0x200>; | ||
181 | interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>; | ||
182 | pinctrl-names = "default"; | ||
183 | pinctrl-0 = <&pinctrl_spi0>; | ||
184 | status = "disabled"; | ||
185 | }; | ||
186 | |||
187 | ramc0: ramc@ffffea00 { | ||
188 | compatible = "atmel,at91sam9260-sdramc"; | ||
189 | reg = <0xffffea00 0x200>; | ||
190 | }; | ||
191 | |||
192 | aic: interrupt-controller@fffff000 { | ||
193 | #interrupt-cells = <3>; | ||
194 | compatible = "atmel,at91rm9200-aic"; | ||
195 | interrupt-controller; | ||
196 | reg = <0xfffff000 0x200>; | ||
197 | atmel,external-irqs = <31>; | ||
198 | }; | ||
199 | |||
200 | dbgu: serial@fffff200 { | ||
201 | compatible = "atmel,at91sam9260-usart"; | ||
202 | reg = <0xfffff200 0x200>; | ||
203 | interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; | ||
204 | pinctrl-names = "default"; | ||
205 | pinctrl-0 = <&pinctrl_dbgu>; | ||
206 | status = "disabled"; | ||
207 | }; | ||
208 | |||
209 | pinctrl@fffff400 { | ||
210 | #address-cells = <1>; | ||
211 | #size-cells = <1>; | ||
212 | compatible = "atmel,at91rm9200-pinctrl", "simple-bus"; | ||
213 | ranges = <0xfffff400 0xfffff400 0x800>; | ||
214 | |||
215 | atmel,mux-mask = | ||
216 | /* A B */ | ||
217 | <0xffffffff 0xe05c6738>, /* pioA */ | ||
218 | <0xffffffff 0x0000c780>, /* pioB */ | ||
219 | <0xffffffff 0xe3ffff0e>, /* pioC */ | ||
220 | <0x003fffff 0x0001ff3c>; /* pioD */ | ||
221 | |||
222 | /* shared pinctrl settings */ | ||
223 | dbgu { | ||
224 | pinctrl_dbgu: dbgu-0 { | ||
225 | atmel,pins = | ||
226 | <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE>, | ||
227 | <AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; | ||
228 | }; | ||
229 | }; | ||
230 | |||
231 | i2c_gpio0 { | ||
232 | pinctrl_i2c_gpio0: i2c_gpio0-0 { | ||
233 | atmel,pins = | ||
234 | <AT91_PIOA 23 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>, | ||
235 | <AT91_PIOA 24 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>; | ||
236 | }; | ||
237 | }; | ||
238 | |||
239 | i2c_gpio1 { | ||
240 | pinctrl_i2c_gpio1: i2c_gpio1-0 { | ||
241 | atmel,pins = | ||
242 | <AT91_PIOD 10 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>, | ||
243 | <AT91_PIOD 11 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>; | ||
244 | }; | ||
245 | }; | ||
246 | |||
247 | mmc0 { | ||
248 | pinctrl_mmc0_clk: mmc0_clk-0 { | ||
249 | atmel,pins = | ||
250 | <AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; | ||
251 | }; | ||
252 | |||
253 | pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 { | ||
254 | atmel,pins = | ||
255 | <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>, | ||
256 | <AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; | ||
257 | }; | ||
258 | |||
259 | pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 { | ||
260 | atmel,pins = | ||
261 | <AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>, | ||
262 | <AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>, | ||
263 | <AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; | ||
264 | }; | ||
265 | }; | ||
266 | |||
267 | nand { | ||
268 | pinctrl_nand: nand-0 { | ||
269 | atmel,pins = | ||
270 | <AT91_PIOD 17 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>, | ||
271 | <AT91_PIOB 6 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; | ||
272 | }; | ||
273 | |||
274 | pinctrl_nand0_ale_cle: nand_ale_cle-0 { | ||
275 | atmel,pins = | ||
276 | <AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>, | ||
277 | <AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE>; | ||
278 | }; | ||
279 | |||
280 | pinctrl_nand0_oe_we: nand_oe_we-0 { | ||
281 | atmel,pins = | ||
282 | <AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE>, | ||
283 | <AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; | ||
284 | }; | ||
285 | |||
286 | pinctrl_nand0_cs: nand_cs-0 { | ||
287 | atmel,pins = | ||
288 | <AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE>; | ||
289 | }; | ||
290 | }; | ||
291 | |||
292 | ssc0 { | ||
293 | pinctrl_ssc0_tx: ssc0_tx-0 { | ||
294 | atmel,pins = | ||
295 | <AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE>, | ||
296 | <AT91_PIOC 0 AT91_PERIPH_A AT91_PINCTRL_NONE>, | ||
297 | <AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE>; | ||
298 | }; | ||
299 | |||
300 | pinctrl_ssc0_rx: ssc0_rx-0 { | ||
301 | atmel,pins = | ||
302 | <AT91_PIOA 10 AT91_PERIPH_B AT91_PINCTRL_NONE>, | ||
303 | <AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_NONE>, | ||
304 | <AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE>; | ||
305 | }; | ||
306 | }; | ||
307 | |||
308 | ssc1 { | ||
309 | pinctrl_ssc1_tx: ssc1_tx-0 { | ||
310 | atmel,pins = | ||
311 | <AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_NONE>, | ||
312 | <AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>, | ||
313 | <AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE>; | ||
314 | }; | ||
315 | |||
316 | pinctrl_ssc1_rx: ssc1_rx-0 { | ||
317 | atmel,pins = | ||
318 | <AT91_PIOA 8 AT91_PERIPH_B AT91_PINCTRL_NONE>, | ||
319 | <AT91_PIOA 9 AT91_PERIPH_B AT91_PINCTRL_NONE>, | ||
320 | <AT91_PIOA 14 AT91_PERIPH_B AT91_PINCTRL_NONE>; | ||
321 | }; | ||
322 | }; | ||
323 | |||
324 | spi0 { | ||
325 | pinctrl_spi0: spi0-0 { | ||
326 | atmel,pins = | ||
327 | <AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_NONE>, | ||
328 | <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE>, | ||
329 | <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; | ||
330 | }; | ||
331 | }; | ||
332 | |||
333 | tcb0 { | ||
334 | pinctrl_tcb0_tclk0: tcb0_tclk0-0 { | ||
335 | atmel,pins = <AT91_PIOA 3 AT91_PERIPH_B AT91_PINCTRL_NONE>; | ||
336 | }; | ||
337 | |||
338 | pinctrl_tcb0_tclk1: tcb0_tclk1-0 { | ||
339 | atmel,pins = <AT91_PIOC 31 AT91_PERIPH_B AT91_PINCTRL_NONE>; | ||
340 | }; | ||
341 | |||
342 | pinctrl_tcb0_tclk2: tcb0_tclk2-0 { | ||
343 | atmel,pins = <AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; | ||
344 | }; | ||
345 | |||
346 | pinctrl_tcb0_tioa0: tcb0_tioa0-0 { | ||
347 | atmel,pins = <AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_NONE>; | ||
348 | }; | ||
349 | |||
350 | pinctrl_tcb0_tioa1: tcb0_tioa1-0 { | ||
351 | atmel,pins = <AT91_PIOC 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; | ||
352 | }; | ||
353 | |||
354 | pinctrl_tcb0_tioa2: tcb0_tioa2-0 { | ||
355 | atmel,pins = <AT91_PIOD 10 AT91_PERIPH_B AT91_PINCTRL_NONE>; | ||
356 | }; | ||
357 | |||
358 | pinctrl_tcb0_tiob0: tcb0_tiob0-0 { | ||
359 | atmel,pins = <AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; | ||
360 | }; | ||
361 | |||
362 | pinctrl_tcb0_tiob1: tcb0_tiob1-0 { | ||
363 | atmel,pins = <AT91_PIOC 30 AT91_PERIPH_B AT91_PINCTRL_NONE>; | ||
364 | }; | ||
365 | |||
366 | pinctrl_tcb0_tiob2: tcb0_tiob2-0 { | ||
367 | atmel,pins = <AT91_PIOD 11 AT91_PERIPH_B AT91_PINCTRL_NONE>; | ||
368 | }; | ||
369 | }; | ||
370 | |||
371 | usart0 { | ||
372 | pinctrl_usart0: usart0-0 { | ||
373 | atmel,pins = | ||
374 | <AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE>, | ||
375 | <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; | ||
376 | }; | ||
377 | |||
378 | pinctrl_usart0_rts: usart0_rts-0 { | ||
379 | atmel,pins = | ||
380 | <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE>; | ||
381 | }; | ||
382 | |||
383 | pinctrl_usart0_cts: usart0_cts-0 { | ||
384 | atmel,pins = | ||
385 | <AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE>; | ||
386 | }; | ||
387 | |||
388 | pinctrl_usart0_dtr_dsr: usart0_dtr_dsr-0 { | ||
389 | atmel,pins = | ||
390 | <AT91_PIOD 14 AT91_PERIPH_A AT91_PINCTRL_NONE>, | ||
391 | <AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE>; | ||
392 | }; | ||
393 | |||
394 | pinctrl_usart0_dcd: usart0_dcd-0 { | ||
395 | atmel,pins = | ||
396 | <AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE>; | ||
397 | }; | ||
398 | |||
399 | pinctrl_usart0_ri: usart0_ri-0 { | ||
400 | atmel,pins = | ||
401 | <AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE>; | ||
402 | }; | ||
403 | |||
404 | pinctrl_usart0_sck: usart0_sck-0 { | ||
405 | atmel,pins = | ||
406 | <AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>; | ||
407 | }; | ||
408 | }; | ||
409 | |||
410 | usart1 { | ||
411 | pinctrl_usart1: usart1-0 { | ||
412 | atmel,pins = | ||
413 | <AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>, | ||
414 | <AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE>; | ||
415 | }; | ||
416 | |||
417 | pinctrl_usart1_rts: usart1_rts-0 { | ||
418 | atmel,pins = | ||
419 | <AT91_PIOA 18 AT91_PERIPH_B AT91_PINCTRL_NONE>; | ||
420 | }; | ||
421 | |||
422 | pinctrl_usart1_cts: usart1_cts-0 { | ||
423 | atmel,pins = | ||
424 | <AT91_PIOA 19 AT91_PERIPH_B AT91_PINCTRL_NONE>; | ||
425 | }; | ||
426 | |||
427 | pinctrl_usart1_sck: usart1_sck-0 { | ||
428 | atmel,pins = | ||
429 | <AT91_PIOD 2 AT91_PERIPH_B AT91_PINCTRL_NONE>; | ||
430 | }; | ||
431 | }; | ||
432 | |||
433 | usart2 { | ||
434 | pinctrl_usart2: usart2-0 { | ||
435 | atmel,pins = | ||
436 | <AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>, | ||
437 | <AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE>; | ||
438 | }; | ||
439 | |||
440 | pinctrl_usart2_rts: usart2_rts-0 { | ||
441 | atmel,pins = | ||
442 | <AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; | ||
443 | }; | ||
444 | |||
445 | pinctrl_usart2_cts: usart2_cts-0 { | ||
446 | atmel,pins = | ||
447 | <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; | ||
448 | }; | ||
449 | |||
450 | pinctrl_usart2_sck: usart2_sck-0 { | ||
451 | atmel,pins = | ||
452 | <AT91_PIOD 9 AT91_PERIPH_A AT91_PINCTRL_NONE>; | ||
453 | }; | ||
454 | }; | ||
455 | |||
456 | usart3 { | ||
457 | pinctrl_usart3: usart3-0 { | ||
458 | atmel,pins = | ||
459 | <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>, | ||
460 | <AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE>; | ||
461 | }; | ||
462 | |||
463 | pinctrl_usart3_rts: usart3_rts-0 { | ||
464 | atmel,pins = | ||
465 | <AT91_PIOD 4 AT91_PERIPH_B AT91_PINCTRL_NONE>; | ||
466 | }; | ||
467 | |||
468 | pinctrl_usart3_cts: usart3_cts-0 { | ||
469 | atmel,pins = | ||
470 | <AT91_PIOD 3 AT91_PERIPH_B AT91_PINCTRL_NONE>; | ||
471 | }; | ||
472 | |||
473 | pinctrl_usart3_sck: usart3_sck-0 { | ||
474 | atmel,pins = | ||
475 | <AT91_PIOA 20 AT91_PERIPH_B AT91_PINCTRL_NONE>; | ||
476 | }; | ||
477 | }; | ||
478 | |||
479 | pioA: gpio@fffff400 { | ||
480 | compatible = "atmel,at91rm9200-gpio"; | ||
481 | reg = <0xfffff400 0x200>; | ||
482 | interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>; | ||
483 | #gpio-cells = <2>; | ||
484 | gpio-controller; | ||
485 | interrupt-controller; | ||
486 | #interrupt-cells = <2>; | ||
487 | }; | ||
488 | |||
489 | pioB: gpio@fffff600 { | ||
490 | compatible = "atmel,at91rm9200-gpio"; | ||
491 | reg = <0xfffff600 0x200>; | ||
492 | interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>; | ||
493 | #gpio-cells = <2>; | ||
494 | gpio-controller; | ||
495 | interrupt-controller; | ||
496 | #interrupt-cells = <2>; | ||
497 | }; | ||
498 | |||
499 | pioC: gpio@fffff800 { | ||
500 | compatible = "atmel,at91rm9200-gpio"; | ||
501 | reg = <0xfffff800 0x200>; | ||
502 | interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>; | ||
503 | #gpio-cells = <2>; | ||
504 | gpio-controller; | ||
505 | interrupt-controller; | ||
506 | #interrupt-cells = <2>; | ||
507 | }; | ||
508 | |||
509 | pioD: gpio@fffffa00 { | ||
510 | compatible = "atmel,at91rm9200-gpio"; | ||
511 | reg = <0xfffffa00 0x200>; | ||
512 | interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>; | ||
513 | #gpio-cells = <2>; | ||
514 | gpio-controller; | ||
515 | interrupt-controller; | ||
516 | #interrupt-cells = <2>; | ||
517 | }; | ||
518 | }; | ||
519 | |||
520 | pmc: pmc@fffffc00 { | ||
521 | compatible = "atmel,at91rm9200-pmc"; | ||
522 | reg = <0xfffffc00 0x100>; | ||
523 | }; | ||
524 | |||
525 | rstc@fffffd00 { | ||
526 | compatible = "atmel,at91sam9260-rstc"; | ||
527 | reg = <0xfffffd00 0x10>; | ||
528 | }; | ||
529 | |||
530 | shdwc@fffffd10 { | ||
531 | compatible = "atmel,at91sam9260-shdwc"; | ||
532 | reg = <0xfffffd10 0x10>; | ||
533 | }; | ||
534 | |||
535 | pit: timer@fffffd30 { | ||
536 | compatible = "atmel,at91sam9260-pit"; | ||
537 | reg = <0xfffffd30 0xf>; | ||
538 | interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; | ||
539 | }; | ||
540 | |||
541 | watchdog@fffffd40 { | ||
542 | compatible = "atmel,at91sam9260-wdt"; | ||
543 | reg = <0xfffffd40 0x10>; | ||
544 | interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; | ||
545 | status = "disabled"; | ||
546 | }; | ||
547 | }; | ||
548 | }; | ||
549 | |||
550 | i2c@0 { | ||
551 | compatible = "i2c-gpio"; | ||
552 | gpios = <&pioA 23 GPIO_ACTIVE_HIGH>, /* sda */ | ||
553 | <&pioA 24 GPIO_ACTIVE_HIGH>; /* scl */ | ||
554 | i2c-gpio,sda-open-drain; | ||
555 | i2c-gpio,scl-open-drain; | ||
556 | i2c-gpio,delay-us = <2>; /* ~100 kHz */ | ||
557 | #address-cells = <1>; | ||
558 | #size-cells = <0>; | ||
559 | pinctrl-names = "default"; | ||
560 | pinctrl-0 = <&pinctrl_i2c_gpio0>; | ||
561 | status = "disabled"; | ||
562 | }; | ||
563 | |||
564 | i2c@1 { | ||
565 | compatible = "i2c-gpio"; | ||
566 | gpios = <&pioD 10 GPIO_ACTIVE_HIGH>, /* sda */ | ||
567 | <&pioD 11 GPIO_ACTIVE_HIGH>; /* scl */ | ||
568 | i2c-gpio,sda-open-drain; | ||
569 | i2c-gpio,scl-open-drain; | ||
570 | i2c-gpio,delay-us = <2>; /* ~100 kHz */ | ||
571 | #address-cells = <1>; | ||
572 | #size-cells = <0>; | ||
573 | pinctrl-names = "default"; | ||
574 | pinctrl-0 = <&pinctrl_i2c_gpio1>; | ||
575 | status = "disabled"; | ||
576 | }; | ||
577 | }; | ||