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authorThomas Petazzoni <thomas.petazzoni@free-electrons.com>2013-07-30 11:44:50 -0400
committerJason Cooper <jason@lakedaemon.net>2013-08-07 16:05:03 -0400
commitc7841473f7ecbff624809f31f36aab0df5041ef9 (patch)
tree13b036b305f7f2b2e081da8cbc1b3f3c66d8e869 /arch/arm/boot/dts/armada-xp-axpwifiap.dts
parentf72b720ffe80ef3130dc1ce5fc2f8d796cd81956 (diff)
ARM: mvebu: add support for the AXP WiFi AP board
The AXP WiFi AP board is a Marvell platform based on the Armada XP MV78230 SoC. It has two mini-PCIe connectors, one USB 3.0 port powered by a USB 3.0 controller on PCIe, two Ethernet ports, 1 GB of RAM, 1 GB of NAND, 16 MB of SPI flash, one SATA port and one button, two UARTs Successfully tested: USB 3.0 port, the mini-PCIe connectors, SPI flash, Ethernet ports, SATA port, button, UART. Untested: NAND flash, due to lack of mainline support for the Armada 370/XP NAND controller for now. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Tested-by: Seif Mazareeb <seif@marvell.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Diffstat (limited to 'arch/arm/boot/dts/armada-xp-axpwifiap.dts')
-rw-r--r--arch/arm/boot/dts/armada-xp-axpwifiap.dts164
1 files changed, 164 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/armada-xp-axpwifiap.dts b/arch/arm/boot/dts/armada-xp-axpwifiap.dts
new file mode 100644
index 000000000000..2a542bd20565
--- /dev/null
+++ b/arch/arm/boot/dts/armada-xp-axpwifiap.dts
@@ -0,0 +1,164 @@
1/*
2 * Device Tree file for Marvell RD-AXPWiFiAP.
3 *
4 * Note: this board is shipped with a new generation boot loader that
5 * remaps internal registers at 0xf1000000. Therefore, if earlyprintk
6 * is used, the CONFIG_DEBUG_MVEBU_UART_ALTERNATE option should be
7 * used.
8 *
9 * Copyright (C) 2013 Marvell
10 *
11 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
12 *
13 * This file is licensed under the terms of the GNU General Public
14 * License version 2. This program is licensed "as is" without any
15 * warranty of any kind, whether express or implied.
16 */
17
18/dts-v1/;
19/include/ "armada-xp-mv78230.dtsi"
20
21/ {
22 model = "Marvell RD-AXPWiFiAP";
23 compatible = "marvell,rd-axpwifiap", "marvell,armadaxp-mv78230", "marvell,armadaxp", "marvell,armada-370-xp";
24
25 chosen {
26 bootargs = "console=ttyS0,115200 earlyprintk";
27 };
28
29 memory {
30 device_type = "memory";
31 reg = <0x00000000 0x00000000 0x00000000 0x40000000>; /* 1GB */
32 };
33
34 soc {
35 ranges = <0 0 0xf1000000 0x100000 /* Internal registers 1MiB */
36 0xe0000000 0 0xe0000000 0x8100000 /* PCIe */>;
37
38 internal-regs {
39 pinctrl {
40 pinctrl-0 = <&pmx_phy_int>;
41 pinctrl-names = "default";
42
43 pmx_ge0: pmx-ge0 {
44 marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3",
45 "mpp4", "mpp5", "mpp6", "mpp7",
46 "mpp8", "mpp9", "mpp10", "mpp11";
47 marvell,function = "ge0";
48 };
49
50 pmx_ge1: pmx-ge1 {
51 marvell,pins = "mpp12", "mpp13", "mpp14", "mpp15",
52 "mpp16", "mpp17", "mpp18", "mpp19",
53 "mpp20", "mpp21", "mpp22", "mpp23";
54 marvell,function = "ge1";
55 };
56
57 pmx_keys: pmx-keys {
58 marvell,pins = "mpp33";
59 marvell,function = "gpio";
60 };
61
62 pmx_spi: pmx-spi {
63 marvell,pins = "mpp36", "mpp37", "mpp38", "mpp39";
64 marvell,function = "spi";
65 };
66
67 pmx_phy_int: pmx-phy-int {
68 marvell,pins = "mpp32";
69 marvell,function = "gpio";
70 };
71 };
72
73 serial@12000 {
74 clock-frequency = <250000000>;
75 status = "okay";
76 };
77
78 serial@12100 {
79 clock-frequency = <250000000>;
80 status = "okay";
81 };
82
83 sata@a0000 {
84 nr-ports = <1>;
85 status = "okay";
86 };
87
88 mdio {
89 phy0: ethernet-phy@0 {
90 reg = <0>;
91 };
92
93 phy1: ethernet-phy@1 {
94 reg = <1>;
95 };
96 };
97
98 ethernet@70000 {
99 pinctrl-0 = <&pmx_ge0>;
100 pinctrl-names = "default";
101 status = "okay";
102 phy = <&phy0>;
103 phy-mode = "rgmii-id";
104 };
105 ethernet@74000 {
106 pinctrl-0 = <&pmx_ge1>;
107 pinctrl-names = "default";
108 status = "okay";
109 phy = <&phy1>;
110 phy-mode = "rgmii-id";
111 };
112
113 spi0: spi@10600 {
114 status = "okay";
115 pinctrl-0 = <&pmx_spi>;
116 pinctrl-names = "default";
117
118 spi-flash@0 {
119 #address-cells = <1>;
120 #size-cells = <1>;
121 compatible = "n25q128a13";
122 reg = <0>; /* Chip select 0 */
123 spi-max-frequency = <108000000>;
124 };
125 };
126
127 pcie-controller {
128 status = "okay";
129
130 /* First mini-PCIe port */
131 pcie@1,0 {
132 /* Port 0, Lane 0 */
133 status = "okay";
134 };
135
136 /* Second mini-PCIe port */
137 pcie@2,0 {
138 /* Port 0, Lane 1 */
139 status = "okay";
140 };
141
142 /* Renesas uPD720202 USB 3.0 controller */
143 pcie@3,0 {
144 /* Port 0, Lane 3 */
145 status = "okay";
146 };
147 };
148 };
149 };
150
151 gpio_keys {
152 compatible = "gpio-keys";
153 #address-cells = <1>;
154 #size-cells = <0>;
155 pinctrl-0 = <&pmx_keys>;
156 pinctrl-names = "default";
157
158 button@1 {
159 label = "Factory Reset Button";
160 linux,code = <141>; /* KEY_SETUP */
161 gpios = <&gpio1 1 1>;
162 };
163 };
164};