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authorJavier Martinez Canillas <javier.martinez@collabora.co.uk>2013-09-20 11:00:00 -0400
committerBenoit Cousson <bcousson@baylibre.com>2013-10-11 15:06:32 -0400
commit82d75afcb718dc8fe9fcd71959bff7878df53076 (patch)
treeffd75d28823dada50ce4c8c01b6de7307e3c3d30 /arch/arm/boot/dts/am335x-bone-common.dtsi
parentec8a75979f199fd6fdcf24f8d1c928a48c61483e (diff)
ARM: dts: AM33XX: use pinmux node defined in included file
am33xx boards DTS include the am33xx.dtsi Device Tree source file that already define a pinmux device node for the AM33XX SoC Pin Multiplex. Redefining this for each board makes the Device Tree files harder to modify and maintain so let's just use what is already defined in the included .dtsi file. Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
Diffstat (limited to 'arch/arm/boot/dts/am335x-bone-common.dtsi')
-rw-r--r--arch/arm/boot/dts/am335x-bone-common.dtsi218
1 files changed, 109 insertions, 109 deletions
diff --git a/arch/arm/boot/dts/am335x-bone-common.dtsi b/arch/arm/boot/dts/am335x-bone-common.dtsi
index 56361ceb418b..29799ac3423a 100644
--- a/arch/arm/boot/dts/am335x-bone-common.dtsi
+++ b/arch/arm/boot/dts/am335x-bone-common.dtsi
@@ -21,115 +21,6 @@
21 reg = <0x80000000 0x10000000>; /* 256 MB */ 21 reg = <0x80000000 0x10000000>; /* 256 MB */
22 }; 22 };
23 23
24 am33xx_pinmux: pinmux@44e10800 {
25 pinctrl-names = "default";
26 pinctrl-0 = <&clkout2_pin>;
27
28 user_leds_s0: user_leds_s0 {
29 pinctrl-single,pins = <
30 0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a5.gpio1_21 */
31 0x58 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a6.gpio1_22 */
32 0x5c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a7.gpio1_23 */
33 0x60 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a8.gpio1_24 */
34 >;
35 };
36
37 i2c0_pins: pinmux_i2c0_pins {
38 pinctrl-single,pins = <
39 0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */
40 0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */
41 >;
42 };
43
44 uart0_pins: pinmux_uart0_pins {
45 pinctrl-single,pins = <
46 0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */
47 0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
48 >;
49 };
50
51 clkout2_pin: pinmux_clkout2_pin {
52 pinctrl-single,pins = <
53 0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */
54 >;
55 };
56
57 cpsw_default: cpsw_default {
58 pinctrl-single,pins = <
59 /* Slave 1 */
60 0x110 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxerr.mii1_rxerr */
61 0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txen.mii1_txen */
62 0x118 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxdv.mii1_rxdv */
63 0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd3.mii1_txd3 */
64 0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd2.mii1_txd2 */
65 0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd1.mii1_txd1 */
66 0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd0.mii1_txd0 */
67 0x12c (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_txclk.mii1_txclk */
68 0x130 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxclk.mii1_rxclk */
69 0x134 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd3.mii1_rxd3 */
70 0x138 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd2.mii1_rxd2 */
71 0x13c (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd1.mii1_rxd1 */
72 0x140 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd0.mii1_rxd0 */
73 >;
74 };
75
76 cpsw_sleep: cpsw_sleep {
77 pinctrl-single,pins = <
78 /* Slave 1 reset value */
79 0x110 (PIN_INPUT_PULLDOWN | MUX_MODE7)
80 0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7)
81 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7)
82 0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7)
83 0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7)
84 0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7)
85 0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7)
86 0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7)
87 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7)
88 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7)
89 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7)
90 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7)
91 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7)
92 >;
93 };
94
95 davinci_mdio_default: davinci_mdio_default {
96 pinctrl-single,pins = <
97 /* MDIO */
98 0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
99 0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
100 >;
101 };
102
103 davinci_mdio_sleep: davinci_mdio_sleep {
104 pinctrl-single,pins = <
105 /* MDIO reset value */
106 0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7)
107 0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)
108 >;
109 };
110
111 mmc1_pins: pinmux_mmc1_pins {
112 pinctrl-single,pins = <
113 0x160 (PIN_INPUT | MUX_MODE7) /* GPIO0_6 */
114 >;
115 };
116
117 emmc_pins: pinmux_emmc_pins {
118 pinctrl-single,pins = <
119 0x80 (PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk */
120 0x84 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_csn2.mmc1_cmd */
121 0x00 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */
122 0x04 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */
123 0x08 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */
124 0x0c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */
125 0x10 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad4.mmc1_dat4 */
126 0x14 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad5.mmc1_dat5 */
127 0x18 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad6.mmc1_dat6 */
128 0x1c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */
129 >;
130 };
131 };
132
133 ocp { 24 ocp {
134 uart0: serial@44e09000 { 25 uart0: serial@44e09000 {
135 pinctrl-names = "default"; 26 pinctrl-names = "default";
@@ -217,6 +108,115 @@
217 }; 108 };
218}; 109};
219 110
111&am33xx_pinmux {
112 pinctrl-names = "default";
113 pinctrl-0 = <&clkout2_pin>;
114
115 user_leds_s0: user_leds_s0 {
116 pinctrl-single,pins = <
117 0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a5.gpio1_21 */
118 0x58 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a6.gpio1_22 */
119 0x5c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a7.gpio1_23 */
120 0x60 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a8.gpio1_24 */
121 >;
122 };
123
124 i2c0_pins: pinmux_i2c0_pins {
125 pinctrl-single,pins = <
126 0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */
127 0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */
128 >;
129 };
130
131 uart0_pins: pinmux_uart0_pins {
132 pinctrl-single,pins = <
133 0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */
134 0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
135 >;
136 };
137
138 clkout2_pin: pinmux_clkout2_pin {
139 pinctrl-single,pins = <
140 0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */
141 >;
142 };
143
144 cpsw_default: cpsw_default {
145 pinctrl-single,pins = <
146 /* Slave 1 */
147 0x110 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxerr.mii1_rxerr */
148 0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txen.mii1_txen */
149 0x118 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxdv.mii1_rxdv */
150 0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd3.mii1_txd3 */
151 0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd2.mii1_txd2 */
152 0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd1.mii1_txd1 */
153 0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd0.mii1_txd0 */
154 0x12c (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_txclk.mii1_txclk */
155 0x130 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxclk.mii1_rxclk */
156 0x134 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd3.mii1_rxd3 */
157 0x138 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd2.mii1_rxd2 */
158 0x13c (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd1.mii1_rxd1 */
159 0x140 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd0.mii1_rxd0 */
160 >;
161 };
162
163 cpsw_sleep: cpsw_sleep {
164 pinctrl-single,pins = <
165 /* Slave 1 reset value */
166 0x110 (PIN_INPUT_PULLDOWN | MUX_MODE7)
167 0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7)
168 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7)
169 0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7)
170 0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7)
171 0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7)
172 0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7)
173 0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7)
174 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7)
175 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7)
176 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7)
177 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7)
178 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7)
179 >;
180 };
181
182 davinci_mdio_default: davinci_mdio_default {
183 pinctrl-single,pins = <
184 /* MDIO */
185 0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
186 0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
187 >;
188 };
189
190 davinci_mdio_sleep: davinci_mdio_sleep {
191 pinctrl-single,pins = <
192 /* MDIO reset value */
193 0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7)
194 0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)
195 >;
196 };
197
198 mmc1_pins: pinmux_mmc1_pins {
199 pinctrl-single,pins = <
200 0x160 (PIN_INPUT | MUX_MODE7) /* GPIO0_6 */
201 >;
202 };
203
204 emmc_pins: pinmux_emmc_pins {
205 pinctrl-single,pins = <
206 0x80 (PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk */
207 0x84 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_csn2.mmc1_cmd */
208 0x00 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */
209 0x04 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */
210 0x08 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */
211 0x0c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */
212 0x10 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad4.mmc1_dat4 */
213 0x14 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad5.mmc1_dat5 */
214 0x18 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad6.mmc1_dat6 */
215 0x1c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */
216 >;
217 };
218};
219
220/include/ "tps65217.dtsi" 220/include/ "tps65217.dtsi"
221 221
222&tps { 222&tps {
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-18 14:38:08 -0500