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authorLinus Torvalds <torvalds@linux-foundation.org>2013-11-13 18:51:29 -0500
committerLinus Torvalds <torvalds@linux-foundation.org>2013-11-13 18:51:29 -0500
commitf47671e2d861a2093179cd64dda22016664b2015 (patch)
treef77cb8e7d875f442e2cf0bdc8fbe478ec8ff8181 /arch/arm/boot/compressed
parent8ceafbfa91ffbdbb2afaea5c24ccb519ffb8b587 (diff)
parent42cbe8271ca6562b4ad4b2e6a9895084b16eef5e (diff)
Merge branch 'for-linus' of git://git.linaro.org/people/rmk/linux-arm
Pull ARM updates from Russell King: "Included in this series are: 1. BE8 (modern big endian) changes for ARM from Ben Dooks 2. big.Little support from Nicolas Pitre and Dave Martin 3. support for LPAE systems with all system memory above 4GB 4. Perf updates from Will Deacon 5. Additional prefetching and other performance improvements from Will. 6. Neon-optimised AES implementation fro Ard. 7. A number of smaller fixes scattered around the place. There is a rather horrid merge conflict in tools/perf - I was never notified of the conflict because it originally occurred between Will's tree and other stuff. Consequently I have a resolution which Will forwarded me, which I'll forward on immediately after sending this mail. The other notable thing is I'm expecting some build breakage in the crypto stuff on ARM only with Ard's AES patches. These were merged into a stable git branch which others had already pulled, so there's little I can do about this. The problem is caused because these patches have a dependency on some code in the crypto git tree - I tried requesting a branch I can pull to resolve these, and all I got each time from the crypto people was "we'll revert our patches then" which would only make things worse since I still don't have the dependent patches. I've no idea what's going on there or how to resolve that, and since I can't split these patches from the rest of this pull request, I'm rather stuck with pushing this as-is or reverting Ard's patches. Since it should "come out in the wash" I've left them in - the only build problems they seem to cause at the moment are with randconfigs, and since it's a new feature anyway. However, if by -rc1 the dependencies aren't in, I think it'd be best to revert Ard's patches" I resolved the perf conflict roughly as per the patch sent by Russell, but there may be some differences. Any errors are likely mine. Let's see how the crypto issues work out.. * 'for-linus' of git://git.linaro.org/people/rmk/linux-arm: (110 commits) ARM: 7868/1: arm/arm64: remove atomic_clear_mask() in "include/asm/atomic.h" ARM: 7867/1: include: asm: use 'int' instead of 'unsigned long' for 'oldval' in atomic_cmpxchg(). ARM: 7866/1: include: asm: use 'long long' instead of 'u64' within atomic.h ARM: 7871/1: amba: Extend number of IRQS ARM: 7887/1: Don't smp_cross_call() on UP devices in arch_irq_work_raise() ARM: 7872/1: Support arch_irq_work_raise() via self IPIs ARM: 7880/1: Clear the IT state independent of the Thumb-2 mode ARM: 7878/1: nommu: Implement dummy early_paging_init() ARM: 7876/1: clear Thumb-2 IT state on exception handling ARM: 7874/2: bL_switcher: Remove cpu_hotplug_driver_{lock,unlock}() ARM: footbridge: fix build warnings for netwinder ARM: 7873/1: vfp: clear vfp_current_hw_state for dying cpu ARM: fix misplaced arch_virt_to_idmap() ARM: 7848/1: mcpm: Implement cpu_kill() to synchronise on powerdown ARM: 7847/1: mcpm: Factor out logical-to-physical CPU translation ARM: 7869/1: remove unused XSCALE_PMU Kconfig param ARM: 7864/1: Handle 64-bit memory in case of 32-bit phys_addr_t ARM: 7863/1: Let arm_add_memory() always use 64-bit arguments ARM: 7862/1: pcpu: replace __get_cpu_var_uses ARM: 7861/1: cacheflush: consolidate single-CPU ARMv7 cache disabling code ...
Diffstat (limited to 'arch/arm/boot/compressed')
-rw-r--r--arch/arm/boot/compressed/head.S9
1 files changed, 3 insertions, 6 deletions
diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S
index 75189f13cf54..066b03480b63 100644
--- a/arch/arm/boot/compressed/head.S
+++ b/arch/arm/boot/compressed/head.S
@@ -135,6 +135,7 @@ start:
135 .word _edata @ zImage end address 135 .word _edata @ zImage end address
136 THUMB( .thumb ) 136 THUMB( .thumb )
1371: 1371:
138 ARM_BE8( setend be ) @ go BE8 if compiled for BE8
138 mrs r9, cpsr 139 mrs r9, cpsr
139#ifdef CONFIG_ARM_VIRT_EXT 140#ifdef CONFIG_ARM_VIRT_EXT
140 bl __hyp_stub_install @ get into SVC mode, reversibly 141 bl __hyp_stub_install @ get into SVC mode, reversibly
@@ -699,9 +700,7 @@ __armv4_mmu_cache_on:
699 mrc p15, 0, r0, c1, c0, 0 @ read control reg 700 mrc p15, 0, r0, c1, c0, 0 @ read control reg
700 orr r0, r0, #0x5000 @ I-cache enable, RR cache replacement 701 orr r0, r0, #0x5000 @ I-cache enable, RR cache replacement
701 orr r0, r0, #0x0030 702 orr r0, r0, #0x0030
702#ifdef CONFIG_CPU_ENDIAN_BE8 703 ARM_BE8( orr r0, r0, #1 << 25 ) @ big-endian page tables
703 orr r0, r0, #1 << 25 @ big-endian page tables
704#endif
705 bl __common_mmu_cache_on 704 bl __common_mmu_cache_on
706 mov r0, #0 705 mov r0, #0
707 mcr p15, 0, r0, c8, c7, 0 @ flush I,D TLBs 706 mcr p15, 0, r0, c8, c7, 0 @ flush I,D TLBs
@@ -728,9 +727,7 @@ __armv7_mmu_cache_on:
728 orr r0, r0, #1 << 22 @ U (v6 unaligned access model) 727 orr r0, r0, #1 << 22 @ U (v6 unaligned access model)
729 @ (needed for ARM1176) 728 @ (needed for ARM1176)
730#ifdef CONFIG_MMU 729#ifdef CONFIG_MMU
731#ifdef CONFIG_CPU_ENDIAN_BE8 730 ARM_BE8( orr r0, r0, #1 << 25 ) @ big-endian page tables
732 orr r0, r0, #1 << 25 @ big-endian page tables
733#endif
734 mrcne p15, 0, r6, c2, c0, 2 @ read ttb control reg 731 mrcne p15, 0, r6, c2, c0, 2 @ read ttb control reg
735 orrne r0, r0, #1 @ MMU enabled 732 orrne r0, r0, #1 @ MMU enabled
736 movne r1, #0xfffffffd @ domain 0 = client 733 movne r1, #0xfffffffd @ domain 0 = client