diff options
author | Catalin Marinas <catalin.marinas@arm.com> | 2011-08-15 06:04:41 -0400 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2011-08-15 06:58:59 -0400 |
commit | 145e10e173c8adf4804334fb0dd10028300a7a7a (patch) | |
tree | 37409358acf86db952e0216fa528d289eef4fc4d /arch/arm/Kconfig | |
parent | 43c734be5571a4daad9f0a3e0b3229a1c0049917 (diff) |
ARM: 7015/1: ARM errata: Possible cache data corruption with hit-under-miss enabled
This patch is a workaround for the 364296 ARM1136 r0p2 erratum (possible
cache data corruption with hit-under-miss enabled). It sets the
undocumented bit 31 in the auxiliary control register and the FI bit in
the control register, thus disabling hit-under-miss without putting the
processor into full low interrupt latency mode.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Tested-by: Siarhei Siamashka <siarhei.siamashka@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/Kconfig')
-rw-r--r-- | arch/arm/Kconfig | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 5ebc5d922ea1..3269576dbfa8 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig | |||
@@ -1271,6 +1271,18 @@ config ARM_ERRATA_754327 | |||
1271 | This workaround defines cpu_relax() as smp_mb(), preventing correctly | 1271 | This workaround defines cpu_relax() as smp_mb(), preventing correctly |
1272 | written polling loops from denying visibility of updates to memory. | 1272 | written polling loops from denying visibility of updates to memory. |
1273 | 1273 | ||
1274 | config ARM_ERRATA_364296 | ||
1275 | bool "ARM errata: Possible cache data corruption with hit-under-miss enabled" | ||
1276 | depends on CPU_V6 && !SMP | ||
1277 | help | ||
1278 | This options enables the workaround for the 364296 ARM1136 | ||
1279 | r0p2 erratum (possible cache data corruption with | ||
1280 | hit-under-miss enabled). It sets the undocumented bit 31 in | ||
1281 | the auxiliary control register and the FI bit in the control | ||
1282 | register, thus disabling hit-under-miss without putting the | ||
1283 | processor into full low interrupt latency mode. ARM11MPCore | ||
1284 | is not affected. | ||
1285 | |||
1274 | endmenu | 1286 | endmenu |
1275 | 1287 | ||
1276 | source "arch/arm/common/Kconfig" | 1288 | source "arch/arm/common/Kconfig" |