diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2013-11-19 14:44:15 -0500 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2013-11-19 14:44:15 -0500 |
commit | dec8e46178bad9f1717a948572d76e0f804be801 (patch) | |
tree | d0feaa9474f4406cb220cccdb7d39a3d031f00a6 /arch/arc | |
parent | 806dace637e4d37a5569c3e2345adcbd473b3d12 (diff) | |
parent | cd5dfd0e1685530cb3159dec2d2a95421104093d (diff) |
Merge tag 'arc-v3.13-rc1-part2' of git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc
Pull second set of ARC changes from Vineet Gupta:
- Support for Perf from Mischa
- Enabling GPIO/Pinctrl drivers for Abilis TB10x platform
- New defconfig for buildroot
* tag 'arc-v3.13-rc1-part2' of git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc:
ARC: [plat-arcfpga] Add defconfig without initramfs location
ARC: perf: ARC 700 PMU doesn't support sampling events
ARC: Add documentation on DT binding for ARC700 PMU
ARC: Add perf support for ARC700 cores
ARC: [TB10x] Updates for GPIO and pinctrl
Diffstat (limited to 'arch/arc')
-rw-r--r-- | arch/arc/boot/dts/abilis_tb100.dtsi | 172 | ||||
-rw-r--r-- | arch/arc/boot/dts/abilis_tb100_dvk.dts | 24 | ||||
-rw-r--r-- | arch/arc/boot/dts/abilis_tb101.dtsi | 178 | ||||
-rw-r--r-- | arch/arc/boot/dts/abilis_tb101_dvk.dts | 24 | ||||
-rw-r--r-- | arch/arc/boot/dts/abilis_tb10x.dtsi | 3 | ||||
-rw-r--r-- | arch/arc/boot/dts/angel4.dts | 4 | ||||
-rw-r--r-- | arch/arc/configs/fpga_noramfs_defconfig | 64 | ||||
-rw-r--r-- | arch/arc/include/asm/perf_event.h | 204 | ||||
-rw-r--r-- | arch/arc/kernel/Makefile | 1 | ||||
-rw-r--r-- | arch/arc/kernel/perf_event.c | 326 | ||||
-rw-r--r-- | arch/arc/plat-tb10x/Kconfig | 2 |
11 files changed, 814 insertions, 188 deletions
diff --git a/arch/arc/boot/dts/abilis_tb100.dtsi b/arch/arc/boot/dts/abilis_tb100.dtsi index d9f8249aa66e..3942634f805a 100644 --- a/arch/arc/boot/dts/abilis_tb100.dtsi +++ b/arch/arc/boot/dts/abilis_tb100.dtsi | |||
@@ -43,124 +43,124 @@ | |||
43 | iomux: iomux@FF10601c { | 43 | iomux: iomux@FF10601c { |
44 | /* Port 1 */ | 44 | /* Port 1 */ |
45 | pctl_tsin_s0: pctl-tsin-s0 { /* Serial TS-in 0 */ | 45 | pctl_tsin_s0: pctl-tsin-s0 { /* Serial TS-in 0 */ |
46 | pingrp = "mis0_pins"; | 46 | abilis,function = "mis0"; |
47 | }; | 47 | }; |
48 | pctl_tsin_s1: pctl-tsin-s1 { /* Serial TS-in 1 */ | 48 | pctl_tsin_s1: pctl-tsin-s1 { /* Serial TS-in 1 */ |
49 | pingrp = "mis1_pins"; | 49 | abilis,function = "mis1"; |
50 | }; | 50 | }; |
51 | pctl_gpio_a: pctl-gpio-a { /* GPIO bank A */ | 51 | pctl_gpio_a: pctl-gpio-a { /* GPIO bank A */ |
52 | pingrp = "gpioa_pins"; | 52 | abilis,function = "gpioa"; |
53 | }; | 53 | }; |
54 | pctl_tsin_p1: pctl-tsin-p1 { /* Parallel TS-in 1 */ | 54 | pctl_tsin_p1: pctl-tsin-p1 { /* Parallel TS-in 1 */ |
55 | pingrp = "mip1_pins"; | 55 | abilis,function = "mip1"; |
56 | }; | 56 | }; |
57 | /* Port 2 */ | 57 | /* Port 2 */ |
58 | pctl_tsin_s2: pctl-tsin-s2 { /* Serial TS-in 2 */ | 58 | pctl_tsin_s2: pctl-tsin-s2 { /* Serial TS-in 2 */ |
59 | pingrp = "mis2_pins"; | 59 | abilis,function = "mis2"; |
60 | }; | 60 | }; |
61 | pctl_tsin_s3: pctl-tsin-s3 { /* Serial TS-in 3 */ | 61 | pctl_tsin_s3: pctl-tsin-s3 { /* Serial TS-in 3 */ |
62 | pingrp = "mis3_pins"; | 62 | abilis,function = "mis3"; |
63 | }; | 63 | }; |
64 | pctl_gpio_c: pctl-gpio-c { /* GPIO bank C */ | 64 | pctl_gpio_c: pctl-gpio-c { /* GPIO bank C */ |
65 | pingrp = "gpioc_pins"; | 65 | abilis,function = "gpioc"; |
66 | }; | 66 | }; |
67 | pctl_tsin_p3: pctl-tsin-p3 { /* Parallel TS-in 3 */ | 67 | pctl_tsin_p3: pctl-tsin-p3 { /* Parallel TS-in 3 */ |
68 | pingrp = "mip3_pins"; | 68 | abilis,function = "mip3"; |
69 | }; | 69 | }; |
70 | /* Port 3 */ | 70 | /* Port 3 */ |
71 | pctl_tsin_s4: pctl-tsin-s4 { /* Serial TS-in 4 */ | 71 | pctl_tsin_s4: pctl-tsin-s4 { /* Serial TS-in 4 */ |
72 | pingrp = "mis4_pins"; | 72 | abilis,function = "mis4"; |
73 | }; | 73 | }; |
74 | pctl_tsin_s5: pctl-tsin-s5 { /* Serial TS-in 5 */ | 74 | pctl_tsin_s5: pctl-tsin-s5 { /* Serial TS-in 5 */ |
75 | pingrp = "mis5_pins"; | 75 | abilis,function = "mis5"; |
76 | }; | 76 | }; |
77 | pctl_gpio_e: pctl-gpio-e { /* GPIO bank E */ | 77 | pctl_gpio_e: pctl-gpio-e { /* GPIO bank E */ |
78 | pingrp = "gpioe_pins"; | 78 | abilis,function = "gpioe"; |
79 | }; | 79 | }; |
80 | pctl_tsin_p5: pctl-tsin-p5 { /* Parallel TS-in 5 */ | 80 | pctl_tsin_p5: pctl-tsin-p5 { /* Parallel TS-in 5 */ |
81 | pingrp = "mip5_pins"; | 81 | abilis,function = "mip5"; |
82 | }; | 82 | }; |
83 | /* Port 4 */ | 83 | /* Port 4 */ |
84 | pctl_tsin_s6: pctl-tsin-s6 { /* Serial TS-in 6 */ | 84 | pctl_tsin_s6: pctl-tsin-s6 { /* Serial TS-in 6 */ |
85 | pingrp = "mis6_pins"; | 85 | abilis,function = "mis6"; |
86 | }; | 86 | }; |
87 | pctl_tsin_s7: pctl-tsin-s7 { /* Serial TS-in 7 */ | 87 | pctl_tsin_s7: pctl-tsin-s7 { /* Serial TS-in 7 */ |
88 | pingrp = "mis7_pins"; | 88 | abilis,function = "mis7"; |
89 | }; | 89 | }; |
90 | pctl_gpio_g: pctl-gpio-g { /* GPIO bank G */ | 90 | pctl_gpio_g: pctl-gpio-g { /* GPIO bank G */ |
91 | pingrp = "gpiog_pins"; | 91 | abilis,function = "gpiog"; |
92 | }; | 92 | }; |
93 | pctl_tsin_p7: pctl-tsin-p7 { /* Parallel TS-in 7 */ | 93 | pctl_tsin_p7: pctl-tsin-p7 { /* Parallel TS-in 7 */ |
94 | pingrp = "mip7_pins"; | 94 | abilis,function = "mip7"; |
95 | }; | 95 | }; |
96 | /* Port 5 */ | 96 | /* Port 5 */ |
97 | pctl_gpio_j: pctl-gpio-j { /* GPIO bank J */ | 97 | pctl_gpio_j: pctl-gpio-j { /* GPIO bank J */ |
98 | pingrp = "gpioj_pins"; | 98 | abilis,function = "gpioj"; |
99 | }; | 99 | }; |
100 | pctl_gpio_k: pctl-gpio-k { /* GPIO bank K */ | 100 | pctl_gpio_k: pctl-gpio-k { /* GPIO bank K */ |
101 | pingrp = "gpiok_pins"; | 101 | abilis,function = "gpiok"; |
102 | }; | 102 | }; |
103 | pctl_ciplus: pctl-ciplus { /* CI+ interface */ | 103 | pctl_ciplus: pctl-ciplus { /* CI+ interface */ |
104 | pingrp = "ciplus_pins"; | 104 | abilis,function = "ciplus"; |
105 | }; | 105 | }; |
106 | pctl_mcard: pctl-mcard { /* M-Card interface */ | 106 | pctl_mcard: pctl-mcard { /* M-Card interface */ |
107 | pingrp = "mcard_pins"; | 107 | abilis,function = "mcard"; |
108 | }; | 108 | }; |
109 | /* Port 6 */ | 109 | /* Port 6 */ |
110 | pctl_tsout_p: pctl-tsout-p { /* Parallel TS-out */ | 110 | pctl_tsout_p: pctl-tsout-p { /* Parallel TS-out */ |
111 | pingrp = "mop_pins"; | 111 | abilis,function = "mop"; |
112 | }; | 112 | }; |
113 | pctl_tsout_s0: pctl-tsout-s0 { /* Serial TS-out 0 */ | 113 | pctl_tsout_s0: pctl-tsout-s0 { /* Serial TS-out 0 */ |
114 | pingrp = "mos0_pins"; | 114 | abilis,function = "mos0"; |
115 | }; | 115 | }; |
116 | pctl_tsout_s1: pctl-tsout-s1 { /* Serial TS-out 1 */ | 116 | pctl_tsout_s1: pctl-tsout-s1 { /* Serial TS-out 1 */ |
117 | pingrp = "mos1_pins"; | 117 | abilis,function = "mos1"; |
118 | }; | 118 | }; |
119 | pctl_tsout_s2: pctl-tsout-s2 { /* Serial TS-out 2 */ | 119 | pctl_tsout_s2: pctl-tsout-s2 { /* Serial TS-out 2 */ |
120 | pingrp = "mos2_pins"; | 120 | abilis,function = "mos2"; |
121 | }; | 121 | }; |
122 | pctl_tsout_s3: pctl-tsout-s3 { /* Serial TS-out 3 */ | 122 | pctl_tsout_s3: pctl-tsout-s3 { /* Serial TS-out 3 */ |
123 | pingrp = "mos3_pins"; | 123 | abilis,function = "mos3"; |
124 | }; | 124 | }; |
125 | /* Port 7 */ | 125 | /* Port 7 */ |
126 | pctl_uart0: pctl-uart0 { /* UART 0 */ | 126 | pctl_uart0: pctl-uart0 { /* UART 0 */ |
127 | pingrp = "uart0_pins"; | 127 | abilis,function = "uart0"; |
128 | }; | 128 | }; |
129 | pctl_uart1: pctl-uart1 { /* UART 1 */ | 129 | pctl_uart1: pctl-uart1 { /* UART 1 */ |
130 | pingrp = "uart1_pins"; | 130 | abilis,function = "uart1"; |
131 | }; | 131 | }; |
132 | pctl_gpio_l: pctl-gpio-l { /* GPIO bank L */ | 132 | pctl_gpio_l: pctl-gpio-l { /* GPIO bank L */ |
133 | pingrp = "gpiol_pins"; | 133 | abilis,function = "gpiol"; |
134 | }; | 134 | }; |
135 | pctl_gpio_m: pctl-gpio-m { /* GPIO bank M */ | 135 | pctl_gpio_m: pctl-gpio-m { /* GPIO bank M */ |
136 | pingrp = "gpiom_pins"; | 136 | abilis,function = "gpiom"; |
137 | }; | 137 | }; |
138 | /* Port 8 */ | 138 | /* Port 8 */ |
139 | pctl_spi3: pctl-spi3 { | 139 | pctl_spi3: pctl-spi3 { |
140 | pingrp = "spi3_pins"; | 140 | abilis,function = "spi3"; |
141 | }; | 141 | }; |
142 | /* Port 9 */ | 142 | /* Port 9 */ |
143 | pctl_spi1: pctl-spi1 { | 143 | pctl_spi1: pctl-spi1 { |
144 | pingrp = "spi1_pins"; | 144 | abilis,function = "spi1"; |
145 | }; | 145 | }; |
146 | pctl_gpio_n: pctl-gpio-n { | 146 | pctl_gpio_n: pctl-gpio-n { |
147 | pingrp = "gpion_pins"; | 147 | abilis,function = "gpion"; |
148 | }; | 148 | }; |
149 | /* Unmuxed GPIOs */ | 149 | /* Unmuxed GPIOs */ |
150 | pctl_gpio_b: pctl-gpio-b { | 150 | pctl_gpio_b: pctl-gpio-b { |
151 | pingrp = "gpiob_pins"; | 151 | abilis,function = "gpiob"; |
152 | }; | 152 | }; |
153 | pctl_gpio_d: pctl-gpio-d { | 153 | pctl_gpio_d: pctl-gpio-d { |
154 | pingrp = "gpiod_pins"; | 154 | abilis,function = "gpiod"; |
155 | }; | 155 | }; |
156 | pctl_gpio_f: pctl-gpio-f { | 156 | pctl_gpio_f: pctl-gpio-f { |
157 | pingrp = "gpiof_pins"; | 157 | abilis,function = "gpiof"; |
158 | }; | 158 | }; |
159 | pctl_gpio_h: pctl-gpio-h { | 159 | pctl_gpio_h: pctl-gpio-h { |
160 | pingrp = "gpioh_pins"; | 160 | abilis,function = "gpioh"; |
161 | }; | 161 | }; |
162 | pctl_gpio_i: pctl-gpio-i { | 162 | pctl_gpio_i: pctl-gpio-i { |
163 | pingrp = "gpioi_pins"; | 163 | abilis,function = "gpioi"; |
164 | }; | 164 | }; |
165 | }; | 165 | }; |
166 | 166 | ||
@@ -172,9 +172,10 @@ | |||
172 | interrupts = <27 2>; | 172 | interrupts = <27 2>; |
173 | reg = <0xFF140000 0x1000>; | 173 | reg = <0xFF140000 0x1000>; |
174 | gpio-controller; | 174 | gpio-controller; |
175 | #gpio-cells = <1>; | 175 | #gpio-cells = <2>; |
176 | gpio-base = <0>; | 176 | abilis,ngpio = <3>; |
177 | gpio-pins = <&pctl_gpio_a>; | 177 | gpio-ranges = <&iomux 0 0 0>; |
178 | gpio-ranges-group-names = "gpioa"; | ||
178 | }; | 179 | }; |
179 | gpiob: gpio@FF141000 { | 180 | gpiob: gpio@FF141000 { |
180 | compatible = "abilis,tb10x-gpio"; | 181 | compatible = "abilis,tb10x-gpio"; |
@@ -184,9 +185,10 @@ | |||
184 | interrupts = <27 2>; | 185 | interrupts = <27 2>; |
185 | reg = <0xFF141000 0x1000>; | 186 | reg = <0xFF141000 0x1000>; |
186 | gpio-controller; | 187 | gpio-controller; |
187 | #gpio-cells = <1>; | 188 | #gpio-cells = <2>; |
188 | gpio-base = <3>; | 189 | abilis,ngpio = <2>; |
189 | gpio-pins = <&pctl_gpio_b>; | 190 | gpio-ranges = <&iomux 0 0 0>; |
191 | gpio-ranges-group-names = "gpiob"; | ||
190 | }; | 192 | }; |
191 | gpioc: gpio@FF142000 { | 193 | gpioc: gpio@FF142000 { |
192 | compatible = "abilis,tb10x-gpio"; | 194 | compatible = "abilis,tb10x-gpio"; |
@@ -196,9 +198,10 @@ | |||
196 | interrupts = <27 2>; | 198 | interrupts = <27 2>; |
197 | reg = <0xFF142000 0x1000>; | 199 | reg = <0xFF142000 0x1000>; |
198 | gpio-controller; | 200 | gpio-controller; |
199 | #gpio-cells = <1>; | 201 | #gpio-cells = <2>; |
200 | gpio-base = <5>; | 202 | abilis,ngpio = <3>; |
201 | gpio-pins = <&pctl_gpio_c>; | 203 | gpio-ranges = <&iomux 0 0 0>; |
204 | gpio-ranges-group-names = "gpioc"; | ||
202 | }; | 205 | }; |
203 | gpiod: gpio@FF143000 { | 206 | gpiod: gpio@FF143000 { |
204 | compatible = "abilis,tb10x-gpio"; | 207 | compatible = "abilis,tb10x-gpio"; |
@@ -208,9 +211,10 @@ | |||
208 | interrupts = <27 2>; | 211 | interrupts = <27 2>; |
209 | reg = <0xFF143000 0x1000>; | 212 | reg = <0xFF143000 0x1000>; |
210 | gpio-controller; | 213 | gpio-controller; |
211 | #gpio-cells = <1>; | 214 | #gpio-cells = <2>; |
212 | gpio-base = <8>; | 215 | abilis,ngpio = <2>; |
213 | gpio-pins = <&pctl_gpio_d>; | 216 | gpio-ranges = <&iomux 0 0 0>; |
217 | gpio-ranges-group-names = "gpiod"; | ||
214 | }; | 218 | }; |
215 | gpioe: gpio@FF144000 { | 219 | gpioe: gpio@FF144000 { |
216 | compatible = "abilis,tb10x-gpio"; | 220 | compatible = "abilis,tb10x-gpio"; |
@@ -220,9 +224,10 @@ | |||
220 | interrupts = <27 2>; | 224 | interrupts = <27 2>; |
221 | reg = <0xFF144000 0x1000>; | 225 | reg = <0xFF144000 0x1000>; |
222 | gpio-controller; | 226 | gpio-controller; |
223 | #gpio-cells = <1>; | 227 | #gpio-cells = <2>; |
224 | gpio-base = <10>; | 228 | abilis,ngpio = <3>; |
225 | gpio-pins = <&pctl_gpio_e>; | 229 | gpio-ranges = <&iomux 0 0 0>; |
230 | gpio-ranges-group-names = "gpioe"; | ||
226 | }; | 231 | }; |
227 | gpiof: gpio@FF145000 { | 232 | gpiof: gpio@FF145000 { |
228 | compatible = "abilis,tb10x-gpio"; | 233 | compatible = "abilis,tb10x-gpio"; |
@@ -232,9 +237,10 @@ | |||
232 | interrupts = <27 2>; | 237 | interrupts = <27 2>; |
233 | reg = <0xFF145000 0x1000>; | 238 | reg = <0xFF145000 0x1000>; |
234 | gpio-controller; | 239 | gpio-controller; |
235 | #gpio-cells = <1>; | 240 | #gpio-cells = <2>; |
236 | gpio-base = <13>; | 241 | abilis,ngpio = <2>; |
237 | gpio-pins = <&pctl_gpio_f>; | 242 | gpio-ranges = <&iomux 0 0 0>; |
243 | gpio-ranges-group-names = "gpiof"; | ||
238 | }; | 244 | }; |
239 | gpiog: gpio@FF146000 { | 245 | gpiog: gpio@FF146000 { |
240 | compatible = "abilis,tb10x-gpio"; | 246 | compatible = "abilis,tb10x-gpio"; |
@@ -244,9 +250,10 @@ | |||
244 | interrupts = <27 2>; | 250 | interrupts = <27 2>; |
245 | reg = <0xFF146000 0x1000>; | 251 | reg = <0xFF146000 0x1000>; |
246 | gpio-controller; | 252 | gpio-controller; |
247 | #gpio-cells = <1>; | 253 | #gpio-cells = <2>; |
248 | gpio-base = <15>; | 254 | abilis,ngpio = <3>; |
249 | gpio-pins = <&pctl_gpio_g>; | 255 | gpio-ranges = <&iomux 0 0 0>; |
256 | gpio-ranges-group-names = "gpiog"; | ||
250 | }; | 257 | }; |
251 | gpioh: gpio@FF147000 { | 258 | gpioh: gpio@FF147000 { |
252 | compatible = "abilis,tb10x-gpio"; | 259 | compatible = "abilis,tb10x-gpio"; |
@@ -256,9 +263,10 @@ | |||
256 | interrupts = <27 2>; | 263 | interrupts = <27 2>; |
257 | reg = <0xFF147000 0x1000>; | 264 | reg = <0xFF147000 0x1000>; |
258 | gpio-controller; | 265 | gpio-controller; |
259 | #gpio-cells = <1>; | 266 | #gpio-cells = <2>; |
260 | gpio-base = <18>; | 267 | abilis,ngpio = <2>; |
261 | gpio-pins = <&pctl_gpio_h>; | 268 | gpio-ranges = <&iomux 0 0 0>; |
269 | gpio-ranges-group-names = "gpioh"; | ||
262 | }; | 270 | }; |
263 | gpioi: gpio@FF148000 { | 271 | gpioi: gpio@FF148000 { |
264 | compatible = "abilis,tb10x-gpio"; | 272 | compatible = "abilis,tb10x-gpio"; |
@@ -268,9 +276,10 @@ | |||
268 | interrupts = <27 2>; | 276 | interrupts = <27 2>; |
269 | reg = <0xFF148000 0x1000>; | 277 | reg = <0xFF148000 0x1000>; |
270 | gpio-controller; | 278 | gpio-controller; |
271 | #gpio-cells = <1>; | 279 | #gpio-cells = <2>; |
272 | gpio-base = <20>; | 280 | abilis,ngpio = <12>; |
273 | gpio-pins = <&pctl_gpio_i>; | 281 | gpio-ranges = <&iomux 0 0 0>; |
282 | gpio-ranges-group-names = "gpioi"; | ||
274 | }; | 283 | }; |
275 | gpioj: gpio@FF149000 { | 284 | gpioj: gpio@FF149000 { |
276 | compatible = "abilis,tb10x-gpio"; | 285 | compatible = "abilis,tb10x-gpio"; |
@@ -280,9 +289,10 @@ | |||
280 | interrupts = <27 2>; | 289 | interrupts = <27 2>; |
281 | reg = <0xFF149000 0x1000>; | 290 | reg = <0xFF149000 0x1000>; |
282 | gpio-controller; | 291 | gpio-controller; |
283 | #gpio-cells = <1>; | 292 | #gpio-cells = <2>; |
284 | gpio-base = <32>; | 293 | abilis,ngpio = <32>; |
285 | gpio-pins = <&pctl_gpio_j>; | 294 | gpio-ranges = <&iomux 0 0 0>; |
295 | gpio-ranges-group-names = "gpioj"; | ||
286 | }; | 296 | }; |
287 | gpiok: gpio@FF14a000 { | 297 | gpiok: gpio@FF14a000 { |
288 | compatible = "abilis,tb10x-gpio"; | 298 | compatible = "abilis,tb10x-gpio"; |
@@ -292,9 +302,10 @@ | |||
292 | interrupts = <27 2>; | 302 | interrupts = <27 2>; |
293 | reg = <0xFF14A000 0x1000>; | 303 | reg = <0xFF14A000 0x1000>; |
294 | gpio-controller; | 304 | gpio-controller; |
295 | #gpio-cells = <1>; | 305 | #gpio-cells = <2>; |
296 | gpio-base = <64>; | 306 | abilis,ngpio = <22>; |
297 | gpio-pins = <&pctl_gpio_k>; | 307 | gpio-ranges = <&iomux 0 0 0>; |
308 | gpio-ranges-group-names = "gpiok"; | ||
298 | }; | 309 | }; |
299 | gpiol: gpio@FF14b000 { | 310 | gpiol: gpio@FF14b000 { |
300 | compatible = "abilis,tb10x-gpio"; | 311 | compatible = "abilis,tb10x-gpio"; |
@@ -304,9 +315,10 @@ | |||
304 | interrupts = <27 2>; | 315 | interrupts = <27 2>; |
305 | reg = <0xFF14B000 0x1000>; | 316 | reg = <0xFF14B000 0x1000>; |
306 | gpio-controller; | 317 | gpio-controller; |
307 | #gpio-cells = <1>; | 318 | #gpio-cells = <2>; |
308 | gpio-base = <86>; | 319 | abilis,ngpio = <4>; |
309 | gpio-pins = <&pctl_gpio_l>; | 320 | gpio-ranges = <&iomux 0 0 0>; |
321 | gpio-ranges-group-names = "gpiol"; | ||
310 | }; | 322 | }; |
311 | gpiom: gpio@FF14c000 { | 323 | gpiom: gpio@FF14c000 { |
312 | compatible = "abilis,tb10x-gpio"; | 324 | compatible = "abilis,tb10x-gpio"; |
@@ -316,9 +328,10 @@ | |||
316 | interrupts = <27 2>; | 328 | interrupts = <27 2>; |
317 | reg = <0xFF14C000 0x1000>; | 329 | reg = <0xFF14C000 0x1000>; |
318 | gpio-controller; | 330 | gpio-controller; |
319 | #gpio-cells = <1>; | 331 | #gpio-cells = <2>; |
320 | gpio-base = <90>; | 332 | abilis,ngpio = <4>; |
321 | gpio-pins = <&pctl_gpio_m>; | 333 | gpio-ranges = <&iomux 0 0 0>; |
334 | gpio-ranges-group-names = "gpiom"; | ||
322 | }; | 335 | }; |
323 | gpion: gpio@FF14d000 { | 336 | gpion: gpio@FF14d000 { |
324 | compatible = "abilis,tb10x-gpio"; | 337 | compatible = "abilis,tb10x-gpio"; |
@@ -328,9 +341,10 @@ | |||
328 | interrupts = <27 2>; | 341 | interrupts = <27 2>; |
329 | reg = <0xFF14D000 0x1000>; | 342 | reg = <0xFF14D000 0x1000>; |
330 | gpio-controller; | 343 | gpio-controller; |
331 | #gpio-cells = <1>; | 344 | #gpio-cells = <2>; |
332 | gpio-base = <94>; | 345 | abilis,ngpio = <5>; |
333 | gpio-pins = <&pctl_gpio_n>; | 346 | gpio-ranges = <&iomux 0 0 0>; |
347 | gpio-ranges-group-names = "gpion"; | ||
334 | }; | 348 | }; |
335 | }; | 349 | }; |
336 | }; | 350 | }; |
diff --git a/arch/arc/boot/dts/abilis_tb100_dvk.dts b/arch/arc/boot/dts/abilis_tb100_dvk.dts index ebc313a9f5b2..3dd6ed941464 100644 --- a/arch/arc/boot/dts/abilis_tb100_dvk.dts +++ b/arch/arc/boot/dts/abilis_tb100_dvk.dts | |||
@@ -64,62 +64,62 @@ | |||
64 | compatible = "gpio-leds"; | 64 | compatible = "gpio-leds"; |
65 | power { | 65 | power { |
66 | label = "Power"; | 66 | label = "Power"; |
67 | gpios = <&gpioi 0>; | 67 | gpios = <&gpioi 0 0>; |
68 | linux,default-trigger = "default-on"; | 68 | linux,default-trigger = "default-on"; |
69 | }; | 69 | }; |
70 | heartbeat { | 70 | heartbeat { |
71 | label = "Heartbeat"; | 71 | label = "Heartbeat"; |
72 | gpios = <&gpioi 1>; | 72 | gpios = <&gpioi 1 0>; |
73 | linux,default-trigger = "heartbeat"; | 73 | linux,default-trigger = "heartbeat"; |
74 | }; | 74 | }; |
75 | led2 { | 75 | led2 { |
76 | label = "LED2"; | 76 | label = "LED2"; |
77 | gpios = <&gpioi 2>; | 77 | gpios = <&gpioi 2 0>; |
78 | default-state = "off"; | 78 | default-state = "off"; |
79 | }; | 79 | }; |
80 | led3 { | 80 | led3 { |
81 | label = "LED3"; | 81 | label = "LED3"; |
82 | gpios = <&gpioi 3>; | 82 | gpios = <&gpioi 3 0>; |
83 | default-state = "off"; | 83 | default-state = "off"; |
84 | }; | 84 | }; |
85 | led4 { | 85 | led4 { |
86 | label = "LED4"; | 86 | label = "LED4"; |
87 | gpios = <&gpioi 4>; | 87 | gpios = <&gpioi 4 0>; |
88 | default-state = "off"; | 88 | default-state = "off"; |
89 | }; | 89 | }; |
90 | led5 { | 90 | led5 { |
91 | label = "LED5"; | 91 | label = "LED5"; |
92 | gpios = <&gpioi 5>; | 92 | gpios = <&gpioi 5 0>; |
93 | default-state = "off"; | 93 | default-state = "off"; |
94 | }; | 94 | }; |
95 | led6 { | 95 | led6 { |
96 | label = "LED6"; | 96 | label = "LED6"; |
97 | gpios = <&gpioi 6>; | 97 | gpios = <&gpioi 6 0>; |
98 | default-state = "off"; | 98 | default-state = "off"; |
99 | }; | 99 | }; |
100 | led7 { | 100 | led7 { |
101 | label = "LED7"; | 101 | label = "LED7"; |
102 | gpios = <&gpioi 7>; | 102 | gpios = <&gpioi 7 0>; |
103 | default-state = "off"; | 103 | default-state = "off"; |
104 | }; | 104 | }; |
105 | led8 { | 105 | led8 { |
106 | label = "LED8"; | 106 | label = "LED8"; |
107 | gpios = <&gpioi 8>; | 107 | gpios = <&gpioi 8 0>; |
108 | default-state = "off"; | 108 | default-state = "off"; |
109 | }; | 109 | }; |
110 | led9 { | 110 | led9 { |
111 | label = "LED9"; | 111 | label = "LED9"; |
112 | gpios = <&gpioi 9>; | 112 | gpios = <&gpioi 9 0>; |
113 | default-state = "off"; | 113 | default-state = "off"; |
114 | }; | 114 | }; |
115 | led10 { | 115 | led10 { |
116 | label = "LED10"; | 116 | label = "LED10"; |
117 | gpios = <&gpioi 10>; | 117 | gpios = <&gpioi 10 0>; |
118 | default-state = "off"; | 118 | default-state = "off"; |
119 | }; | 119 | }; |
120 | led11 { | 120 | led11 { |
121 | label = "LED11"; | 121 | label = "LED11"; |
122 | gpios = <&gpioi 11>; | 122 | gpios = <&gpioi 11 0>; |
123 | default-state = "off"; | 123 | default-state = "off"; |
124 | }; | 124 | }; |
125 | }; | 125 | }; |
diff --git a/arch/arc/boot/dts/abilis_tb101.dtsi b/arch/arc/boot/dts/abilis_tb101.dtsi index da8ca7941e67..b0467229a5c4 100644 --- a/arch/arc/boot/dts/abilis_tb101.dtsi +++ b/arch/arc/boot/dts/abilis_tb101.dtsi | |||
@@ -43,133 +43,133 @@ | |||
43 | iomux: iomux@FF10601c { | 43 | iomux: iomux@FF10601c { |
44 | /* Port 1 */ | 44 | /* Port 1 */ |
45 | pctl_tsin_s0: pctl-tsin-s0 { /* Serial TS-in 0 */ | 45 | pctl_tsin_s0: pctl-tsin-s0 { /* Serial TS-in 0 */ |
46 | pingrp = "mis0_pins"; | 46 | abilis,function = "mis0"; |
47 | }; | 47 | }; |
48 | pctl_tsin_s1: pctl-tsin-s1 { /* Serial TS-in 1 */ | 48 | pctl_tsin_s1: pctl-tsin-s1 { /* Serial TS-in 1 */ |
49 | pingrp = "mis1_pins"; | 49 | abilis,function = "mis1"; |
50 | }; | 50 | }; |
51 | pctl_gpio_a: pctl-gpio-a { /* GPIO bank A */ | 51 | pctl_gpio_a: pctl-gpio-a { /* GPIO bank A */ |
52 | pingrp = "gpioa_pins"; | 52 | abilis,function = "gpioa"; |
53 | }; | 53 | }; |
54 | pctl_tsin_p1: pctl-tsin-p1 { /* Parallel TS-in 1 */ | 54 | pctl_tsin_p1: pctl-tsin-p1 { /* Parallel TS-in 1 */ |
55 | pingrp = "mip1_pins"; | 55 | abilis,function = "mip1"; |
56 | }; | 56 | }; |
57 | /* Port 2 */ | 57 | /* Port 2 */ |
58 | pctl_tsin_s2: pctl-tsin-s2 { /* Serial TS-in 2 */ | 58 | pctl_tsin_s2: pctl-tsin-s2 { /* Serial TS-in 2 */ |
59 | pingrp = "mis2_pins"; | 59 | abilis,function = "mis2"; |
60 | }; | 60 | }; |
61 | pctl_tsin_s3: pctl-tsin-s3 { /* Serial TS-in 3 */ | 61 | pctl_tsin_s3: pctl-tsin-s3 { /* Serial TS-in 3 */ |
62 | pingrp = "mis3_pins"; | 62 | abilis,function = "mis3"; |
63 | }; | 63 | }; |
64 | pctl_gpio_c: pctl-gpio-c { /* GPIO bank C */ | 64 | pctl_gpio_c: pctl-gpio-c { /* GPIO bank C */ |
65 | pingrp = "gpioc_pins"; | 65 | abilis,function = "gpioc"; |
66 | }; | 66 | }; |
67 | pctl_tsin_p3: pctl-tsin-p3 { /* Parallel TS-in 3 */ | 67 | pctl_tsin_p3: pctl-tsin-p3 { /* Parallel TS-in 3 */ |
68 | pingrp = "mip3_pins"; | 68 | abilis,function = "mip3"; |
69 | }; | 69 | }; |
70 | /* Port 3 */ | 70 | /* Port 3 */ |
71 | pctl_tsin_s4: pctl-tsin-s4 { /* Serial TS-in 4 */ | 71 | pctl_tsin_s4: pctl-tsin-s4 { /* Serial TS-in 4 */ |
72 | pingrp = "mis4_pins"; | 72 | abilis,function = "mis4"; |
73 | }; | 73 | }; |
74 | pctl_tsin_s5: pctl-tsin-s5 { /* Serial TS-in 5 */ | 74 | pctl_tsin_s5: pctl-tsin-s5 { /* Serial TS-in 5 */ |
75 | pingrp = "mis5_pins"; | 75 | abilis,function = "mis5"; |
76 | }; | 76 | }; |
77 | pctl_gpio_e: pctl-gpio-e { /* GPIO bank E */ | 77 | pctl_gpio_e: pctl-gpio-e { /* GPIO bank E */ |
78 | pingrp = "gpioe_pins"; | 78 | abilis,function = "gpioe"; |
79 | }; | 79 | }; |
80 | pctl_tsin_p5: pctl-tsin-p5 { /* Parallel TS-in 5 */ | 80 | pctl_tsin_p5: pctl-tsin-p5 { /* Parallel TS-in 5 */ |
81 | pingrp = "mip5_pins"; | 81 | abilis,function = "mip5"; |
82 | }; | 82 | }; |
83 | /* Port 4 */ | 83 | /* Port 4 */ |
84 | pctl_tsin_s6: pctl-tsin-s6 { /* Serial TS-in 6 */ | 84 | pctl_tsin_s6: pctl-tsin-s6 { /* Serial TS-in 6 */ |
85 | pingrp = "mis6_pins"; | 85 | abilis,function = "mis6"; |
86 | }; | 86 | }; |
87 | pctl_tsin_s7: pctl-tsin-s7 { /* Serial TS-in 7 */ | 87 | pctl_tsin_s7: pctl-tsin-s7 { /* Serial TS-in 7 */ |
88 | pingrp = "mis7_pins"; | 88 | abilis,function = "mis7"; |
89 | }; | 89 | }; |
90 | pctl_gpio_g: pctl-gpio-g { /* GPIO bank G */ | 90 | pctl_gpio_g: pctl-gpio-g { /* GPIO bank G */ |
91 | pingrp = "gpiog_pins"; | 91 | abilis,function = "gpiog"; |
92 | }; | 92 | }; |
93 | pctl_tsin_p7: pctl-tsin-p7 { /* Parallel TS-in 7 */ | 93 | pctl_tsin_p7: pctl-tsin-p7 { /* Parallel TS-in 7 */ |
94 | pingrp = "mip7_pins"; | 94 | abilis,function = "mip7"; |
95 | }; | 95 | }; |
96 | /* Port 5 */ | 96 | /* Port 5 */ |
97 | pctl_gpio_j: pctl-gpio-j { /* GPIO bank J */ | 97 | pctl_gpio_j: pctl-gpio-j { /* GPIO bank J */ |
98 | pingrp = "gpioj_pins"; | 98 | abilis,function = "gpioj"; |
99 | }; | 99 | }; |
100 | pctl_gpio_k: pctl-gpio-k { /* GPIO bank K */ | 100 | pctl_gpio_k: pctl-gpio-k { /* GPIO bank K */ |
101 | pingrp = "gpiok_pins"; | 101 | abilis,function = "gpiok"; |
102 | }; | 102 | }; |
103 | pctl_ciplus: pctl-ciplus { /* CI+ interface */ | 103 | pctl_ciplus: pctl-ciplus { /* CI+ interface */ |
104 | pingrp = "ciplus_pins"; | 104 | abilis,function = "ciplus"; |
105 | }; | 105 | }; |
106 | pctl_mcard: pctl-mcard { /* M-Card interface */ | 106 | pctl_mcard: pctl-mcard { /* M-Card interface */ |
107 | pingrp = "mcard_pins"; | 107 | abilis,function = "mcard"; |
108 | }; | 108 | }; |
109 | pctl_stc0: pctl-stc0 { /* Smart card I/F 0 */ | 109 | pctl_stc0: pctl-stc0 { /* Smart card I/F 0 */ |
110 | pingrp = "stc0_pins"; | 110 | abilis,function = "stc0"; |
111 | }; | 111 | }; |
112 | pctl_stc1: pctl-stc1 { /* Smart card I/F 1 */ | 112 | pctl_stc1: pctl-stc1 { /* Smart card I/F 1 */ |
113 | pingrp = "stc1_pins"; | 113 | abilis,function = "stc1"; |
114 | }; | 114 | }; |
115 | /* Port 6 */ | 115 | /* Port 6 */ |
116 | pctl_tsout_p: pctl-tsout-p { /* Parallel TS-out */ | 116 | pctl_tsout_p: pctl-tsout-p { /* Parallel TS-out */ |
117 | pingrp = "mop_pins"; | 117 | abilis,function = "mop"; |
118 | }; | 118 | }; |
119 | pctl_tsout_s0: pctl-tsout-s0 { /* Serial TS-out 0 */ | 119 | pctl_tsout_s0: pctl-tsout-s0 { /* Serial TS-out 0 */ |
120 | pingrp = "mos0_pins"; | 120 | abilis,function = "mos0"; |
121 | }; | 121 | }; |
122 | pctl_tsout_s1: pctl-tsout-s1 { /* Serial TS-out 1 */ | 122 | pctl_tsout_s1: pctl-tsout-s1 { /* Serial TS-out 1 */ |
123 | pingrp = "mos1_pins"; | 123 | abilis,function = "mos1"; |
124 | }; | 124 | }; |
125 | pctl_tsout_s2: pctl-tsout-s2 { /* Serial TS-out 2 */ | 125 | pctl_tsout_s2: pctl-tsout-s2 { /* Serial TS-out 2 */ |
126 | pingrp = "mos2_pins"; | 126 | abilis,function = "mos2"; |
127 | }; | 127 | }; |
128 | pctl_tsout_s3: pctl-tsout-s3 { /* Serial TS-out 3 */ | 128 | pctl_tsout_s3: pctl-tsout-s3 { /* Serial TS-out 3 */ |
129 | pingrp = "mos3_pins"; | 129 | abilis,function = "mos3"; |
130 | }; | 130 | }; |
131 | /* Port 7 */ | 131 | /* Port 7 */ |
132 | pctl_uart0: pctl-uart0 { /* UART 0 */ | 132 | pctl_uart0: pctl-uart0 { /* UART 0 */ |
133 | pingrp = "uart0_pins"; | 133 | abilis,function = "uart0"; |
134 | }; | 134 | }; |
135 | pctl_uart1: pctl-uart1 { /* UART 1 */ | 135 | pctl_uart1: pctl-uart1 { /* UART 1 */ |
136 | pingrp = "uart1_pins"; | 136 | abilis,function = "uart1"; |
137 | }; | 137 | }; |
138 | pctl_gpio_l: pctl-gpio-l { /* GPIO bank L */ | 138 | pctl_gpio_l: pctl-gpio-l { /* GPIO bank L */ |
139 | pingrp = "gpiol_pins"; | 139 | abilis,function = "gpiol"; |
140 | }; | 140 | }; |
141 | pctl_gpio_m: pctl-gpio-m { /* GPIO bank M */ | 141 | pctl_gpio_m: pctl-gpio-m { /* GPIO bank M */ |
142 | pingrp = "gpiom_pins"; | 142 | abilis,function = "gpiom"; |
143 | }; | 143 | }; |
144 | /* Port 8 */ | 144 | /* Port 8 */ |
145 | pctl_spi3: pctl-spi3 { | 145 | pctl_spi3: pctl-spi3 { |
146 | pingrp = "spi3_pins"; | 146 | abilis,function = "spi3"; |
147 | }; | 147 | }; |
148 | pctl_jtag: pctl-jtag { | 148 | pctl_jtag: pctl-jtag { |
149 | pingrp = "jtag_pins"; | 149 | abilis,function = "jtag"; |
150 | }; | 150 | }; |
151 | /* Port 9 */ | 151 | /* Port 9 */ |
152 | pctl_spi1: pctl-spi1 { | 152 | pctl_spi1: pctl-spi1 { |
153 | pingrp = "spi1_pins"; | 153 | abilis,function = "spi1"; |
154 | }; | 154 | }; |
155 | pctl_gpio_n: pctl-gpio-n { | 155 | pctl_gpio_n: pctl-gpio-n { |
156 | pingrp = "gpion_pins"; | 156 | abilis,function = "gpion"; |
157 | }; | 157 | }; |
158 | /* Unmuxed GPIOs */ | 158 | /* Unmuxed GPIOs */ |
159 | pctl_gpio_b: pctl-gpio-b { | 159 | pctl_gpio_b: pctl-gpio-b { |
160 | pingrp = "gpiob_pins"; | 160 | abilis,function = "gpiob"; |
161 | }; | 161 | }; |
162 | pctl_gpio_d: pctl-gpio-d { | 162 | pctl_gpio_d: pctl-gpio-d { |
163 | pingrp = "gpiod_pins"; | 163 | abilis,function = "gpiod"; |
164 | }; | 164 | }; |
165 | pctl_gpio_f: pctl-gpio-f { | 165 | pctl_gpio_f: pctl-gpio-f { |
166 | pingrp = "gpiof_pins"; | 166 | abilis,function = "gpiof"; |
167 | }; | 167 | }; |
168 | pctl_gpio_h: pctl-gpio-h { | 168 | pctl_gpio_h: pctl-gpio-h { |
169 | pingrp = "gpioh_pins"; | 169 | abilis,function = "gpioh"; |
170 | }; | 170 | }; |
171 | pctl_gpio_i: pctl-gpio-i { | 171 | pctl_gpio_i: pctl-gpio-i { |
172 | pingrp = "gpioi_pins"; | 172 | abilis,function = "gpioi"; |
173 | }; | 173 | }; |
174 | }; | 174 | }; |
175 | 175 | ||
@@ -181,9 +181,10 @@ | |||
181 | interrupts = <27 2>; | 181 | interrupts = <27 2>; |
182 | reg = <0xFF140000 0x1000>; | 182 | reg = <0xFF140000 0x1000>; |
183 | gpio-controller; | 183 | gpio-controller; |
184 | #gpio-cells = <1>; | 184 | #gpio-cells = <2>; |
185 | gpio-base = <0>; | 185 | abilis,ngpio = <3>; |
186 | gpio-pins = <&pctl_gpio_a>; | 186 | gpio-ranges = <&iomux 0 0 0>; |
187 | gpio-ranges-group-names = "gpioa"; | ||
187 | }; | 188 | }; |
188 | gpiob: gpio@FF141000 { | 189 | gpiob: gpio@FF141000 { |
189 | compatible = "abilis,tb10x-gpio"; | 190 | compatible = "abilis,tb10x-gpio"; |
@@ -193,9 +194,10 @@ | |||
193 | interrupts = <27 2>; | 194 | interrupts = <27 2>; |
194 | reg = <0xFF141000 0x1000>; | 195 | reg = <0xFF141000 0x1000>; |
195 | gpio-controller; | 196 | gpio-controller; |
196 | #gpio-cells = <1>; | 197 | #gpio-cells = <2>; |
197 | gpio-base = <3>; | 198 | abilis,ngpio = <2>; |
198 | gpio-pins = <&pctl_gpio_b>; | 199 | gpio-ranges = <&iomux 0 0 0>; |
200 | gpio-ranges-group-names = "gpiob"; | ||
199 | }; | 201 | }; |
200 | gpioc: gpio@FF142000 { | 202 | gpioc: gpio@FF142000 { |
201 | compatible = "abilis,tb10x-gpio"; | 203 | compatible = "abilis,tb10x-gpio"; |
@@ -205,9 +207,10 @@ | |||
205 | interrupts = <27 2>; | 207 | interrupts = <27 2>; |
206 | reg = <0xFF142000 0x1000>; | 208 | reg = <0xFF142000 0x1000>; |
207 | gpio-controller; | 209 | gpio-controller; |
208 | #gpio-cells = <1>; | 210 | #gpio-cells = <2>; |
209 | gpio-base = <5>; | 211 | abilis,ngpio = <3>; |
210 | gpio-pins = <&pctl_gpio_c>; | 212 | gpio-ranges = <&iomux 0 0 0>; |
213 | gpio-ranges-group-names = "gpioc"; | ||
211 | }; | 214 | }; |
212 | gpiod: gpio@FF143000 { | 215 | gpiod: gpio@FF143000 { |
213 | compatible = "abilis,tb10x-gpio"; | 216 | compatible = "abilis,tb10x-gpio"; |
@@ -217,9 +220,10 @@ | |||
217 | interrupts = <27 2>; | 220 | interrupts = <27 2>; |
218 | reg = <0xFF143000 0x1000>; | 221 | reg = <0xFF143000 0x1000>; |
219 | gpio-controller; | 222 | gpio-controller; |
220 | #gpio-cells = <1>; | 223 | #gpio-cells = <2>; |
221 | gpio-base = <8>; | 224 | abilis,ngpio = <2>; |
222 | gpio-pins = <&pctl_gpio_d>; | 225 | gpio-ranges = <&iomux 0 0 0>; |
226 | gpio-ranges-group-names = "gpiod"; | ||
223 | }; | 227 | }; |
224 | gpioe: gpio@FF144000 { | 228 | gpioe: gpio@FF144000 { |
225 | compatible = "abilis,tb10x-gpio"; | 229 | compatible = "abilis,tb10x-gpio"; |
@@ -229,9 +233,10 @@ | |||
229 | interrupts = <27 2>; | 233 | interrupts = <27 2>; |
230 | reg = <0xFF144000 0x1000>; | 234 | reg = <0xFF144000 0x1000>; |
231 | gpio-controller; | 235 | gpio-controller; |
232 | #gpio-cells = <1>; | 236 | #gpio-cells = <2>; |
233 | gpio-base = <10>; | 237 | abilis,ngpio = <3>; |
234 | gpio-pins = <&pctl_gpio_e>; | 238 | gpio-ranges = <&iomux 0 0 0>; |
239 | gpio-ranges-group-names = "gpioe"; | ||
235 | }; | 240 | }; |
236 | gpiof: gpio@FF145000 { | 241 | gpiof: gpio@FF145000 { |
237 | compatible = "abilis,tb10x-gpio"; | 242 | compatible = "abilis,tb10x-gpio"; |
@@ -241,9 +246,10 @@ | |||
241 | interrupts = <27 2>; | 246 | interrupts = <27 2>; |
242 | reg = <0xFF145000 0x1000>; | 247 | reg = <0xFF145000 0x1000>; |
243 | gpio-controller; | 248 | gpio-controller; |
244 | #gpio-cells = <1>; | 249 | #gpio-cells = <2>; |
245 | gpio-base = <13>; | 250 | abilis,ngpio = <2>; |
246 | gpio-pins = <&pctl_gpio_f>; | 251 | gpio-ranges = <&iomux 0 0 0>; |
252 | gpio-ranges-group-names = "gpiof"; | ||
247 | }; | 253 | }; |
248 | gpiog: gpio@FF146000 { | 254 | gpiog: gpio@FF146000 { |
249 | compatible = "abilis,tb10x-gpio"; | 255 | compatible = "abilis,tb10x-gpio"; |
@@ -253,9 +259,10 @@ | |||
253 | interrupts = <27 2>; | 259 | interrupts = <27 2>; |
254 | reg = <0xFF146000 0x1000>; | 260 | reg = <0xFF146000 0x1000>; |
255 | gpio-controller; | 261 | gpio-controller; |
256 | #gpio-cells = <1>; | 262 | #gpio-cells = <2>; |
257 | gpio-base = <15>; | 263 | abilis,ngpio = <3>; |
258 | gpio-pins = <&pctl_gpio_g>; | 264 | gpio-ranges = <&iomux 0 0 0>; |
265 | gpio-ranges-group-names = "gpiog"; | ||
259 | }; | 266 | }; |
260 | gpioh: gpio@FF147000 { | 267 | gpioh: gpio@FF147000 { |
261 | compatible = "abilis,tb10x-gpio"; | 268 | compatible = "abilis,tb10x-gpio"; |
@@ -265,9 +272,10 @@ | |||
265 | interrupts = <27 2>; | 272 | interrupts = <27 2>; |
266 | reg = <0xFF147000 0x1000>; | 273 | reg = <0xFF147000 0x1000>; |
267 | gpio-controller; | 274 | gpio-controller; |
268 | #gpio-cells = <1>; | 275 | #gpio-cells = <2>; |
269 | gpio-base = <18>; | 276 | abilis,ngpio = <2>; |
270 | gpio-pins = <&pctl_gpio_h>; | 277 | gpio-ranges = <&iomux 0 0 0>; |
278 | gpio-ranges-group-names = "gpioh"; | ||
271 | }; | 279 | }; |
272 | gpioi: gpio@FF148000 { | 280 | gpioi: gpio@FF148000 { |
273 | compatible = "abilis,tb10x-gpio"; | 281 | compatible = "abilis,tb10x-gpio"; |
@@ -277,9 +285,10 @@ | |||
277 | interrupts = <27 2>; | 285 | interrupts = <27 2>; |
278 | reg = <0xFF148000 0x1000>; | 286 | reg = <0xFF148000 0x1000>; |
279 | gpio-controller; | 287 | gpio-controller; |
280 | #gpio-cells = <1>; | 288 | #gpio-cells = <2>; |
281 | gpio-base = <20>; | 289 | abilis,ngpio = <12>; |
282 | gpio-pins = <&pctl_gpio_i>; | 290 | gpio-ranges = <&iomux 0 0 0>; |
291 | gpio-ranges-group-names = "gpioi"; | ||
283 | }; | 292 | }; |
284 | gpioj: gpio@FF149000 { | 293 | gpioj: gpio@FF149000 { |
285 | compatible = "abilis,tb10x-gpio"; | 294 | compatible = "abilis,tb10x-gpio"; |
@@ -289,9 +298,10 @@ | |||
289 | interrupts = <27 2>; | 298 | interrupts = <27 2>; |
290 | reg = <0xFF149000 0x1000>; | 299 | reg = <0xFF149000 0x1000>; |
291 | gpio-controller; | 300 | gpio-controller; |
292 | #gpio-cells = <1>; | 301 | #gpio-cells = <2>; |
293 | gpio-base = <32>; | 302 | abilis,ngpio = <32>; |
294 | gpio-pins = <&pctl_gpio_j>; | 303 | gpio-ranges = <&iomux 0 0 0>; |
304 | gpio-ranges-group-names = "gpioj"; | ||
295 | }; | 305 | }; |
296 | gpiok: gpio@FF14a000 { | 306 | gpiok: gpio@FF14a000 { |
297 | compatible = "abilis,tb10x-gpio"; | 307 | compatible = "abilis,tb10x-gpio"; |
@@ -301,9 +311,10 @@ | |||
301 | interrupts = <27 2>; | 311 | interrupts = <27 2>; |
302 | reg = <0xFF14A000 0x1000>; | 312 | reg = <0xFF14A000 0x1000>; |
303 | gpio-controller; | 313 | gpio-controller; |
304 | #gpio-cells = <1>; | 314 | #gpio-cells = <2>; |
305 | gpio-base = <64>; | 315 | abilis,ngpio = <22>; |
306 | gpio-pins = <&pctl_gpio_k>; | 316 | gpio-ranges = <&iomux 0 0 0>; |
317 | gpio-ranges-group-names = "gpiok"; | ||
307 | }; | 318 | }; |
308 | gpiol: gpio@FF14b000 { | 319 | gpiol: gpio@FF14b000 { |
309 | compatible = "abilis,tb10x-gpio"; | 320 | compatible = "abilis,tb10x-gpio"; |
@@ -313,9 +324,10 @@ | |||
313 | interrupts = <27 2>; | 324 | interrupts = <27 2>; |
314 | reg = <0xFF14B000 0x1000>; | 325 | reg = <0xFF14B000 0x1000>; |
315 | gpio-controller; | 326 | gpio-controller; |
316 | #gpio-cells = <1>; | 327 | #gpio-cells = <2>; |
317 | gpio-base = <86>; | 328 | abilis,ngpio = <4>; |
318 | gpio-pins = <&pctl_gpio_l>; | 329 | gpio-ranges = <&iomux 0 0 0>; |
330 | gpio-ranges-group-names = "gpiol"; | ||
319 | }; | 331 | }; |
320 | gpiom: gpio@FF14c000 { | 332 | gpiom: gpio@FF14c000 { |
321 | compatible = "abilis,tb10x-gpio"; | 333 | compatible = "abilis,tb10x-gpio"; |
@@ -325,9 +337,10 @@ | |||
325 | interrupts = <27 2>; | 337 | interrupts = <27 2>; |
326 | reg = <0xFF14C000 0x1000>; | 338 | reg = <0xFF14C000 0x1000>; |
327 | gpio-controller; | 339 | gpio-controller; |
328 | #gpio-cells = <1>; | 340 | #gpio-cells = <2>; |
329 | gpio-base = <90>; | 341 | abilis,ngpio = <4>; |
330 | gpio-pins = <&pctl_gpio_m>; | 342 | gpio-ranges = <&iomux 0 0 0>; |
343 | gpio-ranges-group-names = "gpiom"; | ||
331 | }; | 344 | }; |
332 | gpion: gpio@FF14d000 { | 345 | gpion: gpio@FF14d000 { |
333 | compatible = "abilis,tb10x-gpio"; | 346 | compatible = "abilis,tb10x-gpio"; |
@@ -337,9 +350,10 @@ | |||
337 | interrupts = <27 2>; | 350 | interrupts = <27 2>; |
338 | reg = <0xFF14D000 0x1000>; | 351 | reg = <0xFF14D000 0x1000>; |
339 | gpio-controller; | 352 | gpio-controller; |
340 | #gpio-cells = <1>; | 353 | #gpio-cells = <2>; |
341 | gpio-base = <94>; | 354 | abilis,ngpio = <5>; |
342 | gpio-pins = <&pctl_gpio_n>; | 355 | gpio-ranges = <&iomux 0 0 0>; |
356 | gpio-ranges-group-names = "gpion"; | ||
343 | }; | 357 | }; |
344 | }; | 358 | }; |
345 | }; | 359 | }; |
diff --git a/arch/arc/boot/dts/abilis_tb101_dvk.dts b/arch/arc/boot/dts/abilis_tb101_dvk.dts index b204657993aa..1cf51c280f28 100644 --- a/arch/arc/boot/dts/abilis_tb101_dvk.dts +++ b/arch/arc/boot/dts/abilis_tb101_dvk.dts | |||
@@ -64,62 +64,62 @@ | |||
64 | compatible = "gpio-leds"; | 64 | compatible = "gpio-leds"; |
65 | power { | 65 | power { |
66 | label = "Power"; | 66 | label = "Power"; |
67 | gpios = <&gpioi 0>; | 67 | gpios = <&gpioi 0 0>; |
68 | linux,default-trigger = "default-on"; | 68 | linux,default-trigger = "default-on"; |
69 | }; | 69 | }; |
70 | heartbeat { | 70 | heartbeat { |
71 | label = "Heartbeat"; | 71 | label = "Heartbeat"; |
72 | gpios = <&gpioi 1>; | 72 | gpios = <&gpioi 1 0>; |
73 | linux,default-trigger = "heartbeat"; | 73 | linux,default-trigger = "heartbeat"; |
74 | }; | 74 | }; |
75 | led2 { | 75 | led2 { |
76 | label = "LED2"; | 76 | label = "LED2"; |
77 | gpios = <&gpioi 2>; | 77 | gpios = <&gpioi 2 0>; |
78 | default-state = "off"; | 78 | default-state = "off"; |
79 | }; | 79 | }; |
80 | led3 { | 80 | led3 { |
81 | label = "LED3"; | 81 | label = "LED3"; |
82 | gpios = <&gpioi 3>; | 82 | gpios = <&gpioi 3 0>; |
83 | default-state = "off"; | 83 | default-state = "off"; |
84 | }; | 84 | }; |
85 | led4 { | 85 | led4 { |
86 | label = "LED4"; | 86 | label = "LED4"; |
87 | gpios = <&gpioi 4>; | 87 | gpios = <&gpioi 4 0>; |
88 | default-state = "off"; | 88 | default-state = "off"; |
89 | }; | 89 | }; |
90 | led5 { | 90 | led5 { |
91 | label = "LED5"; | 91 | label = "LED5"; |
92 | gpios = <&gpioi 5>; | 92 | gpios = <&gpioi 5 0>; |
93 | default-state = "off"; | 93 | default-state = "off"; |
94 | }; | 94 | }; |
95 | led6 { | 95 | led6 { |
96 | label = "LED6"; | 96 | label = "LED6"; |
97 | gpios = <&gpioi 6>; | 97 | gpios = <&gpioi 6 0>; |
98 | default-state = "off"; | 98 | default-state = "off"; |
99 | }; | 99 | }; |
100 | led7 { | 100 | led7 { |
101 | label = "LED7"; | 101 | label = "LED7"; |
102 | gpios = <&gpioi 7>; | 102 | gpios = <&gpioi 7 0>; |
103 | default-state = "off"; | 103 | default-state = "off"; |
104 | }; | 104 | }; |
105 | led8 { | 105 | led8 { |
106 | label = "LED8"; | 106 | label = "LED8"; |
107 | gpios = <&gpioi 8>; | 107 | gpios = <&gpioi 8 0>; |
108 | default-state = "off"; | 108 | default-state = "off"; |
109 | }; | 109 | }; |
110 | led9 { | 110 | led9 { |
111 | label = "LED9"; | 111 | label = "LED9"; |
112 | gpios = <&gpioi 9>; | 112 | gpios = <&gpioi 9 0>; |
113 | default-state = "off"; | 113 | default-state = "off"; |
114 | }; | 114 | }; |
115 | led10 { | 115 | led10 { |
116 | label = "LED10"; | 116 | label = "LED10"; |
117 | gpios = <&gpioi 10>; | 117 | gpios = <&gpioi 10 0>; |
118 | default-state = "off"; | 118 | default-state = "off"; |
119 | }; | 119 | }; |
120 | led11 { | 120 | led11 { |
121 | label = "LED11"; | 121 | label = "LED11"; |
122 | gpios = <&gpioi 11>; | 122 | gpios = <&gpioi 11 0>; |
123 | default-state = "off"; | 123 | default-state = "off"; |
124 | }; | 124 | }; |
125 | }; | 125 | }; |
diff --git a/arch/arc/boot/dts/abilis_tb10x.dtsi b/arch/arc/boot/dts/abilis_tb10x.dtsi index edf56f4749e1..a098d7c05e96 100644 --- a/arch/arc/boot/dts/abilis_tb10x.dtsi +++ b/arch/arc/boot/dts/abilis_tb10x.dtsi | |||
@@ -62,9 +62,8 @@ | |||
62 | }; | 62 | }; |
63 | 63 | ||
64 | iomux: iomux@FF10601c { | 64 | iomux: iomux@FF10601c { |
65 | #address-cells = <1>; | ||
66 | #size-cells = <1>; | ||
67 | compatible = "abilis,tb10x-iomux"; | 65 | compatible = "abilis,tb10x-iomux"; |
66 | #gpio-range-cells = <3>; | ||
68 | reg = <0xFF10601c 0x4>; | 67 | reg = <0xFF10601c 0x4>; |
69 | }; | 68 | }; |
70 | 69 | ||
diff --git a/arch/arc/boot/dts/angel4.dts b/arch/arc/boot/dts/angel4.dts index 4fb2d6f655bd..bcf662d21a57 100644 --- a/arch/arc/boot/dts/angel4.dts +++ b/arch/arc/boot/dts/angel4.dts | |||
@@ -67,5 +67,9 @@ | |||
67 | reg = <1>; | 67 | reg = <1>; |
68 | }; | 68 | }; |
69 | }; | 69 | }; |
70 | |||
71 | arcpmu0: pmu { | ||
72 | compatible = "snps,arc700-pmu"; | ||
73 | }; | ||
70 | }; | 74 | }; |
71 | }; | 75 | }; |
diff --git a/arch/arc/configs/fpga_noramfs_defconfig b/arch/arc/configs/fpga_noramfs_defconfig new file mode 100644 index 000000000000..5276a52f6a2f --- /dev/null +++ b/arch/arc/configs/fpga_noramfs_defconfig | |||
@@ -0,0 +1,64 @@ | |||
1 | CONFIG_CROSS_COMPILE="arc-linux-uclibc-" | ||
2 | # CONFIG_LOCALVERSION_AUTO is not set | ||
3 | CONFIG_DEFAULT_HOSTNAME="ARCLinux" | ||
4 | # CONFIG_SWAP is not set | ||
5 | CONFIG_HIGH_RES_TIMERS=y | ||
6 | CONFIG_IKCONFIG=y | ||
7 | CONFIG_IKCONFIG_PROC=y | ||
8 | CONFIG_NAMESPACES=y | ||
9 | # CONFIG_UTS_NS is not set | ||
10 | # CONFIG_PID_NS is not set | ||
11 | CONFIG_BLK_DEV_INITRD=y | ||
12 | CONFIG_KALLSYMS_ALL=y | ||
13 | CONFIG_EMBEDDED=y | ||
14 | # CONFIG_SLUB_DEBUG is not set | ||
15 | # CONFIG_COMPAT_BRK is not set | ||
16 | CONFIG_KPROBES=y | ||
17 | CONFIG_MODULES=y | ||
18 | # CONFIG_LBDAF is not set | ||
19 | # CONFIG_BLK_DEV_BSG is not set | ||
20 | # CONFIG_IOSCHED_DEADLINE is not set | ||
21 | # CONFIG_IOSCHED_CFQ is not set | ||
22 | CONFIG_ARC_PLAT_FPGA_LEGACY=y | ||
23 | CONFIG_ARC_BOARD_ML509=y | ||
24 | # CONFIG_ARC_HAS_RTSC is not set | ||
25 | CONFIG_ARC_BUILTIN_DTB_NAME="angel4" | ||
26 | CONFIG_PREEMPT=y | ||
27 | # CONFIG_COMPACTION is not set | ||
28 | # CONFIG_CROSS_MEMORY_ATTACH is not set | ||
29 | CONFIG_NET=y | ||
30 | CONFIG_PACKET=y | ||
31 | CONFIG_UNIX=y | ||
32 | CONFIG_UNIX_DIAG=y | ||
33 | CONFIG_NET_KEY=y | ||
34 | CONFIG_INET=y | ||
35 | # CONFIG_IPV6 is not set | ||
36 | # CONFIG_STANDALONE is not set | ||
37 | # CONFIG_PREVENT_FIRMWARE_BUILD is not set | ||
38 | # CONFIG_FIRMWARE_IN_KERNEL is not set | ||
39 | # CONFIG_BLK_DEV is not set | ||
40 | CONFIG_NETDEVICES=y | ||
41 | CONFIG_ARC_EMAC=y | ||
42 | CONFIG_LXT_PHY=y | ||
43 | # CONFIG_INPUT_MOUSEDEV_PSAUX is not set | ||
44 | # CONFIG_INPUT_KEYBOARD is not set | ||
45 | # CONFIG_INPUT_MOUSE is not set | ||
46 | # CONFIG_SERIO is not set | ||
47 | # CONFIG_LEGACY_PTYS is not set | ||
48 | # CONFIG_DEVKMEM is not set | ||
49 | CONFIG_SERIAL_ARC=y | ||
50 | CONFIG_SERIAL_ARC_CONSOLE=y | ||
51 | # CONFIG_HW_RANDOM is not set | ||
52 | # CONFIG_HWMON is not set | ||
53 | # CONFIG_VGA_CONSOLE is not set | ||
54 | # CONFIG_HID is not set | ||
55 | # CONFIG_USB_SUPPORT is not set | ||
56 | # CONFIG_IOMMU_SUPPORT is not set | ||
57 | CONFIG_EXT2_FS=y | ||
58 | CONFIG_EXT2_FS_XATTR=y | ||
59 | CONFIG_TMPFS=y | ||
60 | # CONFIG_MISC_FILESYSTEMS is not set | ||
61 | CONFIG_NFS_FS=y | ||
62 | # CONFIG_ENABLE_WARN_DEPRECATED is not set | ||
63 | # CONFIG_ENABLE_MUST_CHECK is not set | ||
64 | CONFIG_XZ_DEC=y | ||
diff --git a/arch/arc/include/asm/perf_event.h b/arch/arc/include/asm/perf_event.h index 115ad96480e6..cbf755e32a03 100644 --- a/arch/arc/include/asm/perf_event.h +++ b/arch/arc/include/asm/perf_event.h | |||
@@ -1,5 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright (C) 2011-2012 Synopsys, Inc. (www.synopsys.com) | 2 | * Linux performance counter support for ARC |
3 | * | ||
4 | * Copyright (C) 2011-2013 Synopsys, Inc. (www.synopsys.com) | ||
3 | * | 5 | * |
4 | * This program is free software; you can redistribute it and/or modify | 6 | * This program is free software; you can redistribute it and/or modify |
5 | * it under the terms of the GNU General Public License version 2 as | 7 | * it under the terms of the GNU General Public License version 2 as |
@@ -10,4 +12,204 @@ | |||
10 | #ifndef __ASM_PERF_EVENT_H | 12 | #ifndef __ASM_PERF_EVENT_H |
11 | #define __ASM_PERF_EVENT_H | 13 | #define __ASM_PERF_EVENT_H |
12 | 14 | ||
15 | /* real maximum varies per CPU, this is the maximum supported by the driver */ | ||
16 | #define ARC_PMU_MAX_HWEVENTS 64 | ||
17 | |||
18 | #define ARC_REG_CC_BUILD 0xF6 | ||
19 | #define ARC_REG_CC_INDEX 0x240 | ||
20 | #define ARC_REG_CC_NAME0 0x241 | ||
21 | #define ARC_REG_CC_NAME1 0x242 | ||
22 | |||
23 | #define ARC_REG_PCT_BUILD 0xF5 | ||
24 | #define ARC_REG_PCT_COUNTL 0x250 | ||
25 | #define ARC_REG_PCT_COUNTH 0x251 | ||
26 | #define ARC_REG_PCT_SNAPL 0x252 | ||
27 | #define ARC_REG_PCT_SNAPH 0x253 | ||
28 | #define ARC_REG_PCT_CONFIG 0x254 | ||
29 | #define ARC_REG_PCT_CONTROL 0x255 | ||
30 | #define ARC_REG_PCT_INDEX 0x256 | ||
31 | |||
32 | #define ARC_REG_PCT_CONTROL_CC (1 << 16) /* clear counts */ | ||
33 | #define ARC_REG_PCT_CONTROL_SN (1 << 17) /* snapshot */ | ||
34 | |||
35 | struct arc_reg_pct_build { | ||
36 | #ifdef CONFIG_CPU_BIG_ENDIAN | ||
37 | unsigned int m:8, c:8, r:6, s:2, v:8; | ||
38 | #else | ||
39 | unsigned int v:8, s:2, r:6, c:8, m:8; | ||
40 | #endif | ||
41 | }; | ||
42 | |||
43 | struct arc_reg_cc_build { | ||
44 | #ifdef CONFIG_CPU_BIG_ENDIAN | ||
45 | unsigned int c:16, r:8, v:8; | ||
46 | #else | ||
47 | unsigned int v:8, r:8, c:16; | ||
48 | #endif | ||
49 | }; | ||
50 | |||
51 | #define PERF_COUNT_ARC_DCLM (PERF_COUNT_HW_MAX + 0) | ||
52 | #define PERF_COUNT_ARC_DCSM (PERF_COUNT_HW_MAX + 1) | ||
53 | #define PERF_COUNT_ARC_ICM (PERF_COUNT_HW_MAX + 2) | ||
54 | #define PERF_COUNT_ARC_BPOK (PERF_COUNT_HW_MAX + 3) | ||
55 | #define PERF_COUNT_ARC_EDTLB (PERF_COUNT_HW_MAX + 4) | ||
56 | #define PERF_COUNT_ARC_EITLB (PERF_COUNT_HW_MAX + 5) | ||
57 | #define PERF_COUNT_ARC_HW_MAX (PERF_COUNT_HW_MAX + 6) | ||
58 | |||
59 | /* | ||
60 | * The "generalized" performance events seem to really be a copy | ||
61 | * of the available events on x86 processors; the mapping to ARC | ||
62 | * events is not always possible 1-to-1. Fortunately, there doesn't | ||
63 | * seem to be an exact definition for these events, so we can cheat | ||
64 | * a bit where necessary. | ||
65 | * | ||
66 | * In particular, the following PERF events may behave a bit differently | ||
67 | * compared to other architectures: | ||
68 | * | ||
69 | * PERF_COUNT_HW_CPU_CYCLES | ||
70 | * Cycles not in halted state | ||
71 | * | ||
72 | * PERF_COUNT_HW_REF_CPU_CYCLES | ||
73 | * Reference cycles not in halted state, same as PERF_COUNT_HW_CPU_CYCLES | ||
74 | * for now as we don't do Dynamic Voltage/Frequency Scaling (yet) | ||
75 | * | ||
76 | * PERF_COUNT_HW_BUS_CYCLES | ||
77 | * Unclear what this means, Intel uses 0x013c, which according to | ||
78 | * their datasheet means "unhalted reference cycles". It sounds similar | ||
79 | * to PERF_COUNT_HW_REF_CPU_CYCLES, and we use the same counter for it. | ||
80 | * | ||
81 | * PERF_COUNT_HW_STALLED_CYCLES_BACKEND | ||
82 | * PERF_COUNT_HW_STALLED_CYCLES_FRONTEND | ||
83 | * The ARC 700 can either measure stalls per pipeline stage, or all stalls | ||
84 | * combined; for now we assign all stalls to STALLED_CYCLES_BACKEND | ||
85 | * and all pipeline flushes (e.g. caused by mispredicts, etc.) to | ||
86 | * STALLED_CYCLES_FRONTEND. | ||
87 | * | ||
88 | * We could start multiple performance counters and combine everything | ||
89 | * afterwards, but that makes it complicated. | ||
90 | * | ||
91 | * Note that I$ cache misses aren't counted by either of the two! | ||
92 | */ | ||
93 | |||
94 | static const char * const arc_pmu_ev_hw_map[] = { | ||
95 | [PERF_COUNT_HW_CPU_CYCLES] = "crun", | ||
96 | [PERF_COUNT_HW_REF_CPU_CYCLES] = "crun", | ||
97 | [PERF_COUNT_HW_BUS_CYCLES] = "crun", | ||
98 | [PERF_COUNT_HW_INSTRUCTIONS] = "iall", | ||
99 | [PERF_COUNT_HW_BRANCH_MISSES] = "bpfail", | ||
100 | [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = "ijmp", | ||
101 | [PERF_COUNT_HW_STALLED_CYCLES_FRONTEND] = "bflush", | ||
102 | [PERF_COUNT_HW_STALLED_CYCLES_BACKEND] = "bstall", | ||
103 | [PERF_COUNT_ARC_DCLM] = "dclm", | ||
104 | [PERF_COUNT_ARC_DCSM] = "dcsm", | ||
105 | [PERF_COUNT_ARC_ICM] = "icm", | ||
106 | [PERF_COUNT_ARC_BPOK] = "bpok", | ||
107 | [PERF_COUNT_ARC_EDTLB] = "edtlb", | ||
108 | [PERF_COUNT_ARC_EITLB] = "eitlb", | ||
109 | }; | ||
110 | |||
111 | #define C(_x) PERF_COUNT_HW_CACHE_##_x | ||
112 | #define CACHE_OP_UNSUPPORTED 0xffff | ||
113 | |||
114 | static const unsigned arc_pmu_cache_map[C(MAX)][C(OP_MAX)][C(RESULT_MAX)] = { | ||
115 | [C(L1D)] = { | ||
116 | [C(OP_READ)] = { | ||
117 | [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, | ||
118 | [C(RESULT_MISS)] = PERF_COUNT_ARC_DCLM, | ||
119 | }, | ||
120 | [C(OP_WRITE)] = { | ||
121 | [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, | ||
122 | [C(RESULT_MISS)] = PERF_COUNT_ARC_DCSM, | ||
123 | }, | ||
124 | [C(OP_PREFETCH)] = { | ||
125 | [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, | ||
126 | [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, | ||
127 | }, | ||
128 | }, | ||
129 | [C(L1I)] = { | ||
130 | [C(OP_READ)] = { | ||
131 | [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, | ||
132 | [C(RESULT_MISS)] = PERF_COUNT_ARC_ICM, | ||
133 | }, | ||
134 | [C(OP_WRITE)] = { | ||
135 | [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, | ||
136 | [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, | ||
137 | }, | ||
138 | [C(OP_PREFETCH)] = { | ||
139 | [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, | ||
140 | [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, | ||
141 | }, | ||
142 | }, | ||
143 | [C(LL)] = { | ||
144 | [C(OP_READ)] = { | ||
145 | [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, | ||
146 | [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, | ||
147 | }, | ||
148 | [C(OP_WRITE)] = { | ||
149 | [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, | ||
150 | [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, | ||
151 | }, | ||
152 | [C(OP_PREFETCH)] = { | ||
153 | [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, | ||
154 | [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, | ||
155 | }, | ||
156 | }, | ||
157 | [C(DTLB)] = { | ||
158 | [C(OP_READ)] = { | ||
159 | [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, | ||
160 | [C(RESULT_MISS)] = PERF_COUNT_ARC_EDTLB, | ||
161 | }, | ||
162 | [C(OP_WRITE)] = { | ||
163 | [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, | ||
164 | [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, | ||
165 | }, | ||
166 | [C(OP_PREFETCH)] = { | ||
167 | [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, | ||
168 | [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, | ||
169 | }, | ||
170 | }, | ||
171 | [C(ITLB)] = { | ||
172 | [C(OP_READ)] = { | ||
173 | [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, | ||
174 | [C(RESULT_MISS)] = PERF_COUNT_ARC_EITLB, | ||
175 | }, | ||
176 | [C(OP_WRITE)] = { | ||
177 | [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, | ||
178 | [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, | ||
179 | }, | ||
180 | [C(OP_PREFETCH)] = { | ||
181 | [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, | ||
182 | [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, | ||
183 | }, | ||
184 | }, | ||
185 | [C(BPU)] = { | ||
186 | [C(OP_READ)] = { | ||
187 | [C(RESULT_ACCESS)] = PERF_COUNT_HW_BRANCH_INSTRUCTIONS, | ||
188 | [C(RESULT_MISS)] = PERF_COUNT_HW_BRANCH_MISSES, | ||
189 | }, | ||
190 | [C(OP_WRITE)] = { | ||
191 | [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, | ||
192 | [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, | ||
193 | }, | ||
194 | [C(OP_PREFETCH)] = { | ||
195 | [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, | ||
196 | [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, | ||
197 | }, | ||
198 | }, | ||
199 | [C(NODE)] = { | ||
200 | [C(OP_READ)] = { | ||
201 | [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, | ||
202 | [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, | ||
203 | }, | ||
204 | [C(OP_WRITE)] = { | ||
205 | [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, | ||
206 | [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, | ||
207 | }, | ||
208 | [C(OP_PREFETCH)] = { | ||
209 | [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, | ||
210 | [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, | ||
211 | }, | ||
212 | }, | ||
213 | }; | ||
214 | |||
13 | #endif /* __ASM_PERF_EVENT_H */ | 215 | #endif /* __ASM_PERF_EVENT_H */ |
diff --git a/arch/arc/kernel/Makefile b/arch/arc/kernel/Makefile index c242ef07ba70..8004b4fa6461 100644 --- a/arch/arc/kernel/Makefile +++ b/arch/arc/kernel/Makefile | |||
@@ -19,6 +19,7 @@ obj-$(CONFIG_KPROBES) += kprobes.o | |||
19 | obj-$(CONFIG_ARC_MISALIGN_ACCESS) += unaligned.o | 19 | obj-$(CONFIG_ARC_MISALIGN_ACCESS) += unaligned.o |
20 | obj-$(CONFIG_KGDB) += kgdb.o | 20 | obj-$(CONFIG_KGDB) += kgdb.o |
21 | obj-$(CONFIG_ARC_METAWARE_HLINK) += arc_hostlink.o | 21 | obj-$(CONFIG_ARC_METAWARE_HLINK) += arc_hostlink.o |
22 | obj-$(CONFIG_PERF_EVENTS) += perf_event.o | ||
22 | 23 | ||
23 | obj-$(CONFIG_ARC_FPU_SAVE_RESTORE) += fpu.o | 24 | obj-$(CONFIG_ARC_FPU_SAVE_RESTORE) += fpu.o |
24 | CFLAGS_fpu.o += -mdpfp | 25 | CFLAGS_fpu.o += -mdpfp |
diff --git a/arch/arc/kernel/perf_event.c b/arch/arc/kernel/perf_event.c new file mode 100644 index 000000000000..e46d81f70979 --- /dev/null +++ b/arch/arc/kernel/perf_event.c | |||
@@ -0,0 +1,326 @@ | |||
1 | /* | ||
2 | * Linux performance counter support for ARC700 series | ||
3 | * | ||
4 | * Copyright (C) 2013 Synopsys, Inc. (www.synopsys.com) | ||
5 | * | ||
6 | * This code is inspired by the perf support of various other architectures. | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | * | ||
12 | */ | ||
13 | #include <linux/errno.h> | ||
14 | #include <linux/module.h> | ||
15 | #include <linux/of.h> | ||
16 | #include <linux/perf_event.h> | ||
17 | #include <linux/platform_device.h> | ||
18 | #include <asm/arcregs.h> | ||
19 | |||
20 | struct arc_pmu { | ||
21 | struct pmu pmu; | ||
22 | int counter_size; /* in bits */ | ||
23 | int n_counters; | ||
24 | unsigned long used_mask[BITS_TO_LONGS(ARC_PMU_MAX_HWEVENTS)]; | ||
25 | int ev_hw_idx[PERF_COUNT_ARC_HW_MAX]; | ||
26 | }; | ||
27 | |||
28 | /* read counter #idx; note that counter# != event# on ARC! */ | ||
29 | static uint64_t arc_pmu_read_counter(int idx) | ||
30 | { | ||
31 | uint32_t tmp; | ||
32 | uint64_t result; | ||
33 | |||
34 | /* | ||
35 | * ARC supports making 'snapshots' of the counters, so we don't | ||
36 | * need to care about counters wrapping to 0 underneath our feet | ||
37 | */ | ||
38 | write_aux_reg(ARC_REG_PCT_INDEX, idx); | ||
39 | tmp = read_aux_reg(ARC_REG_PCT_CONTROL); | ||
40 | write_aux_reg(ARC_REG_PCT_CONTROL, tmp | ARC_REG_PCT_CONTROL_SN); | ||
41 | result = (uint64_t) (read_aux_reg(ARC_REG_PCT_SNAPH)) << 32; | ||
42 | result |= read_aux_reg(ARC_REG_PCT_SNAPL); | ||
43 | |||
44 | return result; | ||
45 | } | ||
46 | |||
47 | static void arc_perf_event_update(struct perf_event *event, | ||
48 | struct hw_perf_event *hwc, int idx) | ||
49 | { | ||
50 | struct arc_pmu *arc_pmu = container_of(event->pmu, struct arc_pmu, pmu); | ||
51 | uint64_t prev_raw_count, new_raw_count; | ||
52 | int64_t delta; | ||
53 | |||
54 | do { | ||
55 | prev_raw_count = local64_read(&hwc->prev_count); | ||
56 | new_raw_count = arc_pmu_read_counter(idx); | ||
57 | } while (local64_cmpxchg(&hwc->prev_count, prev_raw_count, | ||
58 | new_raw_count) != prev_raw_count); | ||
59 | |||
60 | delta = (new_raw_count - prev_raw_count) & | ||
61 | ((1ULL << arc_pmu->counter_size) - 1ULL); | ||
62 | |||
63 | local64_add(delta, &event->count); | ||
64 | local64_sub(delta, &hwc->period_left); | ||
65 | } | ||
66 | |||
67 | static void arc_pmu_read(struct perf_event *event) | ||
68 | { | ||
69 | arc_perf_event_update(event, &event->hw, event->hw.idx); | ||
70 | } | ||
71 | |||
72 | static int arc_pmu_cache_event(u64 config) | ||
73 | { | ||
74 | unsigned int cache_type, cache_op, cache_result; | ||
75 | int ret; | ||
76 | |||
77 | cache_type = (config >> 0) & 0xff; | ||
78 | cache_op = (config >> 8) & 0xff; | ||
79 | cache_result = (config >> 16) & 0xff; | ||
80 | if (cache_type >= PERF_COUNT_HW_CACHE_MAX) | ||
81 | return -EINVAL; | ||
82 | if (cache_type >= PERF_COUNT_HW_CACHE_OP_MAX) | ||
83 | return -EINVAL; | ||
84 | if (cache_type >= PERF_COUNT_HW_CACHE_RESULT_MAX) | ||
85 | return -EINVAL; | ||
86 | |||
87 | ret = arc_pmu_cache_map[cache_type][cache_op][cache_result]; | ||
88 | |||
89 | if (ret == CACHE_OP_UNSUPPORTED) | ||
90 | return -ENOENT; | ||
91 | |||
92 | return ret; | ||
93 | } | ||
94 | |||
95 | /* initializes hw_perf_event structure if event is supported */ | ||
96 | static int arc_pmu_event_init(struct perf_event *event) | ||
97 | { | ||
98 | struct arc_pmu *arc_pmu = container_of(event->pmu, struct arc_pmu, pmu); | ||
99 | struct hw_perf_event *hwc = &event->hw; | ||
100 | int ret; | ||
101 | |||
102 | /* ARC 700 PMU does not support sampling events */ | ||
103 | if (is_sampling_event(event)) | ||
104 | return -ENOENT; | ||
105 | |||
106 | switch (event->attr.type) { | ||
107 | case PERF_TYPE_HARDWARE: | ||
108 | if (event->attr.config >= PERF_COUNT_HW_MAX) | ||
109 | return -ENOENT; | ||
110 | if (arc_pmu->ev_hw_idx[event->attr.config] < 0) | ||
111 | return -ENOENT; | ||
112 | hwc->config = arc_pmu->ev_hw_idx[event->attr.config]; | ||
113 | pr_debug("initializing event %d with cfg %d\n", | ||
114 | (int) event->attr.config, (int) hwc->config); | ||
115 | return 0; | ||
116 | case PERF_TYPE_HW_CACHE: | ||
117 | ret = arc_pmu_cache_event(event->attr.config); | ||
118 | if (ret < 0) | ||
119 | return ret; | ||
120 | hwc->config = arc_pmu->ev_hw_idx[ret]; | ||
121 | return 0; | ||
122 | default: | ||
123 | return -ENOENT; | ||
124 | } | ||
125 | } | ||
126 | |||
127 | /* starts all counters */ | ||
128 | static void arc_pmu_enable(struct pmu *pmu) | ||
129 | { | ||
130 | uint32_t tmp; | ||
131 | tmp = read_aux_reg(ARC_REG_PCT_CONTROL); | ||
132 | write_aux_reg(ARC_REG_PCT_CONTROL, (tmp & 0xffff0000) | 0x1); | ||
133 | } | ||
134 | |||
135 | /* stops all counters */ | ||
136 | static void arc_pmu_disable(struct pmu *pmu) | ||
137 | { | ||
138 | uint32_t tmp; | ||
139 | tmp = read_aux_reg(ARC_REG_PCT_CONTROL); | ||
140 | write_aux_reg(ARC_REG_PCT_CONTROL, (tmp & 0xffff0000) | 0x0); | ||
141 | } | ||
142 | |||
143 | /* | ||
144 | * Assigns hardware counter to hardware condition. | ||
145 | * Note that there is no separate start/stop mechanism; | ||
146 | * stopping is achieved by assigning the 'never' condition | ||
147 | */ | ||
148 | static void arc_pmu_start(struct perf_event *event, int flags) | ||
149 | { | ||
150 | struct hw_perf_event *hwc = &event->hw; | ||
151 | int idx = hwc->idx; | ||
152 | |||
153 | if (WARN_ON_ONCE(idx == -1)) | ||
154 | return; | ||
155 | |||
156 | if (flags & PERF_EF_RELOAD) | ||
157 | WARN_ON_ONCE(!(event->hw.state & PERF_HES_UPTODATE)); | ||
158 | |||
159 | event->hw.state = 0; | ||
160 | |||
161 | /* enable ARC pmu here */ | ||
162 | write_aux_reg(ARC_REG_PCT_INDEX, idx); | ||
163 | write_aux_reg(ARC_REG_PCT_CONFIG, hwc->config); | ||
164 | } | ||
165 | |||
166 | static void arc_pmu_stop(struct perf_event *event, int flags) | ||
167 | { | ||
168 | struct hw_perf_event *hwc = &event->hw; | ||
169 | int idx = hwc->idx; | ||
170 | |||
171 | if (!(event->hw.state & PERF_HES_STOPPED)) { | ||
172 | /* stop ARC pmu here */ | ||
173 | write_aux_reg(ARC_REG_PCT_INDEX, idx); | ||
174 | |||
175 | /* condition code #0 is always "never" */ | ||
176 | write_aux_reg(ARC_REG_PCT_CONFIG, 0); | ||
177 | |||
178 | event->hw.state |= PERF_HES_STOPPED; | ||
179 | } | ||
180 | |||
181 | if ((flags & PERF_EF_UPDATE) && | ||
182 | !(event->hw.state & PERF_HES_UPTODATE)) { | ||
183 | arc_perf_event_update(event, &event->hw, idx); | ||
184 | event->hw.state |= PERF_HES_UPTODATE; | ||
185 | } | ||
186 | } | ||
187 | |||
188 | static void arc_pmu_del(struct perf_event *event, int flags) | ||
189 | { | ||
190 | struct arc_pmu *arc_pmu = container_of(event->pmu, struct arc_pmu, pmu); | ||
191 | |||
192 | arc_pmu_stop(event, PERF_EF_UPDATE); | ||
193 | __clear_bit(event->hw.idx, arc_pmu->used_mask); | ||
194 | |||
195 | perf_event_update_userpage(event); | ||
196 | } | ||
197 | |||
198 | /* allocate hardware counter and optionally start counting */ | ||
199 | static int arc_pmu_add(struct perf_event *event, int flags) | ||
200 | { | ||
201 | struct arc_pmu *arc_pmu = container_of(event->pmu, struct arc_pmu, pmu); | ||
202 | struct hw_perf_event *hwc = &event->hw; | ||
203 | int idx = hwc->idx; | ||
204 | |||
205 | if (__test_and_set_bit(idx, arc_pmu->used_mask)) { | ||
206 | idx = find_first_zero_bit(arc_pmu->used_mask, | ||
207 | arc_pmu->n_counters); | ||
208 | if (idx == arc_pmu->n_counters) | ||
209 | return -EAGAIN; | ||
210 | |||
211 | __set_bit(idx, arc_pmu->used_mask); | ||
212 | hwc->idx = idx; | ||
213 | } | ||
214 | |||
215 | write_aux_reg(ARC_REG_PCT_INDEX, idx); | ||
216 | write_aux_reg(ARC_REG_PCT_CONFIG, 0); | ||
217 | write_aux_reg(ARC_REG_PCT_COUNTL, 0); | ||
218 | write_aux_reg(ARC_REG_PCT_COUNTH, 0); | ||
219 | local64_set(&hwc->prev_count, 0); | ||
220 | |||
221 | hwc->state = PERF_HES_UPTODATE | PERF_HES_STOPPED; | ||
222 | if (flags & PERF_EF_START) | ||
223 | arc_pmu_start(event, PERF_EF_RELOAD); | ||
224 | |||
225 | perf_event_update_userpage(event); | ||
226 | |||
227 | return 0; | ||
228 | } | ||
229 | |||
230 | static int arc_pmu_device_probe(struct platform_device *pdev) | ||
231 | { | ||
232 | struct arc_pmu *arc_pmu; | ||
233 | struct arc_reg_pct_build pct_bcr; | ||
234 | struct arc_reg_cc_build cc_bcr; | ||
235 | int i, j, ret; | ||
236 | |||
237 | union cc_name { | ||
238 | struct { | ||
239 | uint32_t word0, word1; | ||
240 | char sentinel; | ||
241 | } indiv; | ||
242 | char str[9]; | ||
243 | } cc_name; | ||
244 | |||
245 | |||
246 | READ_BCR(ARC_REG_PCT_BUILD, pct_bcr); | ||
247 | if (!pct_bcr.v) { | ||
248 | pr_err("This core does not have performance counters!\n"); | ||
249 | return -ENODEV; | ||
250 | } | ||
251 | |||
252 | arc_pmu = devm_kzalloc(&pdev->dev, sizeof(struct arc_pmu), | ||
253 | GFP_KERNEL); | ||
254 | if (!arc_pmu) | ||
255 | return -ENOMEM; | ||
256 | |||
257 | arc_pmu->n_counters = pct_bcr.c; | ||
258 | BUG_ON(arc_pmu->n_counters > ARC_PMU_MAX_HWEVENTS); | ||
259 | |||
260 | arc_pmu->counter_size = 32 + (pct_bcr.s << 4); | ||
261 | pr_info("ARC PMU found with %d counters of size %d bits\n", | ||
262 | arc_pmu->n_counters, arc_pmu->counter_size); | ||
263 | |||
264 | READ_BCR(ARC_REG_CC_BUILD, cc_bcr); | ||
265 | |||
266 | if (!cc_bcr.v) | ||
267 | pr_err("Strange! Performance counters exist, but no countable conditions?\n"); | ||
268 | |||
269 | pr_info("ARC PMU has %d countable conditions\n", cc_bcr.c); | ||
270 | |||
271 | cc_name.str[8] = 0; | ||
272 | for (i = 0; i < PERF_COUNT_HW_MAX; i++) | ||
273 | arc_pmu->ev_hw_idx[i] = -1; | ||
274 | |||
275 | for (j = 0; j < cc_bcr.c; j++) { | ||
276 | write_aux_reg(ARC_REG_CC_INDEX, j); | ||
277 | cc_name.indiv.word0 = read_aux_reg(ARC_REG_CC_NAME0); | ||
278 | cc_name.indiv.word1 = read_aux_reg(ARC_REG_CC_NAME1); | ||
279 | for (i = 0; i < ARRAY_SIZE(arc_pmu_ev_hw_map); i++) { | ||
280 | if (arc_pmu_ev_hw_map[i] && | ||
281 | !strcmp(arc_pmu_ev_hw_map[i], cc_name.str) && | ||
282 | strlen(arc_pmu_ev_hw_map[i])) { | ||
283 | pr_debug("mapping %d to idx %d with name %s\n", | ||
284 | i, j, cc_name.str); | ||
285 | arc_pmu->ev_hw_idx[i] = j; | ||
286 | } | ||
287 | } | ||
288 | } | ||
289 | |||
290 | arc_pmu->pmu = (struct pmu) { | ||
291 | .pmu_enable = arc_pmu_enable, | ||
292 | .pmu_disable = arc_pmu_disable, | ||
293 | .event_init = arc_pmu_event_init, | ||
294 | .add = arc_pmu_add, | ||
295 | .del = arc_pmu_del, | ||
296 | .start = arc_pmu_start, | ||
297 | .stop = arc_pmu_stop, | ||
298 | .read = arc_pmu_read, | ||
299 | }; | ||
300 | |||
301 | ret = perf_pmu_register(&arc_pmu->pmu, pdev->name, PERF_TYPE_RAW); | ||
302 | |||
303 | return ret; | ||
304 | } | ||
305 | |||
306 | #ifdef CONFIG_OF | ||
307 | static const struct of_device_id arc_pmu_match[] = { | ||
308 | { .compatible = "snps,arc700-pmu" }, | ||
309 | {}, | ||
310 | }; | ||
311 | MODULE_DEVICE_TABLE(of, arc_pmu_match); | ||
312 | #endif | ||
313 | |||
314 | static struct platform_driver arc_pmu_driver = { | ||
315 | .driver = { | ||
316 | .name = "arc700-pmu", | ||
317 | .of_match_table = of_match_ptr(arc_pmu_match), | ||
318 | }, | ||
319 | .probe = arc_pmu_device_probe, | ||
320 | }; | ||
321 | |||
322 | module_platform_driver(arc_pmu_driver); | ||
323 | |||
324 | MODULE_LICENSE("GPL"); | ||
325 | MODULE_AUTHOR("Mischa Jonker <mjonker@synopsys.com>"); | ||
326 | MODULE_DESCRIPTION("ARC PMU driver"); | ||
diff --git a/arch/arc/plat-tb10x/Kconfig b/arch/arc/plat-tb10x/Kconfig index 1ab386bb5da8..6994c188dc88 100644 --- a/arch/arc/plat-tb10x/Kconfig +++ b/arch/arc/plat-tb10x/Kconfig | |||
@@ -20,8 +20,10 @@ menuconfig ARC_PLAT_TB10X | |||
20 | bool "Abilis TB10x" | 20 | bool "Abilis TB10x" |
21 | select COMMON_CLK | 21 | select COMMON_CLK |
22 | select PINCTRL | 22 | select PINCTRL |
23 | select PINCTRL_TB10X | ||
23 | select PINMUX | 24 | select PINMUX |
24 | select ARCH_REQUIRE_GPIOLIB | 25 | select ARCH_REQUIRE_GPIOLIB |
26 | select GPIO_TB10X | ||
25 | select TB10X_IRQC | 27 | select TB10X_IRQC |
26 | help | 28 | help |
27 | Support for platforms based on the TB10x home media gateway SOC by | 29 | Support for platforms based on the TB10x home media gateway SOC by |