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authorVineet Gupta <vgupta@synopsys.com>2013-01-18 04:42:24 -0500
committerVineet Gupta <vgupta@synopsys.com>2013-02-15 12:46:08 -0500
commit7fadc1e8fe89698caac213ff6d631b811fc7b393 (patch)
tree4433175b52fad9f1a867e05c9bf1ba43a3f4e29d /arch/arc/plat-arcfpga/platform.c
parentaf61742813aa9dde65ca796801e36d03b83fa79f (diff)
ARC: [plat-arfpga] BVCI Latency Unit setup
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Diffstat (limited to 'arch/arc/plat-arcfpga/platform.c')
-rw-r--r--arch/arc/plat-arcfpga/platform.c56
1 files changed, 56 insertions, 0 deletions
diff --git a/arch/arc/plat-arcfpga/platform.c b/arch/arc/plat-arcfpga/platform.c
index 33bcac8bd6b8..b7f63e3f3cae 100644
--- a/arch/arc/plat-arcfpga/platform.c
+++ b/arch/arc/plat-arcfpga/platform.c
@@ -12,6 +12,7 @@
12#include <linux/init.h> 12#include <linux/init.h>
13#include <linux/device.h> 13#include <linux/device.h>
14#include <linux/platform_device.h> 14#include <linux/platform_device.h>
15#include <linux/io.h>
15#include <linux/console.h> 16#include <linux/console.h>
16#include <linux/of_platform.h> 17#include <linux/of_platform.h>
17#include <asm/setup.h> 18#include <asm/setup.h>
@@ -19,6 +20,59 @@
19#include <asm/clk.h> 20#include <asm/clk.h>
20#include <plat/memmap.h> 21#include <plat/memmap.h>
21 22
23/*-----------------------BVCI Latency Unit -----------------------------*/
24
25#ifdef CONFIG_ARC_HAS_BVCI_LAT_UNIT
26
27int lat_cycles = CONFIG_BVCI_LAT_CYCLES;
28
29/* BVCI Bus Profiler: Latency Unit */
30static void __init setup_bvci_lat_unit(void)
31{
32#define MAX_BVCI_UNITS 12
33
34 unsigned int i;
35 unsigned int *base = (unsigned int *)BVCI_LAT_UNIT_BASE;
36 const unsigned long units_req = CONFIG_BVCI_LAT_UNITS;
37 const unsigned int REG_UNIT = 21;
38 const unsigned int REG_VAL = 22;
39
40 /*
41 * There are multiple Latency Units corresponding to the many
42 * interfaces of the system bus arbiter (both CPU side as well as
43 * the peripheral side).
44 *
45 * Unit 0 - System Arb and Mem Controller - adds latency to all
46 * memory trasactions
47 * Unit 1 - I$ and System Bus
48 * Unit 2 - D$ and System Bus
49 * ..
50 * Unit 12 - IDE Disk controller and System Bus
51 *
52 * The programmers model requires writing to lat_unit reg first
53 * and then the latency value (cycles) to lat_value reg
54 */
55
56 if (CONFIG_BVCI_LAT_UNITS == 0) {
57 writel(0, base + REG_UNIT);
58 writel(lat_cycles, base + REG_VAL);
59 pr_info("BVCI Latency for all Memory Transactions %d cycles\n",
60 lat_cycles);
61 } else {
62 for_each_set_bit(i, &units_req, MAX_BVCI_UNITS) {
63 writel(i + 1, base + REG_UNIT); /* loop is 0 based */
64 writel(lat_cycles, base + REG_VAL);
65 pr_info("BVCI Latency for Unit[%d] = %d cycles\n",
66 (i + 1), lat_cycles);
67 }
68 }
69}
70#else
71static void __init setup_bvci_lat_unit(void)
72{
73}
74#endif
75
22/*----------------------- Platform Devices -----------------------------*/ 76/*----------------------- Platform Devices -----------------------------*/
23 77
24static unsigned long arc_uart_info[] = { 78static unsigned long arc_uart_info[] = {
@@ -106,6 +160,8 @@ void __init arc_platform_early_init(void)
106{ 160{
107 pr_info("[plat-arcfpga]: registering early dev resources\n"); 161 pr_info("[plat-arcfpga]: registering early dev resources\n");
108 162
163 setup_bvci_lat_unit();
164
109 arc_fpga_serial_init(); 165 arc_fpga_serial_init();
110} 166}
111 167