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authorVineet Gupta <vgupta@synopsys.com>2013-06-22 09:52:42 -0400
committerVineet Gupta <vgupta@synopsys.com>2013-06-22 09:52:42 -0400
commit336e199e9c812e2f20f028d7825f4342c9ec0cc3 (patch)
tree0bfce4154717a9906fad48b5633491cb1356faef /arch/arc/mm
parent30499186602afa1d62c2e5d354d02214a0ee00b7 (diff)
ARC: No-op full icache flush if !CONFIG_ARC_HAS_ICACHE
Also remove extraneous irq disabling in flush_cache_all() callstack Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Diffstat (limited to 'arch/arc/mm')
-rw-r--r--arch/arc/mm/cache_arc700.c28
1 files changed, 9 insertions, 19 deletions
diff --git a/arch/arc/mm/cache_arc700.c b/arch/arc/mm/cache_arc700.c
index 0a56682e0c94..03012a27d590 100644
--- a/arch/arc/mm/cache_arc700.c
+++ b/arch/arc/mm/cache_arc700.c
@@ -261,11 +261,9 @@ static inline void wait_for_flush(void)
261 */ 261 */
262static inline void __dc_entire_op(const int cacheop) 262static inline void __dc_entire_op(const int cacheop)
263{ 263{
264 unsigned long flags, tmp = tmp; 264 unsigned int tmp = tmp;
265 int aux; 265 int aux;
266 266
267 local_irq_save(flags);
268
269 if (cacheop == OP_FLUSH_N_INV) { 267 if (cacheop == OP_FLUSH_N_INV) {
270 /* Dcache provides 2 cmd: FLUSH or INV 268 /* Dcache provides 2 cmd: FLUSH or INV
271 * INV inturn has sub-modes: DISCARD or FLUSH-BEFORE 269 * INV inturn has sub-modes: DISCARD or FLUSH-BEFORE
@@ -289,8 +287,6 @@ static inline void __dc_entire_op(const int cacheop)
289 /* Switch back the DISCARD ONLY Invalidate mode */ 287 /* Switch back the DISCARD ONLY Invalidate mode */
290 if (cacheop == OP_FLUSH_N_INV) 288 if (cacheop == OP_FLUSH_N_INV)
291 write_aux_reg(ARC_REG_DC_CTRL, tmp & ~DC_CTRL_INV_MODE_FLUSH); 289 write_aux_reg(ARC_REG_DC_CTRL, tmp & ~DC_CTRL_INV_MODE_FLUSH);
292
293 local_irq_restore(flags);
294} 290}
295 291
296/* 292/*
@@ -481,8 +477,15 @@ static void __ic_line_inv_vaddr(unsigned long paddr, unsigned long vaddr,
481 local_irq_restore(flags); 477 local_irq_restore(flags);
482} 478}
483 479
480static inline void __ic_entire_inv(void)
481{
482 write_aux_reg(ARC_REG_IC_IVIC, 1);
483 read_aux_reg(ARC_REG_IC_CTRL); /* blocks */
484}
485
484#else 486#else
485 487
488#define __ic_entire_inv()
486#define __ic_line_inv_vaddr(pstart, vstart, sz) 489#define __ic_line_inv_vaddr(pstart, vstart, sz)
487 490
488#endif /* CONFIG_ARC_HAS_ICACHE */ 491#endif /* CONFIG_ARC_HAS_ICACHE */
@@ -651,26 +654,13 @@ void ___flush_dcache_page(unsigned long paddr, unsigned long vaddr)
651 __dc_line_op(paddr, vaddr & PAGE_MASK, PAGE_SIZE, OP_FLUSH_N_INV); 654 __dc_line_op(paddr, vaddr & PAGE_MASK, PAGE_SIZE, OP_FLUSH_N_INV);
652} 655}
653 656
654void flush_icache_all(void)
655{
656 unsigned long flags;
657
658 local_irq_save(flags);
659
660 write_aux_reg(ARC_REG_IC_IVIC, 1);
661
662 /* lr will not complete till the icache inv operation is not over */
663 read_aux_reg(ARC_REG_IC_CTRL);
664 local_irq_restore(flags);
665}
666
667noinline void flush_cache_all(void) 657noinline void flush_cache_all(void)
668{ 658{
669 unsigned long flags; 659 unsigned long flags;
670 660
671 local_irq_save(flags); 661 local_irq_save(flags);
672 662
673 flush_icache_all(); 663 __ic_entire_inv();
674 __dc_entire_op(OP_FLUSH_N_INV); 664 __dc_entire_op(OP_FLUSH_N_INV);
675 665
676 local_irq_restore(flags); 666 local_irq_restore(flags);