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authorVineet Gupta <vgupta@synopsys.com>2014-06-25 07:46:04 -0400
committerVineet Gupta <vgupta@synopsys.com>2014-07-23 01:47:55 -0400
commit878f46c71e99cfb6d8e4e15a561db63a3c9601e5 (patch)
tree5e41401f5aeb29f8253d7fd335ccc2464ea8b844 /arch/arc/kernel
parentc16e3e22839a33e1485b950ff7e86e58a862adea (diff)
ARC: [intc] don't mask all IRQ by default
Hardware keeps them enabled on reset, and Linux needs to keep status quo. Any spurious interrupts will be reported/blocked by genirq. This helps remove a SMP IRQ quirk (next commit), where a peripheral IRQ is hard wired to core0, and request_irq()->unmask() happens on core1, keeping the IRQ masked on core0, needing an explicit unmask. Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Diffstat (limited to 'arch/arc/kernel')
-rw-r--r--arch/arc/kernel/irq.c7
1 files changed, 1 insertions, 6 deletions
diff --git a/arch/arc/kernel/irq.c b/arch/arc/kernel/irq.c
index 835fa5e71b62..02ffc764c97a 100644
--- a/arch/arc/kernel/irq.c
+++ b/arch/arc/kernel/irq.c
@@ -19,21 +19,16 @@
19 19
20/* 20/*
21 * Early Hardware specific Interrupt setup 21 * Early Hardware specific Interrupt setup
22 * -Platform independent, needed for each CPU (not foldable into init_IRQ)
22 * -Called very early (start_kernel -> setup_arch -> setup_processor) 23 * -Called very early (start_kernel -> setup_arch -> setup_processor)
23 * -Platform Independent (must for any ARC700)
24 * -Needed for each CPU (hence not foldable into init_IRQ)
25 * 24 *
26 * what it does ? 25 * what it does ?
27 * -Disable all IRQs (on CPU side)
28 * -Optionally, setup the High priority Interrupts as Level 2 IRQs 26 * -Optionally, setup the High priority Interrupts as Level 2 IRQs
29 */ 27 */
30void arc_init_IRQ(void) 28void arc_init_IRQ(void)
31{ 29{
32 int level_mask = 0; 30 int level_mask = 0;
33 31
34 /* Disable all IRQs: enable them as devices request */
35 write_aux_reg(AUX_IENABLE, 0);
36
37 /* setup any high priority Interrupts (Level2 in ARCompact jargon) */ 32 /* setup any high priority Interrupts (Level2 in ARCompact jargon) */
38 level_mask |= IS_ENABLED(CONFIG_ARC_IRQ3_LV2) << 3; 33 level_mask |= IS_ENABLED(CONFIG_ARC_IRQ3_LV2) << 3;
39 level_mask |= IS_ENABLED(CONFIG_ARC_IRQ5_LV2) << 5; 34 level_mask |= IS_ENABLED(CONFIG_ARC_IRQ5_LV2) << 5;