dmaengine: dw: define DW_DMA_MAX_NR_MASTERS

Instead of using magic number in the code the patch provides
DW_DMA_MAX_NR_MASTERS constant.

While here, restrict the reading of data width array by amount of the actual
number of AHB masters.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>

1 files changed, 1 insertions, 1 deletions

diff --git a/arch/arc/boot/dts/abilis_tb10x.dtsi b/arch/arc/boot/dts/abilis_tb10x.dtsi
index a098d7c05e96..cfb5052239a1 100644
--- a/arch/arc/boot/dts/abilis_tb10x.dtsi
+++ b/arch/arc/boot/dts/abilis_tb10x.dtsi
@@ -112,7 +112,7 @@
                         chan_allocation_order = <0>;
                         chan_priority = <1>;
                         block_size = <0x7ff>;
-                        data_width = <2 0 0 0>;
+                        data_width = <2>;
                         clocks = <&ahb_clk>;
                         clock-names = "hclk";
                 };