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author | Olof Johansson <olof@lixom.net> | 2015-01-29 16:52:52 -0500 |
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committer | Olof Johansson <olof@lixom.net> | 2015-01-29 16:52:52 -0500 |
commit | d073d7a1460ae1ae56a81bbb0a58d6f17917ca51 (patch) | |
tree | 03a554995f61bd8f12d3508eae58011e0a6067e3 /Documentation | |
parent | 03773a4c177ab55a1e58bacef96f07d6074c26bd (diff) | |
parent | d50b9e2e788dce9b120b5ac1140f0cdd1bf905eb (diff) |
Merge tag 'samsung-cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/cleanup
Merge "Samsung cleanup for v3.20" from Kukjin Kim:
- remove i2c sys configuration from mach-exynos/
: all related codes moved into i2c driver
- remove Samsung specific DMA
: every Samsung stuff uses dmaengine APIs
* tag 'samsung-cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
ARM: SAMSUNG: remove unused DMA infrastructure
ARM: EXYNOS: Remove i2c sys configuration related code
Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'Documentation')
-rw-r--r-- | Documentation/arm/Samsung-S3C24XX/DMA.txt | 46 |
1 files changed, 0 insertions, 46 deletions
diff --git a/Documentation/arm/Samsung-S3C24XX/DMA.txt b/Documentation/arm/Samsung-S3C24XX/DMA.txt deleted file mode 100644 index 3ed82383efea..000000000000 --- a/Documentation/arm/Samsung-S3C24XX/DMA.txt +++ /dev/null | |||
@@ -1,46 +0,0 @@ | |||
1 | S3C2410 DMA | ||
2 | =========== | ||
3 | |||
4 | Introduction | ||
5 | ------------ | ||
6 | |||
7 | The kernel provides an interface to manage DMA transfers | ||
8 | using the DMA channels in the CPU, so that the central | ||
9 | duty of managing channel mappings, and programming the | ||
10 | channel generators is in one place. | ||
11 | |||
12 | |||
13 | DMA Channel Ordering | ||
14 | -------------------- | ||
15 | |||
16 | Many of the range do not have connections for the DMA | ||
17 | channels to all sources, which means that some devices | ||
18 | have a restricted number of channels that can be used. | ||
19 | |||
20 | To allow flexibility for each CPU type and board, the | ||
21 | DMA code can be given a DMA ordering structure which | ||
22 | allows the order of channel search to be specified, as | ||
23 | well as allowing the prohibition of certain claims. | ||
24 | |||
25 | struct s3c24xx_dma_order has a list of channels, and | ||
26 | each channel within has a slot for a list of DMA | ||
27 | channel numbers. The slots are searched in order for | ||
28 | the presence of a DMA channel number with DMA_CH_VALID | ||
29 | or-ed in. | ||
30 | |||
31 | If the order has the flag DMA_CH_NEVER set, then after | ||
32 | checking the channel list, the system will return no | ||
33 | found channel, thus denying the request. | ||
34 | |||
35 | A board support file can call s3c24xx_dma_order_set() | ||
36 | to register a complete ordering set. The routine will | ||
37 | copy the data, so the original can be discarded with | ||
38 | __initdata. | ||
39 | |||
40 | |||
41 | Authour | ||
42 | ------- | ||
43 | |||
44 | Ben Dooks, | ||
45 | Copyright (c) 2007 Ben Dooks, Simtec Electronics | ||
46 | Licensed under the GPL v2 | ||