Merge branch 'linus' of git://git.kernel.org/pub/scm/linux/kernel/git/evalenti/linux-soc-thermal into eduardo-soc-thermal

3 files changed, 121 insertions, 8 deletions

diff --git a/Documentation/devicetree/bindings/thermal/armada-thermal.txt b/Documentation/devicetree/bindings/thermal/armada-thermal.txt
index 4cf024929a3f..4698e0edc205 100644
--- a/Documentation/devicetree/bindings/thermal/armada-thermal.txt
+++ b/Documentation/devicetree/bindings/thermal/armada-thermal.txt
@@ -5,17 +5,9 @@ Required properties:
 - compatible:   Should be set to one of the following:
                 marvell,armada370-thermal
                 marvell,armada375-thermal
-                marvell,armada375-z1-thermal
                 marvell,armada380-thermal
                 marvell,armadaxp-thermal
 
-                Note: As the name suggests, "marvell,armada375-z1-thermal"
-                applies for the SoC Z1 stepping only. On such stepping
-                some quirks need to be done and the register offset differs
-                from the one in the A0 stepping.
-                The operating system may auto-detect the SoC stepping and
-                update the compatible and register offsets at runtime.
-
 - reg:          Device's register space.
                 Two entries are expected, see the examples below.
                 The first one is required for the sensor register;
diff --git a/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt b/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt
new file mode 100644
index 000000000000..ef802de4957a
--- /dev/null
+++ b/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt
@@ -0,0 +1,68 @@
+* Temperature Sensor ADC (TSADC) on rockchip SoCs
+
+Required properties:
+- compatible : "rockchip,rk3288-tsadc"
+- reg : physical base address of the controller and length of memory mapped
+        region.
+- interrupts : The interrupt number to the cpu. The interrupt specifier format
+               depends on the interrupt controller.
+- clocks : Must contain an entry for each entry in clock-names.
+- clock-names : Shall be "tsadc" for the converter-clock, and "apb_pclk" for
+                the peripheral clock.
+- resets : Must contain an entry for each entry in reset-names.
+           See ../reset/reset.txt for details.
+- reset-names : Must include the name "tsadc-apb".
+- #thermal-sensor-cells : Should be 1. See ./thermal.txt for a description.
+- rockchip,hw-tshut-temp : The hardware-controlled shutdown temperature value.
+- rockchip,hw-tshut-mode : The hardware-controlled shutdown mode 0:CRU 1:GPIO.
+- rockchip,hw-tshut-polarity : The hardware-controlled active polarity 0:LOW
+                               1:HIGH.
+
+Exiample:
+tsadc: tsadc@ff280000 {
+        compatible = "rockchip,rk3288-tsadc";
+        reg = <0xff280000 0x100>;
+        interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
+        clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>;
+        clock-names = "tsadc", "apb_pclk";
+        resets = <&cru SRST_TSADC>;
+        reset-names = "tsadc-apb";
+        pinctrl-names = "default";
+        pinctrl-0 = <&otp_out>;
+        #thermal-sensor-cells = <1>;
+        rockchip,hw-tshut-temp = <95000>;
+        rockchip,hw-tshut-mode = <0>;
+        rockchip,hw-tshut-polarity = <0>;
+};
+
+Example: referring to thermal sensors:
+thermal-zones {
+        cpu_thermal: cpu_thermal {
+                polling-delay-passive = <1000>; /* milliseconds */
+                polling-delay = <5000>; /* milliseconds */
+
+                /* sensor       ID */
+                thermal-sensors = <&tsadc       1>;
+
+                trips {
+                        cpu_alert0: cpu_alert {
+                                temperature = <70000>; /* millicelsius */
+                                hysteresis = <2000>; /* millicelsius */
+                                type = "passive";
+                        };
+                        cpu_crit: cpu_crit {
+                                temperature = <90000>; /* millicelsius */
+                                hysteresis = <2000>; /* millicelsius */
+                                type = "critical";
+                        };
+                };
+
+                cooling-maps {
+                        map0 {
+                                trip = <&cpu_alert0>;
+                                cooling-device =
+                                    <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+                        };
+                };
+        };
+};
diff --git a/Documentation/devicetree/bindings/thermal/tegra-soctherm.txt b/Documentation/devicetree/bindings/thermal/tegra-soctherm.txt
new file mode 100644
index 000000000000..ecf3ed76cd46
--- /dev/null
+++ b/Documentation/devicetree/bindings/thermal/tegra-soctherm.txt
@@ -0,0 +1,53 @@
+Tegra124 SOCTHERM thermal management system
+
+The SOCTHERM IP block contains thermal sensors, support for polled
+or interrupt-based thermal monitoring, CPU and GPU throttling based
+on temperature trip points, and handling external overcurrent
+notifications. It is also used to manage emergency shutdown in an
+overheating situation.
+
+Required properties :
+- compatible : "nvidia,tegra124-soctherm".
+- reg : Should contain 1 entry:
+  - SOCTHERM register set
+- interrupts : Defines the interrupt used by SOCTHERM
+- clocks : Must contain an entry for each entry in clock-names.
+  See ../clocks/clock-bindings.txt for details.
+- clock-names : Must include the following entries:
+  - tsensor
+  - soctherm
+- resets : Must contain an entry for each entry in reset-names.
+  See ../reset/reset.txt for details.
+- reset-names : Must include the following entries:
+  - soctherm
+- #thermal-sensor-cells : Should be 1. See ./thermal.txt for a description
+    of this property. See <dt-bindings/thermal/tegra124-soctherm.h> for a
+    list of valid values when referring to thermal sensors.
+
+
+Example :
+
+        soctherm@0,700e2000 {
+                compatible = "nvidia,tegra124-soctherm";
+                reg = <0x0 0x700e2000 0x0 0x1000>;
+                interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
+                clocks = <&tegra_car TEGRA124_CLK_TSENSOR>,
+                        <&tegra_car TEGRA124_CLK_SOC_THERM>;
+                clock-names = "tsensor", "soctherm";
+                resets = <&tegra_car 78>;
+                reset-names = "soctherm";
+
+                #thermal-sensor-cells = <1>;
+        };
+
+Example: referring to thermal sensors :
+
+       thermal-zones {
+                cpu {
+                        polling-delay-passive = <1000>;
+                        polling-delay = <1000>;
+
+                        thermal-sensors =
+                                <&soctherm TEGRA124_SOCTHERM_SENSOR_CPU>;
+                };
+        };