diff options
author | Viresh Kumar <viresh.kumar@linaro.org> | 2013-04-01 08:57:49 -0400 |
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committer | Rafael J. Wysocki <rafael.j.wysocki@intel.com> | 2013-04-02 09:26:32 -0400 |
commit | 8a67f0ef2b684b34162d39e8f436fe39e9635a19 (patch) | |
tree | dc997ac3064c69e775485213b824e7c3efeb5b99 /Documentation | |
parent | eb2f50ff93f08c8001d0d7e1148948ba80989aaf (diff) |
cpufreq: ARM big LITTLE: Add generic cpufreq driver and its DT glue
big LITTLE is ARM's new Architecture focussing power/performance needs of modern
world. More information about big LITTLE can be found here:
http://www.arm.com/products/processors/technologies/biglittleprocessing.php
http://lwn.net/Articles/481055/
In order to keep cpufreq support for all big LITTLE platforms simple/generic,
this patch tries to add a generic cpufreq driver layer for all big LITTLE
platforms.
The driver is divided into two parts:
- Core driver: Generic and shared across all big LITTLE SoC's
- Glue drivers: Per platform drivers providing ops to the core driver
This patch adds in a generic glue driver which would extract information from
Device Tree.
Future SoC's can either reuse the DT glue or write their own depending on the
need.
Signed-off-by: Sudeep KarkadaNagesha <sudeep.karkadanagesha@arm.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Diffstat (limited to 'Documentation')
-rw-r--r-- | Documentation/devicetree/bindings/cpufreq/arm_big_little_dt.txt | 65 |
1 files changed, 65 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/cpufreq/arm_big_little_dt.txt b/Documentation/devicetree/bindings/cpufreq/arm_big_little_dt.txt new file mode 100644 index 000000000000..0715695e94a9 --- /dev/null +++ b/Documentation/devicetree/bindings/cpufreq/arm_big_little_dt.txt | |||
@@ -0,0 +1,65 @@ | |||
1 | Generic ARM big LITTLE cpufreq driver's DT glue | ||
2 | ----------------------------------------------- | ||
3 | |||
4 | This is DT specific glue layer for generic cpufreq driver for big LITTLE | ||
5 | systems. | ||
6 | |||
7 | Both required and optional properties listed below must be defined | ||
8 | under node /cpus/cpu@x. Where x is the first cpu inside a cluster. | ||
9 | |||
10 | FIXME: Cpus should boot in the order specified in DT and all cpus for a cluster | ||
11 | must be present contiguously. Generic DT driver will check only node 'x' for | ||
12 | cpu:x. | ||
13 | |||
14 | Required properties: | ||
15 | - operating-points: Refer to Documentation/devicetree/bindings/power/opp.txt | ||
16 | for details | ||
17 | |||
18 | Optional properties: | ||
19 | - clock-latency: Specify the possible maximum transition latency for clock, | ||
20 | in unit of nanoseconds. | ||
21 | |||
22 | Examples: | ||
23 | |||
24 | cpus { | ||
25 | #address-cells = <1>; | ||
26 | #size-cells = <0>; | ||
27 | |||
28 | cpu@0 { | ||
29 | compatible = "arm,cortex-a15"; | ||
30 | reg = <0>; | ||
31 | next-level-cache = <&L2>; | ||
32 | operating-points = < | ||
33 | /* kHz uV */ | ||
34 | 792000 1100000 | ||
35 | 396000 950000 | ||
36 | 198000 850000 | ||
37 | >; | ||
38 | clock-latency = <61036>; /* two CLK32 periods */ | ||
39 | }; | ||
40 | |||
41 | cpu@1 { | ||
42 | compatible = "arm,cortex-a15"; | ||
43 | reg = <1>; | ||
44 | next-level-cache = <&L2>; | ||
45 | }; | ||
46 | |||
47 | cpu@100 { | ||
48 | compatible = "arm,cortex-a7"; | ||
49 | reg = <100>; | ||
50 | next-level-cache = <&L2>; | ||
51 | operating-points = < | ||
52 | /* kHz uV */ | ||
53 | 792000 950000 | ||
54 | 396000 750000 | ||
55 | 198000 450000 | ||
56 | >; | ||
57 | clock-latency = <61036>; /* two CLK32 periods */ | ||
58 | }; | ||
59 | |||
60 | cpu@101 { | ||
61 | compatible = "arm,cortex-a7"; | ||
62 | reg = <101>; | ||
63 | next-level-cache = <&L2>; | ||
64 | }; | ||
65 | }; | ||