diff options
author | Joseph Lo <josephl@nvidia.com> | 2013-04-03 07:31:27 -0400 |
---|---|---|
committer | Stephen Warren <swarren@nvidia.com> | 2013-04-03 16:29:56 -0400 |
commit | 7021d1220584ab1e6efd3d59da47b65674d9896a (patch) | |
tree | f347a80205ab3bd8fba9d162dd1e65c56254a04f /Documentation | |
parent | 7495b2eb0770b85e58af98b99faaf853e9563784 (diff) |
ARM: tegra: add clock source of PMC to device trees
Adding the bindings of the clock source of PMC in DT.
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Diffstat (limited to 'Documentation')
-rw-r--r-- | Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.txt | 29 |
1 files changed, 28 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.txt b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.txt index b5846e21cc2e..ee529b17cb9f 100644 --- a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.txt +++ b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.txt | |||
@@ -1,9 +1,15 @@ | |||
1 | NVIDIA Tegra Power Management Controller (PMC) | 1 | NVIDIA Tegra Power Management Controller (PMC) |
2 | 2 | ||
3 | Properties: | 3 | Required properties: |
4 | - name : Should be pmc | 4 | - name : Should be pmc |
5 | - compatible : Should contain "nvidia,tegra<chip>-pmc". | 5 | - compatible : Should contain "nvidia,tegra<chip>-pmc". |
6 | - reg : Offset and length of the register set for the device | 6 | - reg : Offset and length of the register set for the device |
7 | - clocks : Must contain an entry for each entry in clock-names. | ||
8 | - clock-names : Must include the following entries: | ||
9 | "pclk" (The Tegra clock of that name), | ||
10 | "clk32k_in" (The 32KHz clock input to Tegra). | ||
11 | |||
12 | Optional properties: | ||
7 | - nvidia,invert-interrupt : If present, inverts the PMU interrupt signal. | 13 | - nvidia,invert-interrupt : If present, inverts the PMU interrupt signal. |
8 | The PMU is an external Power Management Unit, whose interrupt output | 14 | The PMU is an external Power Management Unit, whose interrupt output |
9 | signal is fed into the PMC. This signal is optionally inverted, and then | 15 | signal is fed into the PMC. This signal is optionally inverted, and then |
@@ -12,8 +18,29 @@ Properties: | |||
12 | 18 | ||
13 | Example: | 19 | Example: |
14 | 20 | ||
21 | / SoC dts including file | ||
15 | pmc@7000f400 { | 22 | pmc@7000f400 { |
16 | compatible = "nvidia,tegra20-pmc"; | 23 | compatible = "nvidia,tegra20-pmc"; |
17 | reg = <0x7000e400 0x400>; | 24 | reg = <0x7000e400 0x400>; |
25 | clocks = <&tegra_car 110>, <&clk32k_in>; | ||
26 | clock-names = "pclk", "clk32k_in"; | ||
18 | nvidia,invert-interrupt; | 27 | nvidia,invert-interrupt; |
19 | }; | 28 | }; |
29 | |||
30 | / Tegra board dts file | ||
31 | { | ||
32 | ... | ||
33 | clocks { | ||
34 | compatible = "simple-bus"; | ||
35 | #address-cells = <1>; | ||
36 | #size-cells = <0>; | ||
37 | |||
38 | clk32k_in: clock { | ||
39 | compatible = "fixed-clock"; | ||
40 | reg=<0>; | ||
41 | #clock-cells = <0>; | ||
42 | clock-frequency = <32768>; | ||
43 | }; | ||
44 | }; | ||
45 | ... | ||
46 | }; | ||