Merge branch 'next' of git://git.infradead.org/users/vkoul/slave-dma

Pull slave-dmaengine updates from Vinod Koul:
 "This is fairly big pull by my standards as I had missed last merge
  window.  So we have the support for device tree for slave-dmaengine,
  large updates to dw_dmac driver from Andy for reusing on different
  architectures.  Along with this we have fixes on bunch of the drivers"

Fix up trivial conflicts, usually due to #include line movement next to
each other.

* 'next' of git://git.infradead.org/users/vkoul/slave-dma: (111 commits)
  Revert "ARM: SPEAr13xx: Pass DW DMAC platform data from DT"
  ARM: dts: pl330: Add #dma-cells for generic dma binding support
  DMA: PL330: Register the DMA controller with the generic DMA helpers
  DMA: PL330: Add xlate function
  DMA: PL330: Add new pl330 filter for DT case.
  dma: tegra20-apb-dma: remove unnecessary assignment
  edma: do not waste memory for dma_mask
  dma: coh901318: set residue only if dma is in progress
  dma: coh901318: avoid unbalanced locking
  dmaengine.h: remove redundant else keyword
  dma: of-dma: protect list write operation by spin_lock
  dmaengine: ste_dma40: do not remove descriptors for cyclic transfers
  dma: of-dma.c: fix memory leakage
  dw_dmac: apply default dma_mask if needed
  dmaengine: ioat - fix spare sparse complain
  dmaengine: move drivers/of/dma.c -> drivers/dma/of-dma.c
  ioatdma: fix race between updating ioat->head and IOAT_COMPLETION_PENDING
  dw_dmac: add support for Lynxpoint DMA controllers
  dw_dmac: return proper residue value
  dw_dmac: fill individual length of descriptor
  ...

3 files changed, 141 insertions, 5 deletions

diff --git a/Documentation/devicetree/bindings/dma/arm-pl330.txt b/Documentation/devicetree/bindings/dma/arm-pl330.txt
index 36e27d54260b..267565894db9 100644
--- a/Documentation/devicetree/bindings/dma/arm-pl330.txt
+++ b/Documentation/devicetree/bindings/dma/arm-pl330.txt
@@ -10,7 +10,11 @@ Required properties:
   - interrupts: interrupt number to the cpu.
 
 Optional properties:
-- dma-coherent      : Present if dma operations are coherent
+  - dma-coherent      : Present if dma operations are coherent
+  - #dma-cells: must be <1>. used to represent the number of integer
+    cells in the dmas property of client device.
+  - dma-channels: contains the total number of DMA channels supported by the DMAC
+  - dma-requests: contains the total number of DMA requests supported by the DMAC
 
 Example:
 
@@ -18,16 +22,23 @@ Example:
                 compatible = "arm,pl330", "arm,primecell";
                 reg = <0x12680000 0x1000>;
                 interrupts = <99>;
+                #dma-cells = <1>;
+                #dma-channels = <8>;
+                #dma-requests = <32>;
         };
 
 Client drivers (device nodes requiring dma transfers from dev-to-mem or
-mem-to-dev) should specify the DMA channel numbers using a two-value pair
+mem-to-dev) should specify the DMA channel numbers and dma channel names
 as shown below.
 
   [property name]  = <[phandle of the dma controller] [dma request id]>;
+  [property name]  = <[dma channel name]>
 
       where 'dma request id' is the dma request number which is connected
-      to the client controller. The 'property name' is recommended to be
-      of the form <name>-dma-channel.
+      to the client controller. The 'property name' 'dmas' and 'dma-names'
+      as required by the generic dma device tree binding helpers. The dma
+      names correspond 1:1 with the dma request ids in the dmas property.
 
-  Example:  tx-dma-channel = <&pdma0 12>;
+  Example:  dmas = <&pdma0 12
+                    &pdma1 11>;
+            dma-names = "tx", "rx";
diff --git a/Documentation/devicetree/bindings/dma/dma.txt b/Documentation/devicetree/bindings/dma/dma.txt
new file mode 100644
index 000000000000..8f504e6bae14
--- /dev/null
+++ b/Documentation/devicetree/bindings/dma/dma.txt
@@ -0,0 +1,81 @@
+* Generic DMA Controller and DMA request bindings
+
+Generic binding to provide a way for a driver using DMA Engine to retrieve the
+DMA request or channel information that goes from a hardware device to a DMA
+controller.
+
+
+* DMA controller
+
+Required property:
+- #dma-cells:           Must be at least 1. Used to provide DMA controller
+                        specific information. See DMA client binding below for
+                        more details.
+
+Optional properties:
+- dma-channels:         Number of DMA channels supported by the controller.
+- dma-requests:         Number of DMA requests signals supported by the
+                        controller.
+
+Example:
+
+        dma: dma@48000000 {
+                compatible = "ti,omap-sdma";
+                reg = <0x48000000 0x1000>;
+                interrupts = <0 12 0x4
+                              0 13 0x4
+                              0 14 0x4
+                              0 15 0x4>;
+                #dma-cells = <1>;
+                dma-channels = <32>;
+                dma-requests = <127>;
+        };
+
+
+* DMA client
+
+Client drivers should specify the DMA property using a phandle to the controller
+followed by DMA controller specific data.
+
+Required property:
+- dmas:                 List of one or more DMA specifiers, each consisting of
+                        - A phandle pointing to DMA controller node
+                        - A number of integer cells, as determined by the
+                          #dma-cells property in the node referenced by phandle
+                          containing DMA controller specific information. This
+                          typically contains a DMA request line number or a
+                          channel number, but can contain any data that is used
+                          required for configuring a channel.
+- dma-names:            Contains one identifier string for each DMA specifier in
+                        the dmas property. The specific strings that can be used
+                        are defined in the binding of the DMA client device.
+                        Multiple DMA specifiers can be used to represent
+                        alternatives and in this case the dma-names for those
+                        DMA specifiers must be identical (see examples).
+
+Examples:
+
+1. A device with one DMA read channel, one DMA write channel:
+
+        i2c1: i2c@1 {
+                ...
+                dmas = <&dma 2          /* read channel */
+                        &dma 3>;        /* write channel */
+                dma-names = "rx", "tx";
+                ...
+        };
+
+2. A single read-write channel with three alternative DMA controllers:
+
+        dmas = <&dma1 5
+                &dma2 7
+                &dma3 2>;
+        dma-names = "rx-tx", "rx-tx", "rx-tx";
+
+3. A device with three channels, one of which has two alternatives:
+
+        dmas = <&dma1 2                 /* read channel */
+                &dma1 3                 /* write channel */
+                &dma2 0                 /* error read */
+                &dma3 0>;               /* alternative error read */
+        dma-names = "rx", "tx", "error", "error";
diff --git a/Documentation/devicetree/bindings/dma/snps-dma.txt b/Documentation/devicetree/bindings/dma/snps-dma.txt
index c0d85dbcada5..5bb3dfb6f1d8 100644
--- a/Documentation/devicetree/bindings/dma/snps-dma.txt
+++ b/Documentation/devicetree/bindings/dma/snps-dma.txt
@@ -6,6 +6,26 @@ Required properties:
 - interrupt-parent: Should be the phandle for the interrupt controller
   that services interrupts for this device
 - interrupt: Should contain the DMAC interrupt number
+- nr_channels: Number of channels supported by hardware
+- is_private: The device channels should be marked as private and not for by the
+  general purpose DMA channel allocator. False if not passed.
+- chan_allocation_order: order of allocation of channel, 0 (default): ascending,
+  1: descending
+- chan_priority: priority of channels. 0 (default): increase from chan 0->n, 1:
+  increase from chan n->0
+- block_size: Maximum block size supported by the controller
+- nr_masters: Number of AHB masters supported by the controller
+- data_width: Maximum data width supported by hardware per AHB master
+  (0 - 8bits, 1 - 16bits, ..., 5 - 256bits)
+- slave_info:
+        - bus_id: name of this device channel, not just a device name since
+          devices may have more than one channel e.g. "foo_tx". For using the
+          dw_generic_filter(), slave drivers must pass exactly this string as
+          param to filter function.
+        - cfg_hi: Platform-specific initializer for the CFG_HI register
+        - cfg_lo: Platform-specific initializer for the CFG_LO register
+        - src_master: src master for transfers on allocated channel.
+        - dst_master: dest master for transfers on allocated channel.
 
 Example:
 
@@ -14,4 +34,28 @@ Example:
                 reg = <0xfc000000 0x1000>;
                 interrupt-parent = <&vic1>;
                 interrupts = <12>;
+
+                nr_channels = <8>;
+                chan_allocation_order = <1>;
+                chan_priority = <1>;
+                block_size = <0xfff>;
+                nr_masters = <2>;
+                data_width = <3 3 0 0>;
+
+                slave_info {
+                        uart0-tx {
+                                bus_id = "uart0-tx";
+                                cfg_hi = <0x4000>;      /* 0x8 << 11 */
+                                cfg_lo = <0>;
+                                src_master = <0>;
+                                dst_master = <1>;
+                        };
+                        spi0-tx {
+                                bus_id = "spi0-tx";
+                                cfg_hi = <0x2000>;      /* 0x4 << 11 */
+                                cfg_lo = <0>;
+                                src_master = <0>;
+                                dst_master = <0>;
+                        };
+                };
         };