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authorShawn Guo <shawn.guo@linaro.org>2012-05-04 02:29:22 -0400
committerShawn Guo <shawn.guo@linaro.org>2012-05-12 01:32:19 -0400
commit4052d45e800ce33e1993fb70604941547ed73d26 (patch)
tree8cf84a968f897313a5db502239dbe9eaf45dd6aa /Documentation
parent164387d2b4ae206f6275f5f6857aee74654918c4 (diff)
gpio/mxs: add device tree probe
It adds device tree probe for gpio-mxs driver. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/devicetree/bindings/gpio/gpio-mxs.txt87
1 files changed, 87 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/gpio/gpio-mxs.txt b/Documentation/devicetree/bindings/gpio/gpio-mxs.txt
new file mode 100644
index 000000000000..0c35673f7a3e
--- /dev/null
+++ b/Documentation/devicetree/bindings/gpio/gpio-mxs.txt
@@ -0,0 +1,87 @@
1* Freescale MXS GPIO controller
2
3The Freescale MXS GPIO controller is part of MXS PIN controller. The
4GPIOs are organized in port/bank. Each port consists of 32 GPIOs.
5
6As the GPIO controller is embedded in the PIN controller and all the
7GPIO ports share the same IO space with PIN controller, the GPIO node
8will be represented as sub-nodes of MXS pinctrl node.
9
10Required properties for GPIO node:
11- compatible : Should be "fsl,<soc>-gpio". The supported SoCs include
12 imx23 and imx28.
13- interrupts : Should be the port interrupt shared by all 32 pins.
14- gpio-controller : Marks the device node as a gpio controller.
15- #gpio-cells : Should be two. The first cell is the pin number and
16 the second cell is used to specify optional parameters (currently
17 unused).
18- interrupt-controller: Marks the device node as an interrupt controller.
19- #interrupt-cells : Should be 2. The first cell is the GPIO number.
20 The second cell bits[3:0] is used to specify trigger type and level flags:
21 1 = low-to-high edge triggered.
22 2 = high-to-low edge triggered.
23 4 = active high level-sensitive.
24 8 = active low level-sensitive.
25
26Note: Each GPIO port should have an alias correctly numbered in "aliases"
27node.
28
29Examples:
30
31aliases {
32 gpio0 = &gpio0;
33 gpio1 = &gpio1;
34 gpio2 = &gpio2;
35 gpio3 = &gpio3;
36 gpio4 = &gpio4;
37};
38
39pinctrl@80018000 {
40 compatible = "fsl,imx28-pinctrl", "simple-bus";
41 reg = <0x80018000 2000>;
42
43 gpio0: gpio@0 {
44 compatible = "fsl,imx28-gpio";
45 interrupts = <127>;
46 gpio-controller;
47 #gpio-cells = <2>;
48 interrupt-controller;
49 #interrupt-cells = <2>;
50 };
51
52 gpio1: gpio@1 {
53 compatible = "fsl,imx28-gpio";
54 interrupts = <126>;
55 gpio-controller;
56 #gpio-cells = <2>;
57 interrupt-controller;
58 #interrupt-cells = <2>;
59 };
60
61 gpio2: gpio@2 {
62 compatible = "fsl,imx28-gpio";
63 interrupts = <125>;
64 gpio-controller;
65 #gpio-cells = <2>;
66 interrupt-controller;
67 #interrupt-cells = <2>;
68 };
69
70 gpio3: gpio@3 {
71 compatible = "fsl,imx28-gpio";
72 interrupts = <124>;
73 gpio-controller;
74 #gpio-cells = <2>;
75 interrupt-controller;
76 #interrupt-cells = <2>;
77 };
78
79 gpio4: gpio@4 {
80 compatible = "fsl,imx28-gpio";
81 interrupts = <123>;
82 gpio-controller;
83 #gpio-cells = <2>;
84 interrupt-controller;
85 #interrupt-cells = <2>;
86 };
87};